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* glsl: Remove the opt_discard_simplification pass.Eric Anholt2012-05-144-209/+0
| | | | | | | This conflicts with the GLSL 1.30+ rules for derivatives after a discard has occurred. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Remove the requirement of no dead code for interference checks.Eric Anholt2012-05-141-12/+12
| | | | | | | | This will be convenient when I want to comment out optimization code to see the raw program being optimized, but more importantly will let the interference check be used during optimization. Acked-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for copy propagation.Eric Anholt2012-05-145-0/+143
| | | | | | | | | | | | We could do more by handling abs/negate and non-GRF sources, but this is a good start. Improves tropics performance 0.30% +/- .17% (n=43). shader-db results: Total instructions: 208032 -> 207184 60/1246 programs affected (4.8%) 23286 -> 22438 instructions in affected programs (3.6% reduction) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: When doing no work for live interval calculation, do no allocation.Eric Anholt2012-05-141-7/+7
| | | | | | | | | When I had a bug causing the backend to never finish optimizing, it also sent me deep into swap. This avoids extra memory allocation per trip through optimization, and thus may reduce the peak memory allocation of the driver even in the success case. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen7: Set tile_x/y to 0 in the no-stencil case.Eric Anholt2012-05-141-1/+1
| | | | Fixes compiler warnings.
* intel: Fix signed/unsigned comparison warnings.Eric Anholt2012-05-142-5/+6
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* intel: Fix compile warning from 7b6424143d8bf572cadd46adcbaa91d2a5598635Eric Anholt2012-05-141-2/+2
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* intel: Fix compiler warning from 3cd7bee48f7caf7850ea64d40f43875d4c975507Eric Anholt2012-05-141-2/+0
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* i965/fs: Add a local common subexpression elimination pass.Kenneth Graunke2012-05-144-0/+201
| | | | | | | | | | | | | | | | | Total instructions: 18210 -> 17836 49/163 programs affected (30.1%) 12888 -> 12514 instructions in affected programs (2.9% reduction) This reduces Lightsmark's "Scale down filter" shader from 395 instructions to 283, a whopping 28%. It also reduces register pressure significantly: the SIMD8 program now uses 29 registers instead of 101, giving us more than enough room for a SIMD16 program. v2: Add && !inst->conditional_mod to the "skip some instructions" check. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Use a const reference in fs_reg::equals instead of a pointer.Kenneth Graunke2012-05-143-16/+16
| | | | | | | | | | This lets you omit some ampersands and is more idiomatic C++. Using const also marks the function as not altering either register (which was obvious, but nice to enforce). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: print the Git SHA1 in GL_VERSION for ES1 and ES2.Oliver McFadden2012-05-141-2/+10
| | | | | Signed-off-by: Oliver McFadden <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: GLES specifies restrictions on uniform matrix transpose.Oliver McFadden2012-05-141-0/+10
| | | | | | | | | GL_INVALID_VALUE is generated if transpose is not GL_FALSE. http://www.khronos.org/opengles/sdk/docs/man/xhtml/glUniform.xml Signed-off-by: Oliver McFadden <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeonsi: Keep around copies of original sampler states.Michel Dänzer2012-05-141-0/+2
| | | | Fixes crashes when restoring sampler states after blits.
* radeonsi: Flesh out shader interpolation related code.Michel Dänzer2012-05-143-4/+38
| | | | Handle perspective interpolation and ceontroid vs. center.
* radeonsi: Add proper SI family names.Michel Dänzer2012-05-141-1/+3
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* radeonsi: Separate states for samplers and sampler views.Michel Dänzer2012-05-142-3/+6
| | | | And reset nregs on updates. Prevents eventual assertion failure.
* radeonsi: Fixups for drawing with an index buffer.Michel Dänzer2012-05-143-14/+13
| | | | | Mostly using the DRAW_INDEX_2 type 3 packet instead of DRAW_INDEX, which is no longer supported on SI.
* vl: Initialize pipe_vertex_buffer.user_buffer fields.Vinson Lee2012-05-141-0/+4
| | | | | | | Fix uninitialized scalar variable defects reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* llvmpipe: Calculate fixed point coordinates for triangle setup earlier.James Benton2012-05-141-56/+106
| | | | | | | | | | | | This allows us to calculate the triangle's area using fixed point, previously it was cacluated in floating point space. It was possible that a triangle which had negative area in floating point space had a positive area in fixed point space. Fixes fdo 40920. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeon/llvm: Coding style fixes for R600CodeEmitter.cppTom Stellard2012-05-141-148/+90
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* radeon/llvm: Lower bitcast instructions to copiesTom Stellard2012-05-141-0/+10
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* radeonsi: remove slab allocator for pipe_resource (used mainly for user buffers)Marek Olšák2012-05-133-41/+3
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* r600g: remove slab allocator for pipe_resource (used mainly for user buffers)Marek Olšák2012-05-133-41/+4
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* r600g: handle R16G16B16_FLOAT and R32G32B32_FLOAT in translate_colorswap (EG)Marek Olšák2012-05-121-0/+2
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* gallium: remove user_buffer_create from the interfaceMarek Olšák2012-05-1221-233/+1
| | | | Nothing uses it now.
* gallium/graw: stop using user_buffer_createMarek Olšák2012-05-1216-73/+106
| | | | This is compile-tested.
* gallium/util: remove unused parameter nr_vertex_buffers in util_draw_max_indexMarek Olšák2012-05-123-3/+0
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* clover: Fix build on i386.Francisco Jerez2012-05-121-1/+2
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* clover: Check the total work-group size provided to clEnqueueNDRangeKernel.Francisco Jerez2012-05-121-10/+17
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* clover, gallium: add PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCKChristoph Bumiller2012-05-125-1/+15
| | | | | | | This is not necessarily the product of MAX_BLOCK_SIZE[i]. Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* r600g: Handle compute caps.Francisco Jerez2012-05-121-0/+3
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* r300g: Handle compute caps.Francisco Jerez2012-05-121-0/+5
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* auxiliary/util: Ensure pipe_constant_buffer::user_buffer is initialized.José Fonseca2012-05-121-0/+1
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* scons: Fix missing gbm symbols in st/egl.José Fonseca2012-05-121-3/+5
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* targets/egl-static: Fix some missing symbols.José Fonseca2012-05-121-0/+2
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* trace: Fix pipe_context::clear dumping.José Fonseca2012-05-121-1/+3
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* trace: Fix pipe_shader_state dumping.José Fonseca2012-05-121-2/+4
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* scons: Link r600_drm.so against libdrm-radeonJosé Fonseca2012-05-121-0/+3
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* trace: Match NULL context members.José Fonseca2012-05-121-73/+79
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* gallium/docs: remove documentation of redefine_user_bufferMarek Olšák2012-05-121-14/+0
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* radeonsi: Fixed point vertex formats aren't supported.Michel Dänzer2012-05-121-4/+5
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* radeonsi: Fixups for recent build infrastructure changes.Michel Dänzer2012-05-123-0/+15
| | | | In particular for the pipe loader changes.
* r600g: setup COLOR1 for possible dual-src in the framebuffer bindDave Airlie2012-05-124-15/+12
| | | | | | | | As pointed out by Marek, if we have only one cb, we may as well add this single register write here rather than adding it in the draw loop. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nv30: Silence pipe_cap warningsRoy Spliet2012-05-121-0/+4
| | | | | Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
* nv30/shader: SSG, LIT only requires one source registerRoy Spliet2012-05-122-2/+2
| | | | | | | Fixes crashing due to assertion error Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
* nouveau/vieux: finish != flush, how about we do that..Ben Skeggs2012-05-123-0/+23
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* r300g/swtcl: move vertex buffer updates into set_vertex_buffersMarek Olšák2012-05-122-29/+34
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* r300g/swtcl: move index buffer updates from swtcl_draw_vbo into set_index_bufferMarek Olšák2012-05-122-15/+24
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* r300g/swtcl: malloc vertex and index buffers (don't use radeon DRM to get them)Marek Olšák2012-05-124-43/+23
| | | | | | Vertex and index buffers are never used by hardware, only by Draw. SWTCL chipsets usually have very little memory, so this might help with stability and reliability.
* r300g/swtcl: don't do stuff which is only for HWTCLMarek Olšák2012-05-122-13/+19
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