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* st/mesa: init winsys buffers list only if context creation succeedsCharmaine Lee2017-07-111-3/+3
| | | | | | | | Fixes piglit test crash when context creation fails. v2: As suggested by Brian, move the init to st_create_context_priv() Reviewed-by: Brian Paul <[email protected]>
* winsys/svga/drm: Enable import/export fence FDSinclair Yeh2017-07-173-19/+53
| | | | | | | | | Enable the capability if the DRM supports it. Hook up mechanism to send and receive fence FD from the DRM. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* winsys/svga/drm: Connect winsys-side fence_* functionsSinclair Yeh2017-07-174-10/+109
| | | | | | | | | Connect fence_get_fd, fence_create_fd, and fence_server_sync. Implement the required functions in vmw_fence module. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* drivers/svga: Connect driver-side fence_* functionsSinclair Yeh2017-07-172-1/+56
| | | | | | | | | Connect fence_get_fd, fence_create_fd, and fence_server_sync. Return PIPE_CAP_NATIVE_FENCE_FD capability based on what the winsys reports Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* winsys/svga/drm: Create winsys interface for Fence FDSinclair Yeh2017-07-171-1/+33
| | | | | | | | The new interfaces will be used to enable EGL_ANDROID_native_fence_sync. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* winsys/svga/drm: Prepare to support fence fdSinclair Yeh2017-07-171-3/+8
| | | | | | | Make the fields and flags available. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* drivers/svga, winsys/svga/drm: Thread through timeout for fence_finishSinclair Yeh2017-07-177-8/+18
| | | | | | | | | | | | The timeout parameter is required to implement EGL_ANDROID_native_fence_sync. v2 * Replaced default timeout from 0 to PIPE_TIMEOUT_INFINITE * Add more documentation to the new timeout parameter Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* svga: whitespace clean-up in svga_winsys.hBrian Paul2017-07-171-67/+66
| | | | Trivial.
* svga: add some const qualifiersBrian Paul2017-07-171-3/+3
| | | | Trivial.
* svga: add comment about 'extra' constant locationsBrian Paul2017-07-171-1/+5
| | | | Trivial.
* anv/image: Add INPUT_ATTACHMENT to the list of required usagesJason Ekstrand2017-07-171-0/+1
| | | | | | | | | | | | | | | From the Vulkan 1.0.53 spec VU for vkCreateImageView: "image must have been created with a usage value containing at least one of VK_IMAGE_USAGE_SAMPLED_BIT, VK_IMAGE_USAGE_STORAGE_BIT, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT, VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT, or VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT" We were missing VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT from out list. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
* anv: Stop leaking the no_aux sampler surface stateJason Ekstrand2017-07-171-0/+5
| | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected]
* anv/cmd_buffer: Properly handle render passes with 0 attachmentsJason Ekstrand2017-07-171-12/+11
| | | | | | | | We were early returning and never created the NULL surface state. Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: James Legg <[email protected]> Cc: [email protected]
* radeonsi/gfx9: add VM fault dmesg parser supportMarek Olšák2017-07-171-6/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: automatically resize shader compiler thread queues when they are fullMarek Olšák2017-07-171-8/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: prevent a deadlock in util_queue_add_job with too many GL contextsMarek Olšák2017-07-171-1/+2
| | | | | | | | | | | | | | | | If the queue is full, util_queue_add_job will wait while bo_fence_lock is held. It pb_slab wants to reuse a buffer, it will lock the pb_slab mutex and try to check BO fence busyness, but it has to wait for bo_fence_lock to get released. Both bo_fence_lock and pb_slab mutex are locked now. When the CS thread unreferences and releases a suballocated buffer, it will try to lock the pb_slab mutex and has to wait. The CS thread can't finish its job in order to free a queue slot and unblock util_queue_add_job ==> deadlock. Reviewed-by: Nicolai Hähnle <[email protected]>
* util/u_queue: add an option to resize the queue when it's fullMarek Olšák2017-07-172-3/+36
| | | | | | | | | | | | | | | | | | | | Consider the following situation: mtx_lock(mutex); do_something(); util_queue_add_job(...); mtx_unlock(mutex); If the queue is full, util_queue_add_job will wait for a free slot. If the job which is currently being executed tries to lock the mutex, it will be stuck forever, because util_queue_add_job is stuck. The deadlock can be trivially resolved by increasing the queue size (reallocating the queue) in util_queue_add_job if the queue is full. Then util_queue_add_job becomes wait-free. radeonsi will use it. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose ARB_timer_query unconditionallyMarek Olšák2017-07-171-5/+2
| | | | | | clock_crystal_freq is always non-zero now. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: if clock crystal frequency is 0, print an error and set 1Marek Olšák2017-07-171-0/+4
| | | | | | | | During bring-up, this is often 0. Prevent automatic disablement of ARB_timer_query and demotion of the OpenGL version to 3.2 by setting a non-zero frequency. Print an error message instead. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't read back non-existent register SRBM_STATUS2Marek Olšák2017-07-171-1/+1
| | | | | | It looks like there is no way to monitor SDMA busyness on GFX9. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: prevent a crash with DBG_CHECK_VM and u_threaded_contextMarek Olšák2017-07-171-4/+6
| | | | | | by setting PIPE_CONTEXT_DEBUG in the caller Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface/gfx9: flags.texture currently refers to TC-compatible HTILEMarek Olšák2017-07-171-1/+3
| | | | | | This should lead to better MSAA performance on GFX9. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: simplify computation of tessellation offchip buffersMarek Olšák2017-07-171-15/+4
| | | | | | This is overly cautious, but better safe than sorry. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add workarounds to avoid VGPR indexing completelyMarek Olšák2017-07-173-8/+21
| | | | | | | | | | For inputs and outputs, indirect indexing is lowered by the GLSL compiler. For temporaries, use alloca and disable the "promote-alloca" pass. In the future, we could switch all codepaths to alloca permanently and just rely on the "promote-alloca" pass. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: emit param exports after position exportsMarek Olšák2017-07-171-3/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move building parameter exports into a separate functionMarek Olšák2017-07-171-84/+78
| | | | | | Both loops now look simple. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use info.num_inputs when it's unusedMarek Olšák2017-07-171-1/+1
| | | | | | For clarity. It's only used by color interpolation. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add si_build_fs_interp helperMarek Olšák2017-07-171-61/+39
| | | | | | This is much simpler. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: merge si_llvm_get_amdgpu_target into ac_get_llvm_targetMarek Olšák2017-07-175-53/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallivm: inline gallivm_init_llvm_targetsMarek Olšák2017-07-172-18/+8
| | | | | | there is only one user. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't call gallivm_init_llvm_targetsMarek Olšák2017-07-171-1/+0
| | | | | | It's for initializing the native (x86) target. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: reallocate suballocated buffers when exportedMarek Olšák2017-07-172-1/+28
| | | | | | This should fix exports of suballocated buffers. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: flush the context after in-place texture realloc before exportMarek Olšák2017-07-171-0/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/va: Fix scaling list ordering for H.265Mark Thompson2017-07-173-7/+49
| | | | | | | | | | | | | Mesa here requires the scaling lists in diagonal scan order, but VAAPI passes them in raster scan order. Therefore, rearrange the elements when copying. v2: Move scan tables to vl_zscan.c. Fix type in size assertion. Cc: [email protected] Signed-off-by: Mark Thompson <[email protected]> Reviewed-by: Christian König <[email protected]>
* radv: advertise v6 of the wayland surface extensionEmil Velikov2017-07-171-1/+1
| | | | | | | | | | | | | Jason updated the Khronos spec to explicitly state that Wayland surfaces must support VK_PRESENT_MODE_MAILBOX_KHR. ANV did so since day one (back in 2015) Cc: [email protected] Cc: Bas Nieuwenhuizen <[email protected]> Cc: Dave Airlie <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: advertise v6 of the wayland surface extensionEmil Velikov2017-07-171-1/+1
| | | | | | | | | | | Jason updated the Khronos spec to explicitly state that Wayland surfaces must support VK_PRESENT_MODE_MAILBOX_KHR. ANV did so since day one (back in 2015) Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: use strtol to convert the integer deviceID overrideEmil Velikov2017-07-171-1/+1
| | | | | | | | | | | | | | | | One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE variable. A few symbolic names or a numerical value for the actual device ID is accepted. At the same time we're using strtod (string to double) to convert the string to a decimal numeral. A seeming thinko, made by the original commit that introduces the code in libdrm_intel and got here with the import. Fixes: 514db96c117a ("i965: Import libdrm_intel.") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium/u_blitter: don't use TXF for scaled blitsMarek Olšák2017-07-171-4/+6
| | | | | | | | | There seems to be a rounding difference with F2I vs nearest filtering. The precise problem in the rounding is unknown. This fixes an incorrect output with OpenMAX encoding. Reviewed-by: Nicolai Hähnle <[email protected]>
* anv: ensure device name contains terminating characterLionel Landwerlin2017-07-171-2/+2
| | | | | | | | | | v2: Use sizeof() (Chris) CID: 1415113 Reported-by: Grazvydas Ignotas <[email protected]> Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: miptree: silence coverity warningLionel Landwerlin2017-07-171-1/+1
| | | | | | | | | | This probably can't happen, but we're better off with initialized variables. CID: 1415114 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* mesa: flag _NEW_TEXTURE_OBJECT for GL_TEXTURE_LOD_BIAS_EXTMarek Olšák2017-07-171-1/+1
| | | | | | | Only the compatibility profile can set it. It was done incorrectly when we split _NEW_TEXTURE. Reviewed-by: Nicolai Hähnle <[email protected]>
* meta: Actually initialize ImmutableLevels to 1.Kenneth Graunke2017-07-171-0/+1
| | | | | | | | | | | | | | Otherwise, ImmutableLevels is 0, which is an illegal value. Later, _mesa_meta_setup_sampler will use _mesa_texture_parameteriv to set texObj->MaxLevel = CLAMP(params[0], texObj->BaseLevel, texObj->ImmutableLevels - 1); which turns into a completely bogus CLAMP(value, 0, -1)...where the upper bound is smaller than the lower bound. This ends up being -1 today due to the way CLAMP is implemented, which is a bogus MaxLevel. Reviewed-by: Ian Romanick <[email protected]>
* dri: Make classic drivers allow __DRI_CTX_FLAG_NO_ERROR.Kenneth Graunke2017-07-175-6/+7
| | | | | | | | | | | | | Grigori recently added EGL_KHR_create_context_no_error support, which causes EGL to pass a new __DRI_CTX_FLAG_NO_ERROR flag to drivers when requesting an appropriate context mode. driContextSetFlags() will already handle it properly for us, but the classic drivers all have code to explicitly balk at unknown flags. We need to let it through or they'll fail to create a no_error context. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]>
* ddebug: fix parsing of the pipelined modeSamuel Pitoiset2017-07-171-1/+1
| | | | | | | Trivial. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv: predicate cmask eliminate when using DCC.Dave Airlie2017-07-176-7/+153
| | | | | | | | | | | | | | | | | | When using DCC some clear values don't require a cmask eliminate step. This patch adds support for black and black with alpha 1, there are other values, but I don't have access to a comprehensive list. This works by setting the cmask eliminate predicate when doing the fast clear, and later when doing the cmask elimination making sure the draws are predicated. This increases the fps on Sascha Willems deferred. Tonga: 580fps->670fps on a Tonga PRO card. Polaris 730->850fps Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/clear: add r32g32b32a32 fast clear support (v2)Dave Airlie2017-07-172-2/+26
| | | | | | | | | | | | | We can only fast clear 128-bit images if the r/g/b channels are the same, and we are using DCC. For DCC we'll bail out on translate if this isn't true, and we catch cmask clears explicitly. v2: remove 64-bit block (Bas), add uint32 as well. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* amd/addrlib: fix typo in api name.Dave Airlie2017-07-1711-16/+16
| | | | | | | | This fixes the misspelling of ALIGNMENTS in addrlib. Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: set cb base tile swizzles for MRT speedups (v4)Dave Airlie2017-07-175-2/+34
| | | | | | | | | | | | | | | | | | | | This patch uses addrlib to workout the tile swizzles according to the surface index. It seems to produce the same values as amdgpu-pro for the deferred test. v2: don't apply swizzle to CMASK. the eg docs don't mention it, and we clearly don't align cmask for that. v3: disable surf index for dedicated images, as these will most likely be shared, and I don't think the metadata has space for this info in it yet. v4: update for shareable images, rename combined_swizzle to tile_swizzle This gets the deferred demo from 730->950fps on my rx480. (dcc cmask elim predication patches get it further) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: allow clear merging for depth/stencil with no care stencilDave Airlie2017-07-171-0/+3
| | | | | | | | | | | | Some of the Sascha Willems demos pick a D32/S8 format for the depth buffer, then do a LOAD_OP_CLEAR/LOAD_OP_DONT_CARE on it, which means we don't get to merge the undefined->depth and clear htile transitions. This add the stencil aspect to the pending clears if there is a depth clear pending and the stencil aspect is don't care. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Remove NV dedicated alloc extension.Bas Nieuwenhuizen2017-07-151-4/+0
| | | | | | | To not confuse apps in thinking it might be faster. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
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