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* anv,isl: Lower storage image formats in anvJason Ekstrand2016-06-222-7/+4
| | | | | | | | | | ISL was being a bit too clever for its own good and lowering the format for us. This is all well and good *if* we always want to lower it. However, the GL driver selectively lowers the format depending on whether the surface is write-only or not. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Allow for full 31-bit buffer texture sizesJason Ekstrand2016-06-221-1/+1
| | | | | | | | Ivy Bridge and above can handle up to 2^31 elements for RAW buffer surfaces. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Don't use designated initializers for buffer surface stateJason Ekstrand2016-06-221-23/+23
| | | | | Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Add assertions for buffer surface restrictionsJason Ekstrand2016-06-221-0/+11
| | | | | Acked-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Don't set SurfacePitch for gen9 1-D texturesJason Ekstrand2016-06-221-0/+3
| | | | | | | | This field is ignored by the hardware in this case and, on very large 1-D textures, it can end up being larger than the maximum allowed value. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Use TILEWALK_XMAJOR for linear surfaces on gen7Jason Ekstrand2016-06-221-2/+2
| | | | | | | | | This matches better what happens on gen8 where the "Tiled Surface" and "Tile Walke" bits are combined into a single two-bit value. This is also more consistent with what the GL driver does. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Emit no-op mip tail setup on SKLJason Ekstrand2016-06-221-0/+8
| | | | | | | | This hasn't ever been a problem in the past but it is recommended by the hardware docs. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Only set cube face enables if usage includes CUBE_BITJason Ekstrand2016-06-221-7/+9
| | | | | | | | It seems safe to set it all the time, but this reduces the diff between the way i965 does it and what ISL does. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Use the layout for computing qpitch rather than dimensionsJason Ekstrand2016-06-221-19/+15
| | | | | | | | | | For depth/stencil 1-D textures on SKL, we want them layed out in the old format that has been used since gen4. In order for the surface state fill-out code to handle, this it needs to distinguish based on layout rather than just dimensionality. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Set the IntegerSurfaceFormat bit on HaswellJason Ekstrand2016-06-221-0/+4
| | | | | | | This fixes 688 Vulkan CTS tests on Haswell. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/format: Mark R9G9B9E5 as containing 9-bit unsigned float channelsJason Ekstrand2016-06-221-1/+1
| | | | | Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Don't set RenderTargetViewExtent for texture surfacesJason Ekstrand2016-06-221-4/+18
| | | | | | | | | | The docs specify that this only matters for render targets and surfaces used with typed dataport messages. On some platforms (gen4-6) the Depth field has more bits than RenderTargetViewExtent so we can have textures with more levels than we can render to. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Set SurfaceArray based on the surface dimensionJason Ekstrand2016-06-221-1/+1
| | | | | | | | | | According to the PRM, you can't set SurfaceArray for 3D or buffer textures. There doesn't seem to be a good reason not to set it when we can. On the other hand, if we don't set it we can end up getting strange results for 1-layer array textures such as textureSize() returning the wrong results. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Don't force-disable L2 bypass for everythingJason Ekstrand2016-06-221-5/+0
| | | | | | | | | We already set the bit in the few cases where it's required by the docs so there's no need to set it all the time. This has no noticable perf impact for Dota 2 on Vulkan with the time demo I have. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Refactor the setup of clear colorsJason Ekstrand2016-06-221-18/+22
| | | | | | | | This commit switches clear colors to use #if's instead of a C if. This lets us properly handle SNB where the clear color field doesn't exist. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Refactor the per-gen isl_to_gen_h/valign tablesJason Ekstrand2016-06-221-6/+8
| | | | | | | | | This moves the #if's around so that halign and valign have different sets of #if conditions. This also prepares us for SNB because isl_to_gen_halign is not defined at all on gen6. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Return an extent3d from the halign/valign helperJason Ekstrand2016-06-221-22/+11
| | | | | Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Put pitch calculations togetherJason Ekstrand2016-06-221-22/+20
| | | | | | | This is purely cosmetic, but it makes things look a bit more readable. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Put all dimension setup together and towards the topJason Ekstrand2016-06-221-80/+74
| | | | | | | This is purely cosmetic, but it makes things look a bit more readable. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Put surface format setup at the topJason Ekstrand2016-06-221-7/+7
| | | | | | | This is purely cosmetic, but it makes things look a bit more readable. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Remove some unused fieldsJason Ekstrand2016-06-221-9/+0
| | | | | | | | They're already zero-initialized and we have no plans of doing anything more interesting with them. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* isl/state: Don't use designated initializers for the surface stateJason Ekstrand2016-06-221-47/+48
| | | | | | | | | While designated initializers are nice, they also force us to put some things in the initializer and some things later. Surface state setup is complicated enough that this really hurts readability in the long run. Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* genxml/gen8,9: Prefix the multisample format enum with MSFMTJason Ekstrand2016-06-223-12/+4
| | | | | | | This is what gen7 does and it's nice to have a prefix Reviewed-by: Chad Versace <[email protected]> Cc: "12.0" <[email protected]>
* i965/blorp: Only set src_z for gen8+ 3D texturesJason Ekstrand2016-06-221-2/+9
| | | | | | | | Otherwise, we end up with a bogus value in the third component. On gen6-7 where we always use 2D textures, this can cause problems if the SurfaceArray bit is set in the SURFACE_STATE. Acked-by: Chad Versace <[email protected]>
* i965/gen7,8: Set SURFACE_IS_ARRAY for all non-3D texture typesJason Ekstrand2016-06-222-2/+2
| | | | | | | | | There's no real reason why we shouldn't set this bit. It does affect how the sampler operates a bit but since you can have a 2D non-array view of a 2D_ARRAY texture that distinction is very weak. Also, this is what ISL will do and we would like this change to be isolated from using ISL. Reviewed-by: Chad Versace <[email protected]>
* i965/gen4: Subtract 1 from buffer sizesJason Ekstrand2016-06-221-3/+3
| | | | | | | | | The PRM states that the values put in Width, Height, and Depth should be various bits from the value size - 1. We seem to have done this wrong more-or-less from the start. Reviewed-by: Chad Versace <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* i965: Remove fake W-tiled render target supportJason Ekstrand2016-06-223-47/+9
| | | | | | | This hasn't been used since 1cfb4bc890b8 where we deleted the meta stencil blit path. Reviewed-by: Chad Versace <[email protected]>
* i965/fs: Use a default Y coordinate of 0 for TXF on gen9+Jason Ekstrand2016-06-221-0/+2
| | | | | | | | | | | Previously, we were incrementing length but not actually putting anything in the Y coordinate. This meant that 1-D TXF operations had a garbage array index. If the surface is emitted as 1-D non-array, the coordinate gets discarded and it works fine. If it happens to be bound as an array surface, it may count as an out-of-bounds array access and you get zero. Reviewed-by: Ian Romanick <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* i965/gen8: Use the qpitch from the aux_mt for AUX_QPITCHJason Ekstrand2016-06-221-2/+2
| | | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* i965/blorp/gen8: Use the correct max level and layer in emit_surface_statesJason Ekstrand2016-06-221-3/+2
| | | | | | | | | We were adding in the base which is wrong because the values given in the miptree are relative to zero and not the base layer/level. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* i965: Drop the maximum 3D texture size to 512 on Sandy BridgeJason Ekstrand2016-06-221-1/+10
| | | | | | | | | | | | | | The RenderTargetViewExtent field of RENDER_SURFACE_STATE is supposed to be set to the depth of a 3-D texture when rendering. Unfortunatley, that field is only 9 bits on Sandy Bridge and prior so we can't actually bind a 3-D texturing for rendering if it has depth > 512. On Ivy Bridge, this field was bumpped to 11 bits so we can go all the way up to 2048. On Iron Lake and prior, we don't support layered rendering and we use OffsetX/Y hacks to render to particular layers so 2048 is ok there too. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* i965/gen4-6: Handle gl_texture_object::BaseLevel and MinLayer correctlyJason Ekstrand2016-06-221-1/+3
| | | | | | | | | This is basically a direct translation of what we do for gen7. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83036 Cc: "11.1 11.2 12.0" <[email protected]>
* i965/gen4: Pull texture formats from the texture object not the miptreeJason Ekstrand2016-06-221-1/+1
| | | | | | | | | | | This makes texture views sort-of work. It doesn't add full texture view support for gen4-5 but it is enough to fix the GL_ARB_copy_image formats piglit test on Iron Lake. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83036 Cc: "11.1 11.2 12.0" <[email protected]>
* i965: Fix point size with tessellation/geometry shaders in GLES.Kenneth Graunke2016-06-224-9/+59
| | | | | | | | | | | | | Our previous code worked for desktop GL, and ES without geometry or tessellation shaders. But those features require fancier point size handling. Fortunately, we can use one rule for all APIs. Fixes a number of dEQP tests with EXT_tessellation_shader enabled: dEQP-GLES31.functional.tessellation_geometry_interaction.point_size.* Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Ilia Mirkin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* .mailmap: fix my main addressMarek Olšák2016-06-221-1/+1
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* i965: move vs outputs written into a helperTimothy Arceri2016-06-222-31/+47
| | | | | | | We will reuse this for fs key generation for the on disk shader cache. Reviewed-by: Iago Toral Quiroga <[email protected]>
* st/mesa: use a single memcpy in st_ReadPixels when possibleNicolai Hähnle2016-06-221-8/+15
| | | | | | | | This avoids costly address recomputations, function overhead, and may trigger large copy optimizations. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* glsl: only match gl_FragData and not gl_SecondaryFragDataEXTIlia Mirkin2016-06-211-2/+5
| | | | | | | | | | | | | There's special logic around finding gl_FragData. It latches onto any array with FRAG_RESULT_DATA0. However gl_SecondaryFragDataEXT[], added by GL_EXT_blend_func_extended, fits those parameters as well. The real frag data array should have index 0 though, so we can use that to distinguish them. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96617 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nv50,nvc0: fix start_instance in manual push pathIlia Mirkin2016-06-212-10/+22
| | | | | | | | | | The start instance is applied as an offset into the buffer directly, ignoring the divisor, not as an instance id offset that respects the divisor. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.2 12.0" <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* translate: fix start_instance parameter in sse versionIlia Mirkin2016-06-211-7/+7
| | | | | | | | | The generic version gets this right already, but this was using an incorrect formula in SSE. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.2 12.0" <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* anv/cmd: Dirty descriptor sets when a new pipeline is boundJason Ekstrand2016-06-211-0/+6
| | | | | | | | | Ever since c2581a9375ea, the binding table layout has depended on the pipeline. This means that whenever we change pipelines we also need to re-emit binding tables for the new layout. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* anv/cmd: Move emit_descriptor_pointers to genX_cmd_buffer.cJason Ekstrand2016-06-213-46/+42
| | | | | | | | It's tiny and fully generic so there's really no reason for it to be in a gen7-specific file. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* anv/cmd: Move flush_descriptor_sets to anv_cmd_buffer.cJason Ekstrand2016-06-214-50/+50
| | | | | | | There's no good reason for recompiling it Signed-off-by: Jason Ekstrand <[email protected]> Cc: "12.0" <[email protected]>
* spirv: Use the system value version of gl_FrontFaceJason Ekstrand2016-06-211-2/+2
| | | | | | | | | | SPIR-V treats it as an input but NIR wants the system value. This shouldn't have been too much of a surprise given that we have to do the same conversion in the GLSL IR to NIR pass. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* i965: Reorganize prog_data->total_scratch code a bit.Kenneth Graunke2016-06-211-16/+19
| | | | | | Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* radeonsi: add a debug flag for unsafe math LLVM optimizationsMarek Olšák2016-06-213-0/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use u_blitter for mipmap generationMarek Olšák2016-06-212-1/+32
| | | | | | | | This reduces time spend in glGenerateMipmap by a half. v2: don't decompress the levels to be overwritten Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_blitter: implement mipmap generationMarek Olšák2016-06-212-114/+238
| | | | | | | | | for pipe_context::generate_mipmap first move some of the blit code from util_blitter_blit_generic to a separate function, then use it from util_blitter_generate_mipmap Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: cache staging texture for glReadPixelsNicolai Hähnle2016-06-214-14/+110
| | | | | | v2: add ST_DEBUG flag for disabling (suggested by Ilia) Reviewed-by: Marek Olšák <[email protected]> (v1)
* st/mesa: invalidate readpixels cacheNicolai Hähnle2016-06-2112-0/+17
| | | | | | | Whenever a draw happens or some other function call might change the result of future glReadPixels calls, we must invalidate the cache. Reviewed-by: Marek Olšák <[email protected]>