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* mesa/get: Add TYPE_UINT for casting through a GLuint.Kenneth Graunke2016-12-191-0/+80
| | | | | | | | | | | | | | | | | The "State Tables" section of the OpenGL specification lists many values as belonging to Z+ (non-negative integers), not Z (all integers). For ordinary glGetInteger queries, this doesn't matter. However, when accessing Z+ values via glGetFloat or glGetInteger64, we need to treat the source value as an unsigned value. Otherwise, we'll produce a negative number when bit 31 is set. This commit merely adds the plumbing. It doesn't convert any values. v2: Gotta catch 'em all (add missing cases caught by Ilia) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* mesa/get: Make GetFloat/GetDouble of TYPE_INT_N not normalize things.Kenneth Graunke2016-12-191-3/+3
| | | | | | | | | | | | | | | | | GetFloat of integer valued things is supposed to perform a simple int -> float conversion. INT_TO_FLOAT is not that. Instead, it converts [-2147483648, 2147483647] to a normalized [-1.0, 1.0] float. This is only used for COMPRESSED_TEXTURE_FORMATS, which nobody in their right mind would try and access via glGetFloat(), but we may as well fix it. Found by inspection. v2: Gotta catch 'em all (fix another case of this caught by Ilia) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* Revert "cso: don't release sampler states that are bound"Michel Dänzer2016-12-191-3/+1
| | | | | | | This reverts commit 6dc96de303290e8d1fc294da478c4f370be98dea. No longer necessary with the previous change. Reviewed-by: Nicolai Hähnle <[email protected]>
* cso: Make sanitize_hash safe for samplersMichel Dänzer2016-12-191-1/+43
| | | | | | | | Remove currently bound sampler states from the hash table before pruning entries from the hash table, so they cannot accidentally be deleted by the pruning. Reviewed-by: Nicolai Hähnle <[email protected]>
* cso: Store hash key in struct cso_samplerMichel Dänzer2016-12-192-0/+2
| | | | | | Preparation for following changes, no functional change intended. Reviewed-by: Nicolai Hähnle <[email protected]>
* cso: Optimize cso_save/restore_fragment_samplersMichel Dänzer2016-12-191-4/+17
| | | | | | | | | Only copy/memset the pointers that actually need to be. v2: * Cast info->nr_samplers to int for calculating delta (Nicolai) Reviewed-by: Nicolai Hähnle <[email protected]>
* cso: Store pointers to struct cso_sampler in struct sampler_infoMichel Dänzer2016-12-191-15/+18
| | | | | | Preparation for following changes, no functional change intended. Reviewed-by: Nicolai Hähnle <[email protected]>
* cso: Don't restore nr_samplers in cso_restore_fragment_samplersMichel Dänzer2016-12-191-1/+0
| | | | | | | | | | If info->nr_samplers > ctx->nr_fragment_samplers_saved, the assignment would prevent cso_single_sampler_done from unbinding the no longer used samplers from the driver, which could result in use-after-free. This is probably unlikely to happen in practice though. Cc: "12.0 13.0" <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* EGL/android: Enhance pbuffer implementationLiu Zhiquan2016-12-191-81/+96
| | | | | | | | | | | | | | | Some dri drivers will pass multiple bits in buffer_mask parameter to droid_image_get_buffer(), more than the actual supported buffer type combination. For such case, will go through all the bits, and will not return error when unsupported buffer is requested, only return error when the allocation for supported buffer failed. v2: coding style and log changes v3: coding style changes and update patch format Signed-off-by: Liu Zhiquan <[email protected]> Signed-off-by: Long, Zhifang <[email protected]> Reviewed-by: Tomasz Figa <[email protected]>
* radv: Use correct workgroup size limits.Bas Nieuwenhuizen2016-12-181-4/+4
| | | | | | | Not sure where the 16k comes from, but pretty sure 2k is the max. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: expose the compute queueDave Airlie2016-12-181-11/+41
| | | | | | | v2: Don't expose the SDMA queue and use the CIK check also in the second if. (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Only emit PFP ME syncs for DMA on the GFX queue.Bas Nieuwenhuizen2016-12-181-2/+2
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Create an empty CS per ring type.Bas Nieuwenhuizen2016-12-182-7/+20
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't enable CMASK on compute queues.Bas Nieuwenhuizen2016-12-184-8/+62
| | | | | | | We can't fast clear on compute queues. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use RELEASE_MEM packet for MEC timestamp query.Bas Nieuwenhuizen2016-12-182-9/+21
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement indirect dispatch for the MEC.Bas Nieuwenhuizen2016-12-181-9/+17
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: update vkCmdUpdateBuffer for the MEC.Bas Nieuwenhuizen2016-12-181-1/+3
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement cache flushing for the MEC.Bas Nieuwenhuizen2016-12-181-7/+29
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: add semaphore supportDave Airlie2016-12-183-11/+72
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: pass queue index into winsys submissionDave Airlie2016-12-183-5/+13
| | | | | | This is so we can submit on separate queues if needed Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: init compute queue and avoid initing transfer queuesDave Airlie2016-12-183-15/+35
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: Make WaitIdle queue aware.Bas Nieuwenhuizen2016-12-185-21/+38
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/meta: update header infoDave Airlie2016-12-181-1/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: hook compute clears into clear image api.Dave Airlie2016-12-181-8/+33
| | | | | | | | These aren't used yet but we will want to use them when we implement a separate compute queue. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: clear image implementation for compute queueDave Airlie2016-12-183-9/+272
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/meta: split clear image out into a separate layer clear functionDave Airlie2016-12-181-117/+128
| | | | | | This will make it easier to add support for clears on compute queues. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: implement image->image copies using compute shaderDave Airlie2016-12-184-6/+343
| | | | | | | | | | This is required for having a separate compute queue, we probably can't use this on GFX queue due to DCC. v2: Set coord_components = 2 for itoi texture fetch. (Bas) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add a compute shader implementation for buffer to imageDave Airlie2016-12-183-6/+325
| | | | | | | | | | | This implements the reverse of the current buffer->image path and can be used when we need to do image transfer on compute queues This just adds the code turned off as we don't support separate computes queues yet, and we don't want to use this path on the GFX queues for DCC reasons. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Use correct pitch for views with different block size.Bas Nieuwenhuizen2016-12-181-1/+4
| | | | | | | | | Needed when accessing a comrpessed texture as R32G32B32A32 from a shader. This was not encountered previously, as we used the CB for the reinterpretation, which does not use this pitch. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Store queue family in command buffers.Dave Airlie2016-12-182-2/+35
| | | | | | v2: Added helper (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: start fixing up queue allocate for multiple queuesDave Airlie2016-12-182-15/+53
| | | | | | v2: Fix error handling and zero init the device (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: start adding support for DMA/compute queueDave Airlie2016-12-181-5/+20
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: Expose number of compute/dma rings.Bas Nieuwenhuizen2016-12-182-2/+15
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* freedreno/a5xx: border color supportRob Clark2016-12-181-3/+160
| | | | | | | Not 100% sure it works if you have border color in VS.. but it might be right. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: use MRT0 to import linear zsRob Clark2016-12-181-5/+20
| | | | | | | | | | | A bit of a hack, but we need to do this until we can do tiled zs in sysmem (and associated tile/until blits for transfer_map). Fixes xonotic and glmark2 "refract", when reorder wasn't enabled. (reorder would paper over the issue by avoiding the extra round- trip to system memory and back to gmem. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fdN_gmem_restore_format() is not gen specificRob Clark2016-12-188-50/+25
| | | | | | | | | | Refactor out into a common helper, since this is the same across generations when we need equiv z/s gmem restore format. Next patch needs this in a5xx, rather than creating yet another helper push this into core. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: cargo-cult end-batch sequence more faithfullyRob Clark2016-12-184-4/+39
| | | | | | | Fixes some issues at least with GMEM bypass mode, where we'd sometimes end up with some FS quads not hitting memory. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: misc fixRob Clark2016-12-181-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix (at least some) vtx formatsRob Clark2016-12-181-1/+1
| | | | | | | | | Swap/component-order doesn't seem to be quite what that is. At least blob was always setting it to XYZW ('11') but we weren't. Causing problems w/ formats like sint16.. Hard-coding this instead at least seems to get glamor working. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: more formatsRob Clark2016-12-181-25/+25
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fixup capsRob Clark2016-12-182-6/+11
| | | | | | | | | | Might not be 100% accurate, mostly just copy from a4xx to get started. We are defn lying about occlusion query at this point (not implemented yet) but need it to expose anything higher than gl1.4 (glamor needs gl2.1) Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix random faults on first sysmem drawRob Clark2016-12-181-0/+3
| | | | | | | | Not sure what this event is, but blob writes it.. and it seems to solve random write faults at mystery address that would sometimes happen on first BYPASS draw. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-12-186-17/+80
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix stride/size for mem->gmem blitsRob Clark2016-12-181-5/+7
| | | | | | <brownpaperbag>these should be the in-GMEM dimensions</brownpaperbag> Signed-off-by: Rob Clark <[email protected]>
* radv/winsys: consolidate request->fence codeDave Airlie2016-12-171-22/+19
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: handle fence allocation failingDave Airlie2016-12-171-1/+4
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Don't bail out on pipeline create failure.Bas Nieuwenhuizen2016-12-171-21/+17
| | | | | | | | | | | | | | The spec says we have to try to create all, and only set failed pipelines to VK_NULL_HANDLE. If one of them fails, we have to return an error, but as far as I can see, the spec does not care which of the suberrors. Fixes dEQP-VK.api.object_management.alloc_callback_fail_multiple.compute_pipeline dEQP-VK.api.object_management.alloc_callback_fail_multiple.graphics_pipeline Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* spirv/nir: add support for ImageGatherExtendedIlia Mirkin2016-12-161-7/+69
| | | | | | | | | | The strategy is to do the same thing that the GLSL lower_offset_arrays pass does - create 4 separate texture gather ops, one per offset, and read in the results from each gather's w component to recreate the desired result. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* anv: Fix uniform and storage buffer offset alignment limits.Francisco Jerez2016-12-161-2/+2
| | | | | | | | | | | | | | | | | | | | | This fixes a regression in a bunch of image store vulkan CTS tests from commit ad38ba113491869ab0dffed937f7b3dd50e8a735, which started using OWORD block read messages to implement UBO loads. The reason for the failure is that we were giving bogus buffer alignment limits to the application (1B), so the CTS would happily come back with descriptor sets pointing at not even word-aligned uniform buffer addresses. Surprisingly the sampler messages used to fetch pull constants before that commit were able to cope with the non-texel aligned addresses, but the dataport messages used to fetch pull constants after that commit and the ones used to access storage buffers (before and after the same commit) aren't as permissive with unaligned addresses. Cc: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99097 Reported-by: Mark Janes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Remove nir_array from lower_locals_to_regsThomas Helland2016-12-161-9/+0
| | | | | | | | We do nothing but initialize it, add to it, and delete it. This is a fallout from removing constant initializer support. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
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