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* i965: Use atomic ops in get_new_program_id().Kenneth Graunke2017-09-252-6/+1
| | | | | | | | | | | | | We have a nice utility function for this, which eliminates the need for locking stuff. This isn't really performance critical, but it's less code to use the atomic. p_atomic_inc_return does pre-increment rather than post-increment, so we change screen->program_id to be initialized to 0 instead of 1. At which point, we can just delete the initialization because intel_screen is rzalloc'd. Reviewed-by: Chris Wilson <[email protected]>
* i965: Convert brw_bufmgr to use C11 mutexes instead of pthreads.Kenneth Graunke2017-09-251-18/+17
| | | | | | | There's no real advantage or disadvantage here, it's just for stylistic consistency with the rest of the codebase. Reviewed-by: Chris Wilson <[email protected]>
* i965: Delete dead meta stencil blit program fields from brw_context.Kenneth Graunke2017-09-251-3/+0
| | | | These have been unused for a while now.
* swr/rast: Handle instanceID offset / Instance Stride enableTim Rowley2017-09-251-7/+39
| | | | | | | | | | Supported in JitGatherVertices(); FetchJit::JitLoadVertices() may require similar changes, will need address this if it is determined that this path is still in use. Handle Force Sequential Access in FetchJit::Create. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Remove code supporting legacy llvm (<3.9)Tim Rowley2017-09-253-105/+15
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix allocation of DS output data for USE_SIMD16_FRONTENDTim Rowley2017-09-251-10/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Slightly more efficient blend jitTim Rowley2017-09-251-20/+10
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Properly sized null GS bufferTim Rowley2017-09-251-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Move SWR_GS_CONTEXT from thread local storage to stackTim Rowley2017-09-251-12/+11
| | | | | | | Move structure, as the size is significantly reduced due to dynamic allocation of the GS buffers. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fetch compile state changesTim Rowley2017-09-252-1/+12
| | | | | | | Add ForceSequentialAccessEnable and InstanceIDOffsetEnable bools to FETCH_COMPILE_STATE. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: New GS state/context APITim Rowley2017-09-253-212/+253
| | | | | | | One piglit regression, which was a false pass: [email protected]@execution@geometry@dynamic_input_array_index Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add support for R10G10B10_FLOAT_A2_UNORM pixel formatTim Rowley2017-09-253-17/+28
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* radv: save/restore all viewports/scissors for meta operationsSamuel Pitoiset2017-09-253-25/+43
| | | | | | | | | | | | | | | | | | | | This is needed since we don't update the number of viewports/scissors when they are set dynamically (according to the spec). In the following scenario: * vkCmdSetViewport() * vkCmdClearColorImage() (or any other meta operations) The viewports/scissors weren't saved correctly because no pipeline was bound before, and thus the number of viewports/scissors were 0. This fixes a regression with: dEQP-VK.draw.negative_viewport_height.front_ccw_cull_back Fixes: 60878dd00c ("radv: do not update the number of viewports in vkCmdSetViewport()") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* docs: update calendar, add news item and link release notes for 17.1.10Juan A. Suarez Romero2017-09-253-7/+7
| | | | Signed-off-by: Juan A. Suarez Romero <[email protected]>
* docs: add sha256 checksums for 17.1.10Juan A. Suarez Romero2017-09-251-1/+2
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 60df95c6bd8c8cc0d440f3940bbbe936d490c67d)
* docs: add release notes for 17.1.10Juan A. Suarez Romero2017-09-251-0/+154
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 834d6c60db266c7d7dfd973729f20379dd3da287)
* git_sha1_gen: fix output on python3Eric Engestrom2017-09-251-1/+1
| | | | | | | | | | | | | | | | String handling has changed on python3. Before this patch, on python3: #define MESA_GIT_SHA1 "git-b'b99dcbfeb3'" After: #define MESA_GIT_SHA1 "git-b99dcbfeb3" (No change on python2, it always looked ok) Cc: Jose Fonseca <[email protected]> Fixes: b99dcbfeb344390fea99 "build: Convert git_sha1_gen script to Python." Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* st/va/postproc: implement the DRM prime grabberLeo Liu2017-09-251-2/+16
| | | | Acked-by: Christian König <[email protected]>
* vl/compositor: convert RGB buffer to YUV with color conversionLeo Liu2017-09-252-0/+81
| | | | Acked-by: Christian König <[email protected]>
* vl/csc: add a RGB to YUV CSC matrixLeo Liu2017-09-252-1/+11
| | | | Acked-by: Christian König <[email protected]>
* vl/compositor: create RGB to YUV fragment shaderLeo Liu2017-09-252-0/+51
| | | | Acked-by: Christian König <[email protected]>
* st/va/postproc: use progressive target buffer for scalingLeo Liu2017-09-251-0/+18
| | | | | | | | | Scaling between interlaced buffers, esp. for scale-up, because blit will scale up top filed and bottom field separately. it'll result in the weaving for these buffer with lack of accuracy. So use shader deint for the case. Acked-by: Christian König <[email protected]>
* st/va: make internal func vlVaHandleSurfaceAllocate() call simplerLeo Liu2017-09-253-7/+4
| | | | Acked-by: Christian König <[email protected]>
* st/va/postproc: add a full NV12 deint support from buffer I to PLeo Liu2017-09-251-1/+21
| | | | | | | | | | | Before it's impossible to transcode an interlaced video, becasue if in order for encoder to work, we have to force buffer to progessive, but the deint with buffer from I to P is missing. Now along With the new YUV deint full function, it works with weave and bob deint. Also this will benefit transcoding video with scaling parameters. Acked-by: Christian König <[email protected]>
* vl/compositor: add Bob top and bottom to YUV deint functionLeo Liu2017-09-251-6/+28
| | | | Acked-by: Christian König <[email protected]>
* vl/compositor: remove vl_compositor_yuv_deint() functionLeo Liu2017-09-252-40/+0
| | | | | | No longer used. Acked-by: Christian König <[email protected]>
* st/va: use new vl_compositor_yuv_deint_full() to deintLeo Liu2017-09-251-3/+11
| | | | | | | We also set src rectangle explicitly just in case of the mismatch of size between interlaced buffer and progressive buffer Acked-by: Christian König <[email protected]>
* st/omx: use new vl_compositor_yuv_deint_full() to deintLeo Liu2017-09-251-2/+9
| | | | | | v2: add dst rect to make sure no scale Acked-by: Christian König <[email protected]>
* vl/compositor: add a new function for YUV deintLeo Liu2017-09-252-0/+42
| | | | | | | It will replace previous deint function with abilities of scaling and field deinterlacing Acked-by: Christian König <[email protected]>
* vl/compositor: extend YUV deint function to do field deintLeo Liu2017-09-252-12/+26
| | | | | | It will add Bob deint ability to interlaced video for HW encoder Acked-by: Christian König <[email protected]>
* vl/compositor: separate YUV part from shader video buffer functionLeo Liu2017-09-251-13/+18
| | | | | | So that it can be re-used Acked-by: Christian König <[email protected]>
* st/va/postproc: use video original size for postprocessingLeo Liu2017-09-251-6/+8
| | | | | | | Otherwise the aligned size will make video scaled Cc: [email protected] Reviewed-by: Christian König <[email protected]>
* radv: Fix VK_KHR_image_format_list.Bas Nieuwenhuizen2017-09-251-1/+3
| | | | | | | Spec adding corner cases ... Fixes: 969537d9358 "radv: Add support for more DCC compression with VK_KHR_image_format_list." Reviewed-by: Dave Airlie <[email protected]>
* Revert "Revert "radv: fallback to an in-memory cache when no pipline cache ↵Bas Nieuwenhuizen2017-09-253-8/+15
| | | | | | | | | | | | | is provided"" I tested this 10 times with ./deqp-vk --deqp-case=dEQP-VK.texture.filtering.3d.formats.r4g4b4a4* and one full run of CTS, seems the issue is gone. Also reduces CTS runtime by 30% or so. Reviewed-by: Timothy Arceri <[email protected]>
* scons: use python3-compatible exceptionsEric Engestrom2017-09-253-4/+4
| | | | | | These changes were generated using python's `2to3` tool. Signed-off-by: Eric Engestrom <[email protected]>
* scons: use python3-compatible generatorEric Engestrom2017-09-251-4/+2
| | | | | | | These changes were generated using python's `2to3` tool. Suggested-by: Ilia Mirkin <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* scons: use python3-compatible listsEric Engestrom2017-09-252-6/+5
| | | | | | | These changes were generated using python's `2to3` tool. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* scons: use python3-compatible list-key checkEric Engestrom2017-09-251-5/+5
| | | | | | These changes were generated using python's `2to3` tool. Signed-off-by: Eric Engestrom <[email protected]>
* scons: use python3-compatible print()Eric Engestrom2017-09-258-30/+30
| | | | | | | | | These changes were generated using python's `2to3` tool. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102852 Reported-by: Alex Granni <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* radv: init the trace BO before compiling meta shadersSamuel Pitoiset2017-09-251-5/+5
| | | | | | | Otherwise, the disasm string is NULL for meta shaders. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make radv_pipeline_init() staticSamuel Pitoiset2017-09-252-8/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove unused variable in radv_dump_annotated_shader()Samuel Pitoiset2017-09-251-1/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make use of ATI_VENDOR_ID everywhereSamuel Pitoiset2017-09-254-5/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv: fix viewport transformation for z componentSamuel Iglesias Gonsálvez2017-09-251-2/+2
| | | | | | | | | | | | | | | | | | In Vulkan, for 'z' (depth) component, the scale and translate values for the viewport transformation are: pz = maxDepth - minDepth oz = minDepth zf = pz × zd + oz Being zd, the third component in vertex's normalized device coordinates. Fixes: dEQP-VK.draw.inverted_depth_ranges.* Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: [email protected]
* radv: add gfx9 scissor workaroundDavid Airlie2017-09-241-0/+5
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: 17.2 <[email protected]>
* glx: Sort the GLX extension bit enum and tableAdam Jackson2017-09-222-23/+23
| | | | | | | | Not quite asciibetical: ARB, then EXT, then vendor, just like the GL extension enum just below. No functional change, but it bothered me. Signed-off-by: Adam Jackson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* etnaviv: Add missing includes after 6ace0b8Wladimir J. van der Laan2017-09-221-0/+2
| | | | | | | | | | Add missing includes after 6ace0b8 (etnaviv: don't enable RT full-overwrite when logicop is enabled), otherwise the etnaviv driver won't build because of missing macros. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Tested-by: Andres Gomez <[email protected]>
* etnaviv: fix 16bpp clearsLucas Stach2017-09-221-1/+1
| | | | | | | | | | | | | | | util_pack_color may leave undefined values in the upper half of the packed integer. As our hardware needs the upper 16 bits to mirror the lower 16bits, this breaks clears of those formats if the undefined values aren't masked off. I've only observed the issue with R5G6B5_UNORM surfaces, other 16bpp formats seem to work fine. Fixes: d6aa2ba2b2 (etnaviv: replace translate_clear_color with util_pack_color) Cc: [email protected] Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* swr/rast: remove llvm fence/atomics from generated filesTim Rowley2017-09-221-0/+8
| | | | | | | | | | | We currently don't use these instructions, and since their API changed in llvm-5.0 having them in the autogen files broke the mesa release tarballs which ship with generated autogen files. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102847 CC: [email protected] Tested-by: Laurent Carlier <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* vulkan: enum generator: Generate entries for extended enumsJason Ekstrand2017-09-221-8/+40
| | | | Reviewed-by: Dylan Baker <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 19:07:30 +0000