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* st_glsl_to_tgsi: don't try and pass 32-bit values to get_deref_offsetsDave Airlie2017-06-131-3/+6
| | | | | | | | | Just use a temporary 16-bit index. This fixes coverity issue, pointed to me by Ilia. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* u_dynarray: fix coverity warning about ignoring return value from rerallocDave Airlie2017-06-131-1/+1
| | | | | | | | >>> Ignoring storage allocated by "reralloc_size(buf->mem_ctx, buf->data, buf->size)" leaks it. Reviewed-by: Thomas Helland<[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* glsl/lower_distance: only set max_array_access for 1D clip dist arraysDave Airlie2017-06-121-1/+1
| | | | | | | | | | | | | | The max_array_access field applies to the first dimension, which means we only want to set it for the 1D clip dist arrays. This fixes an ir_validate assert seen with KHR-GL44.cull_distance.functional on nouveau and radeon with debug builds. Fixes: a08c4ebbe (glsl: rewrite clip/cull distance lowering pass) Reviewed-by: Timothy Arceri <[email protected]> Tested-by: Tobias Klausmann <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: fix missing breakLionel Landwerlin2017-06-121-0/+1
| | | | | | | | | Pretty obvious missing break statement. CID: 1412564 Fixes: 641405f797 "i965: Use the new tracking mechanism for HiZ" Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed by: Elie Tournier <[email protected]>
* radeonsi: pack si_context betterMarek Olšák2017-06-121-18/+18
| | | | | | there isn't much to gain here Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack si_framebuffer betterMarek Olšák2017-06-123-8/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack si_sampler_view betterMarek Olšák2017-06-121-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack si_buffer_resources betterMarek Olšák2017-06-121-4/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack struct si_descriptors betterMarek Olšák2017-06-121-15/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack struct si_vertex_elements betterMarek Olšák2017-06-121-9/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: replace si_vertex_elements::elements with separate fieldsMarek Olšák2017-06-124-14/+14
| | | | | | It makes si_vertex_elements a little smaller. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename si_vertex_element -> si_vertex_elementsMarek Olšák2017-06-124-6/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: allocate si_state_rasterizer::pm4_poly_offset only when neededMarek Olšák2017-06-122-2/+14
| | | | | | Each element has over 700 bytes. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: pack si_state_rasterizer fieldsMarek Olšák2017-06-121-16/+16
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove 8 bytes from si_shader_key with uint32_t ff_tcs_inputs_to_copyMarek Olšák2017-06-123-5/+14
| | | | | | The previous patch helps with this. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use uint32_t to declare si_shader_key.opt.kill_outputsMarek Olšák2017-06-123-6/+10
| | | | | | the next patch will benefit from this Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove 8 bytes from si_shader_key by flattening opt.hw_vsMarek Olšák2017-06-124-16/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't emit DB_STENCIL_CONTROL if it has no effectMarek Olšák2017-06-121-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix missing num_L2_invalidates incrementMarek Olšák2017-06-121-0/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: get rid of more compressed_colortex_mask namesMarek Olšák2017-06-124-18/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/noop: fix sampler viewsMarek Olšák2017-06-121-0/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/docs: clarify gen_name/get_vendor/get_device_vendor behaviorMarek Olšák2017-06-121-0/+9
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: call check_program_state only when neededMarek Olšák2017-06-121-2/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: set pipe_context::priv = NULLMarek Olšák2017-06-121-1/+2
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101254 Reviewed-by: Nicolai Hähnle <[email protected]>
* vl,omx,va,vdpau,xvmc: don't set the priv pointer in context_createMarek Olšák2017-06-126-7/+7
| | | | | | Unused and radeonsi ignores it anyway. Acked-by: Nicolai Hähnle <[email protected]>
* r600/eg: distribute egd_tables.py in the dist fileJuan A. Suarez Romero2017-06-121-0/+4
| | | | | | Otherwise, `make distcheck` will fail. Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: include gen4_blorp_exec.h into EXTRA_DISTJuan A. Suarez Romero2017-06-121-0/+1
| | | | | | Otherwise, `make distcheck` will fail. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Call intel_prepare_render() from intel_update_state()Kenneth Graunke2017-06-121-0/+2
| | | | | | | | | | | | | | | | | | | The resolve code looks at the current color draw buffers. These are not valid until intel_prepare_render() is called. You can end up with one color buffer bound, but where the renderbuffer has zero width/height and no miptree allocated. You can get a call chain like: _mesa_Clear -> _mesa_update_state -> intel_update_state, where no brw driver hooks were called, so there is no other point at which we could have called this. Fixes crashes in KWin where Clear was causing intel_disable_rb_aux_buffer to crash on irb != NULL but irb->mt == NULL. According to Tapani, this also fixes crashes seen on Android. Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Tapani Pälli <[email protected]>
* radv: fix trace dumping for !use_ib_bosGrazvydas Ignotas2017-06-111-3/+11
| | | | | | | | Fixes trace dumping crash for SI or when RADV_DEBUG=noibs is set. Fixes: 97dfff5410 "radv: Dump command buffer on hang." Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: don't even attempt to prefetch on SIGrazvydas Ignotas2017-06-111-7/+16
| | | | | | | | | | | | Before bcae327469 this was emitting CP DMA packet even on SI, but apparently hasn't caused too many problems. After that commit the CP DMA code now always sets the CIK+ only bit for prefetch. Just follow radeonsi there and don't try to prefetch at all. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101334 Fixes: bcae327469 "radv: realign cp dma code with radeonsi" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: assert on CP_DMA_USE_L2 for SIGrazvydas Ignotas2017-06-111-0/+1
| | | | | | | | The register header (and radeonsi comment) states V_411_SRC_ADDR_TC_L2 is for CIK+ only, so let's assert on earlier ASICs. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl/android: support for EGL_KHR_partial_updateHarish Krupo2017-06-1116-0/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the EGL_KHR_partial_update extension for android platform. It passes 36/37 tests in dEQP for EGL_KHR_partial_update. 1 test not supported. v2: add fallback for eglSetDamageRegionKHR (Tapani) v3: The native_window_set_surface_damage call is available only from Android version 6.0. Reintroduce the ANDROID_VERSION guard and advertise extension only if version is >= 6.0. (Emil Velikov) v4: use newly introduced ANDROID_API_LEVEL guard rather than ANDROID_VERSION guard to advertise the extension.The extension is advertised only if ANDROID_API_LEVEL >= 23 (Android 6.0 or greater). Add fallback function for platforms other than Android. Fix possible math overflow. (Emil Velikov) Return immediately when n_rects is 0. Place function's entrypoint in alphabetical order. (Eric Engestrom) v5: Replace unnecessary calloc with malloc (Eric) Check for BAD_ALLOC error (Emil) Check for error in native_window_set_damage_region. (Emil, Tapani, Eric). Signed-off-by: Harish Krupo <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* gallium: fixed modulo zero crashes in tgsi interpreter (v2)Marius Gräfe2017-06-101-20/+20
| | | | | | | | | | | | | softpipe throws integer division by zero exceptions on windows when using % with integers in a geometry shader. v2: Made error results consistent with existing div/mod zero handling in tgsi. 64 bit signed integer division by zero returns zero like in micro_idiv, unsigned returns ~0u like in micro_udiv. Modulo operations always set all result bits to one (like in micro_umod). Reviewed-by: Roland Scheidegger <[email protected]>
* nir: make various getters take const pointersGrazvydas Ignotas2017-06-102-13/+14
| | | | | | | | This will allow to constify other things. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965/cnl: Add a preliminary device for CannonlakeBen Widawsky2017-06-092-0/+58
| | | | | | | | | | | | | | | | v2 (Anuj): Rebased on master and updated pci ids Remove redundant initialization of max_wm_threads to 64 * 12. For gen9+ max_wm_threads are initialized in gen_get_device_info(). v3 (Anuj): Move the patch to end of series. Remove unused gt1, gt2, gt3 functions. Remove l3_banks variable. Variable is now available on master. Signed-off-by: Anuj Phogat <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* anv: Don't advertise support on anything above gen9Jason Ekstrand2017-06-091-1/+1
| | | | | | | This will prevent the driver from even trying to work on Cannon Lake until we get actual support added. Reviewed-by: Anuj Phogat <[email protected]>
* i965/cnl: Enable CCS_E and RT support for few formatsAnuj Phogat2017-06-091-9/+9
| | | | | | Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Reformat surface_format_info table to accomodate gen10+Anuj Phogat2017-06-091-263/+263
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3Anuj Phogat2017-06-095-4/+34
| | | | | | | | | | v1: By Ben Widawsky <[email protected]> v2: v1 had an assert only for VS. Add the restriction for GS, HS and DS as well and make sure the allocated sizes are not multiple of 3. v3: Move the entry_size checks in to compiler code (Ken) Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/cnl: Don't resolve single sampled color rb in case of sRGB formatsAnuj Phogat2017-06-091-1/+1
| | | | | | | | As sRGB now supports lossless compression, we also need to stop resolving single sampled color render buffers for sRGB formats in Gen 10. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Implement depth count workaroundBen Widawsky2017-06-091-0/+8
| | | | | Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Start using CNL MOCS definesAnuj Phogat2017-06-094-4/+16
| | | | | | | | CNL MOCS defines are duplicates of SKL MOCS defines. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Handle gen10 in switch cases across the driverAnuj Phogat2017-06-098-1/+24
| | | | | | | | | V2: Start using gen10 functions isl_gen10*(), gen10_blorp_exec() gen10_init_atoms() (Jason) Remove Vulkan changes. Do them later in a separate patch. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Update few assertionsAnuj Phogat2017-06-092-2/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Add cnl bits in aubinatorAnuj Phogat2017-06-091-3/+5
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Add pci id for INTEL_DEVID_OVERRIDEAnuj Phogat2017-06-091-0/+1
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Wire up android Mesa build files for gen10Anuj Phogat2017-06-094-1/+69
| | | | | | | | Signed-off-by: Anuj Phogat <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Mauro Rossi <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965/cnl: Wire up Mesa build files for gen10Anuj Phogat2017-06-095-4/+27
| | | | | | | | V2: Remove isl_gen10.c and isl_gen10.h Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* intel/genxml: Update genx_bits for gen10+Anuj Phogat2017-06-091-4/+2
| | | | | | | | | | | This commit adds a gen10 case to the switch statement and drops some unneeded code for handling gen numbers which doesn't work on gen10 and above. V2: Drop "z = float(z)" and the "z *= 10" lines Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Add gen10 specific function declarationsAnuj Phogat2017-06-093-0/+15
| | | | | | | | | These declarations will help the code start compiling once we wire up the makefiles for gen10. Later patches will start using these functions for gen10. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
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