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* i965: Enable compressed multisample support (CMS) on Broadwell.Kenneth Graunke2014-06-261-8/+0
| | | | | | | Everything is in place and appears to be working. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Add 2x MSAA support to the MCS allocation function.Kenneth Graunke2014-06-261-0/+1
| | | | | | | 2x MSAA also uses 8 bits, just like 4x. More bits are unused. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.Kenneth Graunke2014-06-261-0/+10
| | | | | | | | | MCS buffers are never allocated on Broadwell, so this does nothing for now, but puts the infrastructure in place for when they do exist. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Drop SINT workaround for CMS layout on Broadwell.Kenneth Graunke2014-06-261-3/+1
| | | | | | | | | According to the documentation, we don't need this SINT workaround on Broadwell. (Or at least, it doesn't mention that we need it.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Add plumbing for Broadwell's auxiliary surface support.Kenneth Graunke2014-06-261-7/+37
| | | | | | | | | | | | | | Broadwell generalizes the MCS fields to allow for multiple kinds of auxiliary surfaces. This patch adds the plumbing to set those values, but doesn't yet hook any up. v2: (by Jordan Justen) Use mt for qpitch; pitch is tiles - 1. v3: Don't forget to subtract 1 from aux_mt->pitch. v4: Drop unnecessary aux_mt->offset (caught by Jordan Justen). Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Add auxiliary surface field #defines for Broadwell.Jordan Justen2014-06-261-0/+10
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Disassemble all of DP write message control bits on Gen6.Kenneth Graunke2014-06-261-1/+1
| | | | | | | | | Prior to the new brw_inst API, the brw_instruction structure split off bits 4 and 5 of msg_control for specific fields, and we failed to disassemble them. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Pass brw to brw_try_compact_instruction().Matt Turner2014-06-263-5/+4
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add is_cherryview flag to brw_context.Matt Turner2014-06-262-0/+2
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add CSEL opcode definition for Gen8.Matt Turner2014-06-261-0/+1
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Document which instructions are generation specific.Matt Turner2014-06-261-20/+20
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't set UIP for ENDIF/WHILE.Matt Turner2014-06-261-0/+4
| | | | | | | | | | They don't have a UIP. We used UIP in an array dereference, which never caused problems on Gen < 8, since UIP was a small integer (number of instructions). On Gen 8 UIP is in bytes, so it's large enough that it caused us to read out of bounds of the array. Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Replace struct brw_compact_instruction with brw_compact_inst.Matt Turner2014-06-266-61/+24
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert brw_eu_compact.c to the new brw_compact_inst API.Matt Turner2014-06-261-38/+44
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Introduce a new brw_compact_inst API.Matt Turner2014-06-261-0/+90
| | | | | | | For now nothing uses this, but we can incrementally convert. Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Replace 'struct brw_instruction' with 'brw_inst'.Matt Turner2014-06-2612-273/+223
| | | | | | | | Use this an an opportunity to clean up the formatting of some old code (brw_ADD, for instance). Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Throw out guts of struct brw_instruction.Matt Turner2014-06-261-644/+1
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert brw_gs_emit.c to the new brw_inst API.Matt Turner2014-06-261-3/+4
| | | | | Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert brw_disasm.c to the new brw_inst API.Matt Turner2014-06-261-341/+316
| | | | | | | | | | | | | | | | | | v2: (by Kenneth Graunke) - Fix disassembly of Gen4-5 SEND messages to print base MRF correctly. - Only print URB opcode on Gen5+, to match previous output (besides, there is only one opcode AFAICT.) - Only print the low 3 bits of msg_control, to match previous output. (We probably should decode all the fields, but hadn't previously due to the brw_instruction structure definition splitting out bits 4/5 for last_render_target and slot_group_select.) - Fix 3-source MRF/GRF file decoding on Sandybridge. - Fix compression code to use qtr_control rather than cmpt_control (which is compaction, not compression). Signed-off-by: Matt Turner <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> [v2] Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Pass brw rather than gen to brw_disassemble_inst().Matt Turner2014-06-265-33/+33
| | | | | | | We will need it in order to use the new brw_inst API. Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert brw_eu_compact.c to the new brw_inst API.Matt Turner2014-06-261-105/+104
| | | | | | | | v2: Use brw_inst_bits rather than pulling out individual fields and reassembling them. Signed-off-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Extend is_haswell checks to gen >= 8 in Gen4-7 generators.Kenneth Graunke2014-06-262-7/+7
| | | | | | | | | We're going to use fs_generator/vec4_generator for Gen8+ code soon, thanks to the new brw_instruction API. When we do, we'll generally want to take the Haswell paths on Gen8+ as well. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert test_eu_compact.c to the new brw_inst API.Kenneth Graunke2014-06-261-22/+19
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert vec4_generator to the new brw_inst API.Kenneth Graunke2014-06-261-8/+8
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert fs_generator to the new brw_inst API.Kenneth Graunke2014-06-261-9/+9
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert Gen4-5 clipping code to the new brw_inst API.Kenneth Graunke2014-06-264-41/+52
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert brw_sf_emit.c to the new brw_inst API.Kenneth Graunke2014-06-261-3/+4
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert brw_eu_emit.c to the new brw_inst API.Kenneth Graunke2014-06-261-482/+461
| | | | | | | | | | | v2: - Fix IF -> ELSE patching on Sandybridge. - Don't set base_mrf on Gen6+ in OWord Block Read functions. (Although - the old code did this universally, it shouldn't have - the field - doesn't exist on Gen6+ and just got overwritten by the SFID anyway.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Convert brw_eu.[ch] to use the new brw_inst API.Kenneth Graunke2014-06-262-16/+19
| | | | | | | v2: Don't set flag_reg_nr prior to Gen7 (as it doesn't exist). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Introduce a new brw_inst API.Kenneth Graunke2014-06-261-0/+707
| | | | | | | | | | | | | | | | | | | This is similar to gen8_instruction, and will eventually replace it. For now nothing uses this, but we can incrementally convert. The new API takes the existing brw_instruction pointers to ease conversion; when done, we can simply drop the old structure and rename struct brw_instruction -> brw_inst. v2: (by Matt Turner) Make JIP/UIP functions take a signed argument. v3: (by Kenneth Graunke) - Make Gen4-6 jump target functions take a signed argument. - Fix indirect align1 AddrImm bits on Gen4-7. - Fix SFID on Sandybridge to use bits 27:24. Signed-off-by: Kenneth Graunke <[email protected]> [v1, v3+] Signed-off-by: Matt Turner <[email protected]> [v2] Reviewed-by: Matt Turner <[email protected]>
* i965: Pass brw into next_offset().Kenneth Graunke2014-06-263-9/+12
| | | | | | | | The new brw_inst API is going to require a brw pointer in order to access fields (so it can do generation checks). Plumb it in now. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Remove unneeded VS workaround stalls on Baytrail.Greg Hunt2014-06-264-6/+6
| | | | | | | | | | | | | According to the workarounds list, these stalls aren't needed on production Baytrail systems. Piglit confirms that as well. These cause a small slowdown when we are sending a large number of small batches to the GPU. Removing these improves performance by up to 5% on some CPU bound SynMark tests (Batch[4-7], DrvState1, HdrBloom, Multithread, ShMapPcf). Signed-off-by: Gregory Hunt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Include marketing names for Broadwell GPUs.Kenneth Graunke2014-06-261-18/+18
| | | | | | | | | | | | | Intel would like us to include the marketing names. Developers additionally want "Broadwell GT1/2/3" because it makes it easier to identify what hardware users have when they request assistance or report issues. Including both makes it easy for everyone to map between the names. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: "10.2" <[email protected]>
* softpipe: use last_level from sampler view, not from the resourceRoland Scheidegger2014-06-261-19/+20
| | | | | | | | | The last_level from the sampler view may be limited by the state tracker to a value lower than what the base texture provides. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=80541. Reviewed-by: Brian Paul <[email protected]>
* targets/automake.inc: s/GALLIUM_VIDEO_CFLAGS/GALLIUM_TARGET_CFLAGS/Emil Velikov2014-06-264-4/+4
| | | | | | | The flags are not specific to the video targets plus we can reuse them for targets/xa and targets/gbm. Signed-off-by: Emil Velikov <[email protected]>
* auxiliary/vl: Remove no longer used SPLIT_TARGETSEmil Velikov2014-06-261-8/+0
| | | | | | | | | Required for the conversion stage of all VL targets to a single library per API (static/shared pipe-drivers). No longer required as per last commit. Signed-off-by: Emil Velikov <[email protected]>
* targets/radeonsi/omx: convert to static/shared pipe-driversEmil Velikov2014-06-266-74/+13
| | | | | | | | | | | | | | | | | | | The radeonsi counterpart of previous commit - now libomx-radeonsi is built into the libomx-mesa library. Providing a single library per API. v2: Include the radeon winsys only when there is a user for it. v3: Correcly include the winsys. Now with extra brown bag :\ Note: Make sure to rebuild the .omxregister file, by executing $ omxregister-bellagio This patch concludes the unification. Now libomx-mesa will be used for all hardware - r600, radeonsi and nouveau. Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Christian König <[email protected]>
* targets/r600/omx: convert to static/shared pipe-driversEmil Velikov2014-06-265-53/+19
| | | | | | | | | | | | | | | | | | | | | The r600 counterpart of previous commit - now the libomx-r600 is built into the libomx-mesa library. Providing a single library per API. v2: Include the radeon winsys only when there is a user for it. v3: Correcly include the winsys. Now with extra brown bag :\ Note: Make sure to rebuild the .omxregister file, by executing $ omxregister-bellagio If you have more than one omx library (libomx-radeonsi, libomx-r600), make sure to temporary move the unused one. By the end of the series there will be only one library that will be used for all hardware - r600, radeonsi and nouveau. Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Christian König <[email protected]>
* targets/omx-nouveau: convert to static/shared pipe-driversEmil Velikov2014-06-268-70/+76
| | | | | | | | | | | | | | | | | | | Similar to the vdpau/xvmc targets, we're going to convert the multiple target libraries into a single one. The library can be built with the relevant pipe-drivers statically linked in, or loaded as shared modules. Currently we default to static. Note: Make sure to rebuild the .omxregister file, by executing $ omxregister-bellagio If you have more than one omx library (libomx-radeonsi, libomx-r600), make sure to temporary move the unused one. By the end of the series there will be only one library that will be used for all hardware - r600, radeonsi and nouveau. Signed-off-by: Emil Velikov <[email protected]>
* st/omx: avoid using dynamic vid_(enc|dec)_base and avc_(name|role)Emil Velikov2014-06-264-94/+18
| | | | | | | | | | | | | | | | | | | | | | | | Strictly speaking we should not have done this in the first place, as all of the above should be static across the system. Currently this may cause some minor issues, which will be resolved in the following patches, by providing a single library for the OMX api. Cleanup a few unneeded strcpy cases while we're around. Note: Make sure to rebuild the .omxregister file, by executing $ omxregister-bellagio If you have more than one omx library (libomx-radeonsi, libomx-r600), make sure to temporary move the unused one. By the end of the series there will be only one library that will be used for all hardware - r600, radeonsi and nouveau. Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* st/omx: provide constant number of componentsEmil Velikov2014-06-261-8/+7
| | | | | | | | | | | | The number of components and their names/roles should be kept constant as all of that information cached. Note: Make sure to rebuild the .omxregister file, by executing $ omxregister-bellagio. Cc: Leo Liu <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* glx: Added missing null check in GetDrawableAttribute()Juha-Pekka Heikkila2014-06-261-4/+8
| | | | | | | For GLX_BACK_BUFFER_AGE_EXT query added extra null check. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa/main: In register_surface() verify gl_texture_object was foundJuha-Pekka Heikkila2014-06-261-0/+6
| | | | | | | Verify _mesa_lookup_texture() returned valid pointer before using it. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa/main: Verify calloc return value in register_surface()Juha-Pekka Heikkila2014-06-261-0/+5
| | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Add missing null check in push_back()Juha-Pekka Heikkila2014-06-261-2/+11
| | | | | | | Report memory error on realloc failure and don't leak any memory. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: check _mesa_hash_table_create return value in link_uniform_blocksJuha-Pekka Heikkila2014-06-262-0/+8
| | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Check variable_storage return value in fs_visitor::visitJuha-Pekka Heikkila2014-06-261-0/+6
| | | | | | | check variable_storage() found the requested fs_reg. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Handle miptree creation failure in intel_alloc_texture_storage()Juha-Pekka Heikkila2014-06-261-0/+3
| | | | | | | | Check intel_miptree_create() return value before using it as a pointer. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Check calloc return value in gather_statistics_results()Juha-Pekka Heikkila2014-06-261-1/+14
| | | | | | | | Check calloc return value and report on error, also later skip results handling if there was no memory to store results to. Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4: Try constant propagate after copy propagate made progress.Matt Turner2014-06-251-2/+4
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
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