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* i965: Enable loops in the VS.Eric Anholt2009-09-101-15/+38
* mesa: nicer vertex setupBrian Paul2009-09-101-128/+138
* st/mesa: use st_context() helperBrian Paul2009-09-101-17/+17
* softpipe: remove no-op softpipe_init_texture_funcs() functionBrian Paul2009-09-103-10/+0
* softpipe: remove unused #includes, move commentBrian Paul2009-09-101-7/+1
* util: remove unneeded #includesBrian Paul2009-09-101-6/+0
* softpipe: reformatting, clean-ups, commentsBrian Paul2009-09-102-15/+30
* util: minor clean-ups, reformattingBrian Paul2009-09-101-17/+12
* softpipe: remove unneeded #includesBrian Paul2009-09-102-3/+0
* Merge branch 'mesa_7_6_branch'Brian Paul2009-09-1012-67/+208
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| * Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-103-1/+56
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| | * docs: document Gallium glDrawPixels(GL_STENCIL_INDEX) fixBrian Paul2009-09-101-0/+1
| | * softpipe: minor indentation fixBrian Paul2009-09-101-1/+1
| | * softpipe: set dirty_render_cache in softpipe_clear()Brian Paul2009-09-101-0/+2
| | * docs: initial 7.5.2 release notes pageBrian Paul2009-09-102-0/+52
| * | intel: disable intel_stencil_drawpixels() for nowBrian Paul2009-09-101-0/+16
| * | Fix merge failIan Romanick2009-09-101-13/+0
| * | tgsi: use new tgsi_call_record to handle execution mask stacksBrian Paul2009-09-102-14/+43
| * | mesa: need to set all stencil bits to 0 before setting the 1 bitsBrian Paul2009-09-101-0/+9
| * | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick2009-09-102-1/+6
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| | * intel: add B43 chipset supportZhenyu Wang2009-09-102-1/+6
| * | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-101-1/+1
| * | mesa: in texenvprogram code, only do saturation when really needed.Brian Paul2009-09-101-8/+53
| * | gallium: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.Vinson Lee2009-09-101-1/+1
| * | radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen2009-09-102-43/+27
| * | mesa: include new u_format.csv file in tarballsBrian Paul2009-09-091-0/+1
| * | radeon: Add more verbose error message for failed command buffer.Pauli Nieminen2009-09-091-1/+3
* | | st/xorg: rename ctx to pipe to match every other gallium state trackerZack Rusin2009-09-104-35/+35
* | | st/xorg: temporarily disablie copiesZack Rusin2009-09-101-1/+2
* | | st/xorg: implement pipelines surface/texture copiesZack Rusin2009-09-102-7/+329
* | | st/xorg: unite finalization and stub out pipelined copiesZack Rusin2009-09-104-20/+50
* | | st/xorg: abstract flushing and syncing for the exa codeZack Rusin2009-09-102-5/+23
* | | st/xorg: disable solid fills until copies are accelerated as wellZack Rusin2009-09-102-1/+3
* | | st/xorg: implement exasolids with full pipeliningZack Rusin2009-09-104-32/+135
* | | st/xorg: start adding support for surface fillsZack Rusin2009-09-105-26/+66
* | | nv50: Fix tiling mode for lower mipmap levels.Marcin Kościelnicki2009-09-103-5/+8
* | | intel: Don't forget to map the depth read buffer in spans.Eric Anholt2009-09-101-22/+28
* | | r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2Alex Deucher2009-09-101-5/+1
* | | r300: add full support for two sided stencil on r5xx for dri2Alex Deucher2009-09-104-4/+46
* | | mesa: fix cut&paste typosMathias Frohlich2009-09-101-4/+4
* | | util: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.Vinson Lee2009-09-101-1/+1
* | | llvmpipe: Fix alpha test.José Fonseca2009-09-101-26/+13
* | | llvmpipe: Mask out color channels not present in the color buffer.José Fonseca2009-09-101-5/+23
* | | llvmpipe: Fix sampling from depth textures. Respect texture compare func.José Fonseca2009-09-102-49/+122
* | | llvmpipe: Skip blending when mask is zero.José Fonseca2009-09-102-13/+30
* | | llvmpipe: Proper control flow builders.José Fonseca2009-09-103-60/+426
* | | llvmpipe: Copy the texture target into the sampler static state.José Fonseca2009-09-101-0/+1
* | | llvmpipe: Quick hack for 1D textures.José Fonseca2009-09-092-0/+4
* | | scons: Pass -mstackrealign option to gcc.José Fonseca2009-09-091-0/+1
* | | llvmpipe: Fix depth mask computation.José Fonseca2009-09-091-4/+5