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* r600g/sb: improve optimization of conditional instructionsVadim Girlin2013-05-276-21/+96
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* ilo: enable multiple constant buffersChia-I Wu2013-05-271-1/+1
| | | | This effectively enables uniform buffer object support.
* ilo: add support for indirect access of CONST in FSChia-I Wu2013-05-272-2/+99
| | | | | Unlike other register files, CONST is read with a message and indirect access is easier to implement.
* ilo: add support for TBOs on GEN6Chia-I Wu2013-05-271-8/+26
| | | | This hunk was missing in the last commit.
* ilo: advertise supports for pure integer formatsChia-I Wu2013-05-271-2/+3
| | | | For pure integer formats, no filtering nor blending is needed.
* ilo: add support for texture buffer objectsChia-I Wu2013-05-272-10/+32
| | | | | Take care of sampler views that have buffers as the underlying resources. Update caps related to TBOs.
* tgsi: add buffer texture to tgsi_util_get_texture_coord_dim()Chia-I Wu2013-05-272-0/+3
| | | | | | | | TGSI_TEXTURE_BUFFER is one-dimensional. Assert that exec_tex() is never called with TGSI_TEXTURE_BUFFER. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* r600g/sb: improve handling of KILL instructionsVadim Girlin2013-05-273-89/+139
| | | | | | | This patch improves handling of unconditional KILL instructions inside the conditional blocks, uncovering more opportunities for if-conversion. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix peephole optimization for PRED_SETEVadim Girlin2013-05-271-1/+1
| | | | | | | Fixes incorrect condition that prevented optimization for PRED_SETE/PRED_SETE_INT. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix scheduling of PRED_SET instructionsVadim Girlin2013-05-272-2/+18
| | | | | | | | | | | | | | PRED_SET instructions that update exec mask should be scheduled immediately prior to the "if-then-else" block, because any instruction that is inserted after alu clause with PRED_SET and before conditional block is also conditionally executed by hw (exec mask is already updated at that moment). Propbably it's better to make PRED_SET a part of conditional "if-then-else" block in the IR to handle this more cleanly, but for now this temporary solution should prevent the problem. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix handling of preloaded inputs for compute shadersVadim Girlin2013-05-251-0/+4
| | | | | | | | | | For compute shaders we need to let the backend know that GPRs 0 and 1 are preloaded with some compute-specific input values, otherwise any use of these regs without previous definition is considered as undefined value and usually is simply replaced with 0. Signed-off-by: Vadim Girlin <[email protected]>
* xlib: add null ctx check in glXDestroyContext()Brian Paul2013-05-241-10/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64934 NOTE: This is a candidate for the stable branches. Reviewed-by: Jose Fonseca <[email protected]>
* st/glx: add null ctx check in glXDestroyContext()Brian Paul2013-05-241-10/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64934 NOTE: This is a candidate for the stable branches. Reviewed-by: Jose Fonseca <[email protected]>
* st/mesa: add switch cases for new IR enums to silence warningsBrian Paul2013-05-241-0/+2
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* st/glx/xlib: assorted whitespace, comment fixesBrian Paul2013-05-241-8/+17
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* r600g/sb: fix incorrect assertVadim Girlin2013-05-241-1/+1
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: relax some restrictions for FETCH instructionsVadim Girlin2013-05-241-9/+8
| | | | | | | | This allows GVN rewrite pass to propagate non-const (register) values to FETCH source operands, helping to eliminate unnecessary copies in some cases. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: relax register allocation for compute shadersVadim Girlin2013-05-242-2/+16
| | | | | | | | | | | | | | We have to assume that all GPRs in compute shader can be indirectly addressed because LLVM backend doesn't provide any indirect array info. That's why for compute shaders GPR array is created that covers all used GPRs (0..r600_bytecode::ngpr-1), but this seriously restricts register allocation in sb. This patch checks for actual use of indirect access in the shader and if it's not used then GPR array is not created, so that regalloc is not unnecessarily restricted. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix gpr array handling for compute shadersVadim Girlin2013-05-241-1/+1
| | | | | | Fixes segfault with bfgminer and R600_DEBUG=sbcl. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix buffer overflow in sb_ostreamVadim Girlin2013-05-241-1/+1
| | | | | | Fixes segfault during bytecode dump with bfgminer kernel Signed-off-by: Vadim Girlin <[email protected]>
* r600g/compute: Use common transfer_{map,unmap} functions for global resourcesTom Stellard2013-05-231-44/+24
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g/compute: Use common transfer_{map,unmap} functions for kernel inputsTom Stellard2013-05-231-4/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* i965: Go back to using the kernel SOL reset feature.Kenneth Graunke2013-05-233-8/+7
| | | | | | | | | | | | | | | It turns out the MI_LOAD_REGISTER_IMM approach doesn't work on Haswell, and regressed essentially all the transform feedback Piglit tests. This morally reverts eaa6fbe6d54dc99efac4ab8e800edef65ce8220d. However, the code is still simpler than it was. On BeginTransformFeedback, we simply flush the batch and set the SOL reset flag so that the next batch will start with zeroed offsets. There's still no software counting. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64887 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno: scissor fixRob Clark2013-05-231-0/+11
| | | | | | | Don't assume the state-tracker will set the scissor after the framebuffer state is changed. Signed-off-by: Rob Clark <[email protected]>
* freedreno: implement pipe->resource_copy_region()Rob Clark2013-05-231-8/+43
| | | | Signed-off-by: Rob Clark <[email protected]>
* glsl linker: compare interface blocks during interstage linkingKenneth Graunke2013-05-233-0/+49
| | | | | | | | | | | | Verify that interface blocks match when linking separate shader stages into a program. Fixes piglit glsl-1.50 tests: * linker/interface-blocks-vs-fs-member-count-mismatch.shader_test * linker/interface-blocks-vs-fs-member-order-mismatch.shader_test Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]>
* glsl linker: compare interface blocks during intrastage linkingJordan Justen2013-05-234-0/+82
| | | | | | | | | | | | | | | | Verify that interface blocks match when combining compilation units at the same stage. (For example, when merging all vertex shaders.) Fixes piglit glsl-1.50 test: * linker/interface-blocks-multiple-vs-member-count-mismatch.shader_test v5 (Ken): Rename to link_interface_blocks.cpp and drop the separate .h file for consistency with other linker code. Remove "ok" variable. Fold cross_validate_interface_blocks into its caller. Signed-off-by: Jordan Justen <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
* glsl linker: support arrays of interface block instancesJordan Justen2013-05-231-11/+50
| | | | | | | | | | | | | | | With this change we now support interface block arrays. For example, cases like this: out block_name { float f; } block_instance[2]; This allows Mesa to pass the piglit glsl-1.50 test: * execution/interface-blocks-complex-vs-fs.shader_test Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl link_varyings: link interface blocks using the block nameJordan Justen2013-05-231-4/+29
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl linker: remove interface block instance namesJordan Justen2013-05-234-0/+207
| | | | | | | | Convert interface blocks with instance names into flat interface blocks without an instance name. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl ast_to_hir: support in/out for interface blocksJordan Justen2013-05-231-6/+22
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl ast_to_hir: reject row/column_major for in/out interface blocksJordan Justen2013-05-231-1/+5
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl ast_to_hir: move uniform block symbols to interface blocks namespaceJordan Justen2013-05-231-1/+1
| | | | | | | Uniform/interface blocks are a separate namespace from types. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl_symbol_table: add interface block namespacesJordan Justen2013-05-232-3/+85
| | | | | | | | For interface blocks, there are three separate namespaces for uniform, input and output blocks. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl parser: allow in & out for interface block membersJordan Justen2013-05-231-25/+12
| | | | | | | | | | | | | Previously uniform blocks allowed for the 'uniform' keyword to be used with members of a uniform blocks. With interface blocks 'in' can be used on 'in' interface block members and 'out' can be used on 'out' interface block members. The basic_interface_block rule will verify that the same qualifier type is used with the block and each member. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl ast_to_hir: reject interpolation qualifiers for uniform blocksJordan Justen2013-05-231-0/+6
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl parser: handle interface block member qualifierJordan Justen2013-05-231-1/+43
| | | | | | | | | | | | | | | | | | | | | An interface block member may specify the type: in { in vec4 in_var_with_qualifier; }; When specified with the member, it must match the same type as interface block type. It can also omit the qualifier: uniform { vec4 uniform_var_without_qualifier; }; When the type is not specified with the member, it will adopt the same type as the interface block. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl parser: on desktop GL require GLSL 150 for instance namesJordan Justen2013-05-231-5/+3
| | | | | | | | | | | Interface blocks in GLSL 150 allow an instance name to be used. v2: * use state->check_version Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl parser: reject VS+in & FS+out interface blocksJordan Justen2013-05-231-0/+14
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: parse in/out types for interface blocksJordan Justen2013-05-231-11/+40
| | | | | | | | | | | Previously only 'uniform' was allowed for uniform blocks. Now, in/out can be parsed, but it will only be allowed for GLSL >= 150. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl parser: rename uniform block to interface blockJordan Justen2013-05-231-12/+12
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: rename ast_uniform_block to ast_interface_blockJordan Justen2013-05-233-12/+12
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable guardband clipping on Gen4/5.Chris Forbes2013-05-241-3/+45
| | | | | | | | | | Enables guardband clipping when the viewport covers the entire render target. No piglit regressions on Ironlake. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* ARB_fp: accept duplicate precision optionsChris Forbes2013-05-241-9/+15
| | | | | | | | | | | | | | | | | | | Relaxes the validation of OPTION ARB_precision_hint_{nicest,fastest}; to allow duplicate options. The spec says that both /nicest/ and /fastest/ cannot be specified together, but could be interpreted either way for respecification of the same option. Other drivers (NVIDIA etc) accept this, and at least one Unity3D game expects it to succeed (Kerbal Space Program). V2: Add spec quote. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* ilo: Initialize need_flush in draw_vbo.Vinson Lee2013-05-231-1/+1
| | | | | | | | | need_flush was uninitialized if hw3d->new_batch was true. Fixes "Uninitialized scalar variable" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* radeon: Initialize variables in radeon_llvm_context_init.Vinson Lee2013-05-221-0/+2
| | | | | | | | | | | 'type' was not fully initialized when calling lp_build_context_init. Fixes "Uninitialized scalar variable" defect reported by Coverity. NOTE: This is a candidate for the stable branches. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* intel: Count fragments in our blitter-based glBitmap() path.Eric Anholt2013-05-221-8/+12
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59440 Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Shut up more compiler warnings from vector insert/extract changes.Eric Anholt2013-05-221-0/+8
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* softpipe: change TEX_TILE_SIZE and NUM_TEX_TILE_ENTRIESRoland Scheidegger2013-05-221-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Initially we had NUM_TEX_TILE_ENTRIES of 50, however this was using too much memory (mostly because the tile cache is operating on fixed max current sampler views which could be fixed but that's another topic). So it was decreased to 4. However this is a ridiculously low number which can't actually really work (the number of tiles needed for as little as a single quad with linear_mipmap_linear is 2 to 8 for a 2d texture, and 4 to 16 for a 3d texture), as it just about guarantees there will be cache thrashing sometimes (just about always for 3d textures in fact, since while there are 4 entries the cache is direct mapped). So increase that number to 16 (which is still on the low side for direct mapped cache though I guess using something like 4-way associativity would be more effective than increasing this further) which has at least some good chance to avoid thrashing. Since we don't want to increase memory requirements however in turn decrease the tile size accordingly from 64 to 32 (as a bonus point this also decreases the cost of texture thrashing which might still happen sometimes). I've seen performance improvement in the order of factor ~200 (specifically, drawing the first frame from the replay from bug 41787 needs "only" ~10s instead of ~30min, meaning I can actually compare the output with other drivers...) with this. Reviewed-by: Jose Fonseca <[email protected]>
* softpipe: disambiguate TILE_SIZE / TEX_TILE_SIZERoland Scheidegger2013-05-223-38/+38
| | | | | | | These can be different (just like NUM_TEX_TILE_ENTRIES / NUM_ENTRIES), though currently they aren't. Reviewed-by: Jose Fonseca <[email protected]>
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