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* intel/isl: Add a format_supports_ccs_d helperJason Ekstrand2017-02-022-0/+24
| | | | | | | | | Nothing uses this yet but it serves as a nice bit of documentation that's relatively easy to find. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/isl: Rename supports_lossless_compression to supports_ccs_eJason Ekstrand2017-02-027-15/+11
| | | | | | | | | | | | | The term "lossless compression" could potentially mean multisample color compression, single-sample color compression or HiZ because they are all lossless. The term CCS_E, however, has a very precise meaning; in ISL and is only used to refer to single-sample color compression. It's also much shorter which is nice. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* anv/pass: Store the depth-stencil attachment's last subpass indexNanley Chery2017-02-021-0/+1
| | | | | | | | | | | Commit 968ffd6c868af7226e8f889573eef709888151cb stored the last subpass index of all the attachments but that of the depth-stencil attachment. This could cause depth buffers used in multiple subpasses not to be in the requested final layout. Fix this error. Cc: "17.0" <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capabilityNicolai Hähnle2017-02-0219-33/+30
| | | | | | | | | | | | | | | | | | | Make the cap consistent with PIPE_CAP_INT64. Aside from the hypothetical case of using draw for vertex shaders (and actually caring about doubles...), every implementation supports doubles either nowhere or everywhere. Also, st/mesa didn't even check the cap correctly in all supported shader stages. While at it, add a missing LLVM version check for 64-bit integers in radeonsi. This is conservative: judging by the log, LLVM 3.8 might be sufficient, but there are probably bugs that have been fixed since then. v2: fix clover (Marek) Reviewed-by: Marek Olšák <[email protected]>
* mesa: Enable EXT_compressed_ETC1_RGB8_sub_texturePlamena Manolova2017-02-022-1/+1
| | | | | | | | | | | | | | | | Since we already have the functionality in place and games like Game of Thrones seem to depend on this extension, I think it makes sense to enable it by making it part of the extension string even though it's still a draft: https://www.khronos.org/registry/gles/extensions/EXT/EXT_compressed_ETC1_RGB8_sub_texture.txt Note: OES_compressed_ETC1_RGB8_sub_texture seems to be listed in gl2ext.h, but there's no documentation for it in the KHR registry Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* configure: Only require libdrm 2.4.75 for intel.Vinson Lee2017-02-021-2/+2
| | | | | | Fixes: b8acb6b17981 ("configure: Require libdrm >= 2.4.75") Signed-off-by: Vinson Lee <[email protected]> Acked-by: Dave Airlie <[email protected]>
* anv: enable VK_KHR_shader_draw_parametersLionel Landwerlin2017-02-022-0/+5
| | | | | | | | | | Enables 10 tests from: dEQP-VK.draw.shader_draw_parameters.* Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: emit DrawID if neededLionel Landwerlin2017-02-023-7/+63
| | | | | | | | v2: use define for buffer ID (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: always allocate a vertex element with vertexid or instanceidLionel Landwerlin2017-02-021-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Up to now on Gen8+ we only allocated a vertex element for gl_InstanceIndex or gl_VertexIndex when a vertex shader uses gl_BaseInstanceARB or gl_BaseVertexARB. This is because we would configure the VF_SGVS packet to make the VF unit write the gl_InstanceIndex & gl_VertexIndex values right behind the values computed from the vertex buffers. In the next commit we will also write the gl_DrawIDARB value. Our backend expects to pull the gl_DrawIDARB value from the element following the element containing gl_InstanceIndex, gl_VertexIndex, gl_BaseInstanceARB and gl_BaseVertexARB (see vec4_vs_visitor::setup_attributes). Therefore we need to allocate an element for the SGVS elements as long as at least one of the SGVS element is read by the shader. Otherwise our shader will use a gl_DrawIDARB value pulled from the URB one element too far (most likely garbage). v2: Fix my english (Lionel) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: move BaseVertexID/BaseInstanceID vertex buffer index to 31Lionel Landwerlin2017-02-023-2/+4
| | | | | | | | v2: use define for buffer ID (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: limit vertex buffers to 31Lionel Landwerlin2017-02-023-4/+4
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* android: fix llvm, elf dependencies for M, N releasesMauro Rossi2017-02-013-4/+14
| | | | | | | | These changes set the correct llvm version and elf include path which differ for Marshmallow and Nougat Cc: "17.0" <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* anv: Don't use bogus alpha swizzlesJason Ekstrand2017-02-013-3/+22
| | | | | | | | | | | For RGB formats in Vulkan, we use the corresponding RGBA format with a swizzle of RGB1. While this swizzle is exactly what we want for texturing, it's not allowed for rendering according to the docs. While we haven't been getting hangs or anything, we should probably obey the docs. This commit just sanitizes all render swizzles so that the alpha channel maps to ALPHA. Reviewed-by: Anuj Phogat <[email protected]>
* Add missing copyright header to wayland-egl-priv.hMicah Fedke2017-02-011-0/+27
| | | | | Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: handle VK_QUEUE_FAMILY_IGNORED in image transitions (v3)Dave Airlie2017-02-024-12/+15
| | | | | | | | | | | | | The CTS tests at least are using this, and we were totally ignoring it. This hopefully fixes the bouncing multisample CTS tests. v2: get family mask in ignored case from command buffer. v3: only change things in one place, use logic from Bas. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: handle clip/cull distance sizing in geometry shader outputsDave Airlie2017-02-021-8/+10
| | | | | | | | | | | Otherwise we were writing these as 4 components, and things went bad. Fixes (the remaining): dEQP-VK.clipping.user_defined.*.vert_geom.* Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: add const_index to fetch index for gs inputsDave Airlie2017-02-021-1/+1
| | | | | | | | | | | | This fixes clip distance fetches as they are single item loads with a const_index like float[1]. Fixes: dEQP-VK.clipping.user_defined.*.vert_geom.[0-6] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/ac: move frag interp emission code to shared llvm code.Dave Airlie2017-02-023-87/+98
| | | | | | | | This code should be used in radv, so move it to a shared location in advance of doing that. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: inline get_mesa_program()Timothy Arceri2017-02-021-37/+23
| | | | | | | | | | In the past I've gotten this function confused with the one in ir_to_mesa.cpp of the same name. Now that the affected flag setting has move into a helper it makes sense just to inline this remaining code. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: create set_prog_affected_state_flags() helperTimothy Arceri2017-02-021-106/+111
| | | | | | | | This will be used when restoring tgsi from the on-disk shader cache. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: st_atom_shader.c C99 tidy upTimothy Arceri2017-02-021-3/+1
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove pre C99 statement block for variable declarationTimothy Arceri2017-02-021-60/+58
| | | | Acked-by: Marek Olšák <[email protected]>
* isl: Add assertions for render target swizzle restrictionsJason Ekstrand2017-02-011-0/+32
| | | | Reviewed-by: Anuj Phogat <[email protected]>
* st/va: add h264 constrained baseline profileBoyuan Zhang2017-02-011-0/+1
| | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/vdpau: add h264 constrained baseline profileBoyuan Zhang2017-02-011-0/+4
| | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: add h264 constrained baseline supportBoyuan Zhang2017-02-011-0/+1
| | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl: add h264 constrained baseline profileBoyuan Zhang2017-02-012-0/+2
| | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* radv: Enable VK_KHR_shader_draw_parameters.Bas Nieuwenhuizen2017-02-012-0/+5
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radv: Pass draw index to shader.Bas Nieuwenhuizen2017-02-011-5/+9
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radv/ac: Add draw index support.Bas Nieuwenhuizen2017-02-011-2/+8
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965: Prevent coverity warningRobert Foss2017-02-011-0/+1
| | | | | | | | | | | | Add assert checking that num_sources is never larger than 3. This prevents Coverity from concluding that the unhandled cases of num_sources not being 0-3 are relevant. Coverity-Id: 1399480-1399489 Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* spirv: add SPV_KHR_shader_draw_parameters supportLionel Landwerlin2017-02-013-0/+17
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* compiler: add missing enums for debugLionel Landwerlin2017-02-011-0/+2
| | | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* docs: add news item and link release notes for 13.0.4Emil Velikov2017-02-012-0/+7
| | | | Signed-off-by: Emil Velikov <[email protected]>
* docs: add sha256 checksums for 13.0.4Emil Velikov2017-02-011-1/+2
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit 6bfc352f5a35ab21f012d6d501821ffbf767aab3)
* docs: add release notes for 13.0.4Emil Velikov2017-02-011-0/+254
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit 3255d10da4c2703bfdfcefd8f59b0d8f21dbb43f)
* winsys/radeon: Allow visible VRAM size > 256MB with kernel driver >= 2.49Michel Dänzer2017-02-011-1/+6
| | | | | | | | | The kernel driver reports correct values now. Reviewed-by: Christian König <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* android: add vulkan build for intelTapani Pälli2017-02-012-0/+227
| | | | | | | | | | | | | | | | | | | | | | | | | fixes to issues spotted by Emil Velikov: - set ANV_TIMESTAMP corretly - fix typo with VULKAN_GEM_FILES v2: update to use Makefile.sources under vulkan instead of having own v3: update to changes to generate from vk.xml (commit c7fc310) v4: remove 'hw' relative path cleanups, remove unnecessary cruft review from Emil Velikov: - move to vulkan folder - remove timestamp gen, no longer necessary - more cleanups Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: use same is_color_attachment trick to discern error casesIlia Mirkin2017-01-311-3/+11
| | | | | | | | | | | All the other calls to retrieve the attachment have been covered except this one - return the proper error for attachment points that are valid enums but out of bound for the driver. Fixes GL45-CTS.geometry_shader.layered_fbo.fb_texture_invalid_attachment Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* anv: Improve flushing around STATE_BASE_ADDRESSJason Ekstrand2017-01-311-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | It is not clear from the docs exactly how pipelined STATE_BASE_ADDRESS actually is. We know from experimentation that we need to flush the render cache prior to emitting STATE_BASE_ADDRESS and invalidate the texture cache afterwards. The only thing the PRM says is that, on gen8+ we're supposed to invalidate the state cache after STATE_BASE_ADDRESS but experimentation has indicated that doing so does nothing whatsoever. Since we don't really know, let's do just a bit more flushing in the hopes that this won't be a problem again. In particular: 1) Do a CS stall before we emit STATE_BASE_ADDRESS since we don't really know whether or not it's pipelined. 2) Do a data cache flush in case what runs before STATE_BASE_ADDRESS is a compute shader. 3) Invalidate the state and constant caches after STATE_BASE_ADDRESS because the state may be getting cached there (we don't really know). Reported-by: Mark Janes <[email protected]> Tested-by: Mark Janes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* anv: Flush render cache before STATE_BASE_ADDRESS on gen7Jason Ekstrand2017-01-311-3/+0
| | | | | | | | | | | We had no good reason for *not* doing this on gen7 before but we didn't know it was needed. Recently, when trying update to Vulkan CTS version 1.0.2 in our CI system, Mark discovered GPU hangs on Haswell that appear to be STATE_BASE_ADDRESS related. This commit fixes them. Reported-by: Mark Janes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* isl/formats: Only advertise sampling for A4B4G4R4 on BroadwellJason Ekstrand2017-01-311-2/+3
| | | | | | | | | This causes hangs on Broadwell if you try to render to it. I have no idea how we managed to not hit this earlier. Tested-by: Mark Janes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* intel/blorp: Handle clearing of A4B4G4R4 on all platformsJason Ekstrand2017-01-311-0/+23
| | | | | | Tested-by: Mark Janes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* radeonsi: Fix build on LLVM < 3.9 v2Tom Stellard2017-02-011-2/+4
| | | | | | | | | This was broken by: e0cc0a614c96011958bc3a1b84da9168e0e1ccbb v2: - Use preprocessor macro Tested-by: Mark Janes <[email protected]>
* radv: Enable Float64 support.Bas Nieuwenhuizen2017-02-012-1/+2
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 SSBO loads.Bas Nieuwenhuizen2017-02-011-26/+49
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 UBO loads.Bas Nieuwenhuizen2017-02-011-2/+6
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 load/store var.Bas Nieuwenhuizen2017-02-011-53/+48
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 SSBO stores.Bas Nieuwenhuizen2017-02-011-3/+14
| | | | | | | No f16 support as I'm not quite sure about alignment yet. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Add core Float64 support.Bas Nieuwenhuizen2017-02-011-44/+129
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
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