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* i965: Render R8G8B8X8 as R8G8B8A8Chris Forbes2014-04-101-0/+3
| | | | | | | | | The sampler can handle R8G8B8X8 (and substitute 1.0 for the fourth component) but we can't use it as a render target. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.Chris Forbes2014-04-101-1/+1
| | | | | | | | | | | | | | | | | | | None of the other 3-component 16bpc formats are directly supported, so they get promoted to XRGB equivalents. *Not* promoting RGB16F the same way makes texture views much more fiddly -- we don't want to have to do crazy copying behind the scenes. (with my other master + my experimental ARB_texture_view support) fixes the piglit test: `spec/ARB_texture_view/view compare 48bit formats` No regressions in gpu.tests on Haswell. V4: Don't alter the formats table -- just don't match it to a mesa_format. [Kenneth] Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Enable R10G10B10A2_UNORM formatChris Forbes2014-04-101-0/+1
| | | | | | | | | This is supported by all generations, and is required for memory layout consistency for texture_view. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Enable R8G8B8A8_UNORM_SRGB formatChris Forbes2014-04-101-0/+1
| | | | | | | | Now this is the preferred format for GL_SRGB8_ALPHA8. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* swrast: Add support for fetching from MESA_FORMAT_R10G10B10A2_UNORMChris Forbes2014-04-102-3/+16
| | | | | | | | | | V4: Fix rebase conflicts with Brian's renaming of the texfetch functions. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Brian Paul <[email protected]> Acked-by: Eric Anholt <[email protected]>
* mesa: fix packing of float texels to GL_SHORT/GL_BYTEChris Forbes2014-04-101-58/+58
| | | | | | | | | | | | | | | | | Previously, we would unpack the texels to floats using *_TO_FLOAT_TEX, and then pack them into the desired format using FLOAT_TO_*. Unfortunately, this isn't quite the inverse operation, and so some texel values would end up off-by-one. This fixes the GL_RGB8_SNORM and GL_RGB16_SNORM subcases in piglit's arb_texture_view-format-consistency-get test on i965. The similar 1-, 2- and 4-component cases already worked because they took the memcpy path rather than repacking. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Eric Anholt <[email protected]>
* r600g: Don't leak bytecode on shader compile failureMichel Dänzer2014-04-101-7/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74868 Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* build: force .so extension for the gallium dri modulesEmil Velikov2014-04-092-1/+2
| | | | | | | | | | While linux uses .so as a default extension for shared libraries that is not the case for other platforms. The loader in libGL (and others) assumes that the dri module will always have a .so extension, thus it will fail to load on the affected platforms. Spotted-by: Jon TURNEY <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* Partially revert bba9c28 "configure: use LIB_EXT rather than hardcoded .so"Jon TURNEY2014-04-091-13/+13
| | | | | | | | | | | | | | | | | Filenames passed to dlopen() don't need to use the platform's default extension for shared libraries. Using the '.so' extension when dlopen()ing DRI drivers is hardcoded into mesa and the X server, so it should be hardcoded here in the Makefile as well. A similar fix is probably also needed for gallium DRI drivers. (Consider that if we were starting from scratch, perhaps we would use a custom extension like .dri instead) Cc: Emil Velikov <[email protected]> Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Partially revert "st/xa: Fix advertized version number and try to avoid ↵Emil Velikov2014-04-092-7/+11
| | | | | | | | | | | | | | | | future discrepancies" This reverts commit 61bedc3d6b08943f015f9d590c07a6af36c2a92c. As the header is the one defining the API/ABI and is distributed during installation, we should be using it rather than re-defining the XA version in configure.ac. Bump the version in the header to 2.2.0, to reflect what was the original intent of commit 42158926c6d7d3ddbe61b9a04d60544ff1b50a96. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* glx: drop obsolete _XUnlock_Mutex in __glXInitialize error pathEmil Velikov2014-04-091-3/+1
| | | | | | | | | | | | | | With commit 1f1928db001(glx: Drop _Xglobal_lock while we create and initialize glx display) we've split the big _Xglobal_lock handling in a more fine grained manner. Unfortunatelly we forgot to drop the unlock_mutex on the error paths, leading to undefined behaviour as the mutex is already unlocked. Cc: Kristian Høgsberg <[email protected]> Cc: "9.2 10.0 10.1" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno/a3xx: assert() -> debug_assert()Rob Clark2014-04-091-1/+1
| | | | | | | | | We hit this assert with some piglit tests. Which appears to be a bug outside of freedreno. Previously we were relying on assert() being redefined to debug_assert() so that we didn't crash in release builds. Somehow that stopped working. So just use debug_assert() directly. Signed-off-by: Rob Clark <[email protected]>
* svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()Brian Paul2014-04-091-2/+2
| | | | | | | | | | | | Fixes a crash in svga_context_flush_buffers() if we use the 'draw' module for AA lines (when the device doesn't support that feature). We need to initialize this list before we setup the swtnl pieces. Found/fixed by Charmaine Lee. Cc: "10.0" <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* i965: Stop advertising GL_MESA_ycbcr_texture.Kenneth Graunke2014-04-091-1/+0
| | | | | | | | | | | | | | | | | The "new" fragment shader backend has never supported the necessary color conversion code for this to work. We began using the new backend in Mesa 7.10 for GLSL (commit a81d423d93f22a948f3aa4bf73, October 2010), and for ARB_fragment_program in Mesa 9.1 (commit 97615b2d8c7c3cea6fd3a4, August 2012). I haven't heard any complaints, so I don't think anyone will miss this feature. I believe mplayer used it at one point, but these days defaults to other paths anyway. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/a3xx/compiler: add CEILRob Clark2014-04-091-0/+1
| | | | | | fixes piglit glsl-fs-ceil Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix neg mov'sRob Clark2014-04-091-20/+1
| | | | | | | | | | | | | | | | | | | | create_mov() was fixed up to handle neg/abs properly for interal mov's, using absneg.f, but forgot to fix it for TGSI MOV's. The problem with using add.f to handle negated mov's is that we can only take a single const reg src. So: MOV TEMP[n], -CONST[m] would turn into: add.f Rdst, (neg)CONST[m], 0.0 which would not work. Anyways, just remove the extra code and always use create_mov() which DTRT. This fixes piglit vs-op-neg-int test. Signed-off-by: Rob Clark <[email protected]>
* radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIKMarek Olšák2014-04-091-5/+5
| | | | This depends on my kernel fix. Hyper-Z is still disabled by default.
* r600g,radeonsi: add a bunch of useful queries for the HUDMarek Olšák2014-04-097-5/+72
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* r600g,radeonsi: set correct initial domain for shared resourcesMarek Olšák2014-04-093-23/+59
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* gallium/radeon: fix warningsMarek Olšák2014-04-093-2/+3
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* tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().Iago Toral Quiroga2014-04-085-48/+27
| | | | | | | | | This should help prevent situations where we render without proper index bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455 Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Remove unused sampler key fieldsTopi Pohjolainen2014-04-082-16/+0
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: move declaration before code in etc2_unpack_rgb8()Brian Paul2014-04-081-3/+3
| | | | To fix MSVC build since cb4ad1368551b.
* i965: Delete "fast color clear unsupported" performance warning.Kenneth Graunke2014-04-081-2/+0
| | | | | | | | | | | | | | | | | | | | | | | Applications frequently clear to colors other than 0.0 or 1.0, which prevents us from doing fast color clears. In that case, we issue this performance warning on basically every glClear call, resulting in so much spam that it's nearly impossible to see any other messages. Plus, I don't think it's useful. We aren't suggesting a better way to do what the application developers want---we're just telling them it would be faster to do something they don't want. Driver developers have no control over the clear color, so this message is totally useless to them. A better alternative to get this sort of information is to use INTEL_DEBUG=blorp, which tells you whether color clears were fast, simd16 repdata, or slow. v2: Rebase on has_color_component changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno/a3xx: deal with optimized tex instructionsRob Clark2014-04-087-25/+41
| | | | | | | | | | | | | | | Keep track of whether we actually have any sam instructions in the resulting shader, rather than using TGSI SAMP declarations. If the sam instruction is optimized out, because the result is not used, we don't want to emit texture state, etc. In fact emitting sampler state and/or setting PIXLODENABLE bit when there are no texture fetches seems to cause lockup. In theory this should never happen for a "normal" shader, unless the state tracker is wonky. But it is a very real possibility for binning pass shaders. Signed-off-by: Rob Clark <[email protected]>
* mesa: add bounds checking to eliminate buffer overrunCourtney Goeltzenleuchter2014-04-081-24/+54
| | | | | | | | | | | | | | | | | Decompressing ETC2 textures was causing intermitent segfault by copying resulting 4x4 texel block to the destination texture regardless of the size of the destination texture. Issue found via application crash in GLBenchmark 3.0's Manhattan test. v2: add more detail comment. Compute limit outside inner loops. v3: add bugzilla reference v4: Correct cc syntax in commit log v5: really grab the right patch Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988 Cc: "9.2 10.0 10.1" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> [v1, suggested v2-3]
* st/omx/enc: cleanup omx/vid_enc.cLeo Liu2014-04-081-102/+118
| | | | | | | cleanup by moving each step into a separate function Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/omx/enc: allocate input buffer private on demandChristian König2014-04-081-82/+42
| | | | | | | | v2: move allocation to a function as first step to clean vid_enc_EncodeFrame Signed-off-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]>
* svga: replace sampler assertion with conditionalBrian Paul2014-04-082-5/+33
| | | | | | | | | | | | | For TEX instructions, the set of samplers and sampler views should be consistent. The XA state tracker sometimes passes an inconsistent set of samplers and sampler views. Rather than assert and die, issue a warning. v2: add debugging code to detect inconsistent state. v3: also check for null sampler in svga_state_tss.c Cc: "10.0" "10.1" <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* i965/vec4: fix record clearing in copy propagationChia-I Wu2014-04-081-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given mov vgrf7, vgrf9.xyxz add vgrf9.xyz, vgrf4.xyzw, vgrf5.xyzw add vgrf10.x, vgrf6.xyzw, vgrf7.wwww the last instruction would be wrongly changed to add vgrf10.x, vgrf6.xyzw, vgrf9.zzzz during copy propagation. The issue is that when deciding if a record should be cleared, the old code checked for inst->dst.writemask & (1 << ch) instead of inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch)) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749 Signed-off-by: Chia-I Wu <[email protected]> Cc: Jordan Justen <[email protected]> Cc: Matt Turner <[email protected]> Reviewed-by: Ian Romainck <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "10.1" <[email protected]>
* i965/vec4: Add a test for copy propagation behavior.Eric Anholt2014-04-083-0/+164
| | | | | | | I thought I was seeing a bug in the code while reviewing, but it's not there. Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Track whether we're doing dual source in a more obvious way.Eric Anholt2014-04-083-3/+5
| | | | | | I'm going to be turning dual_src_output into an array in a moment. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add a couple more global special regs to special[]Eric Anholt2014-04-081-0/+2
| | | | | | | Nothing bad came of this because they weren't used after visitor running, but leaving them in a bad state seems like a recipe for pain later. Suggested-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle arrays of special regs more cleanly.Eric Anholt2014-04-081-14/+22
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix dump_instructions() on uniforms.Eric Anholt2014-04-081-2/+2
| | | | | | All of a vec4 uniform was being printed as "u0" Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix vgrf0 live interval when no interpolation was done.Eric Anholt2014-04-081-2/+4
| | | | | | | | | | When you've got a simple solid-color shader that doesn't generate pixel_x/y interpolation, we were deciding that the first vgrf was both the undefined pixel_x and pixel_y, and extending its live interval to avoid the stride problem. That tricked other optimization that tries to see if a particular instruction is the last use of a variable. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Drop pointless check for variable declarations in splitting.Eric Anholt2014-04-081-10/+5
| | | | | | | We're walking the whole instruction stream, so we know the declaration will be found. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove stale comment.Eric Anholt2014-04-081-1/+0
| | | | | | | | We stopped doing variable index lowering for uniforms in a64c1eb9b110f29b8abf803a8256306702629bdc, 5 months after the comment was added. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Move tree grafting's debug output to stderr.Eric Anholt2014-04-081-15/+15
| | | | | | The rest of our compiler dumps are there, now. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Skip making a temporary for assignments when we don't need one.Eric Anholt2014-04-082-61/+123
| | | | | | | | | | | | | | | | | | While we wish our optimization passes could identify all the cases where we can coalesce our variables, we miss out on a lot of opportunities. total instructions in shared programs: 1673849 -> 1673166 (-0.04%) instructions in affected programs: 299521 -> 298838 (-0.23%) GAINED: 7 LOST: 0 Note that many programs are "hurt". The notable ones are where we produce unrolling in cases we didn't before (presumably just because of the lower instruction count). But there are also some cases where pushing things right into the variables prevents copy propagation and tree grafting, since we don't split our variable usage webs apart. Reviewed-by: Kenneth Graunke <[email protected]>
* i915: Fix build error.Iago Toral Quiroga2014-04-081-6/+0
| | | | | | | is_power_of_two() is now provided by mesa so its definition must be removed from the i915 driver code. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Pass ctx->Const.NativeIntegers to do_algebraic.Kenneth Graunke2014-04-084-6/+8
| | | | | | | | | The next patch will introduce an optimization that only works when integers are not represented as floating point values. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Pass ctx->Const.NativeIntegers to do_common_optimization().Kenneth Graunke2014-04-088-9/+18
| | | | | | | | | | | The next few patches will introduce an optimization that only works when integers are not represented as floating point values. v2: Re-word-wrap a line, as requested by Ian Romanick. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Validate that base types match for a number of binops.Kenneth Graunke2014-04-081-0/+3
| | | | | | | | | The IR is not supposed to support implicit type conversions; we just failed to validate it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Fix lack of i2u in lower_ubo_reference.Kenneth Graunke2014-04-081-3/+7
| | | | | | | | | | | | | | | | | ir_binop_ubo_load takes unsigned integer operands. However, the array index used to compute these offsets may be a signed integer. (For example, see Piglit's spec/glsl-1.40/uniform_buffer/fs-bvec-array). For some reason, we were missing an ir_binop_i2u cast, and ir_validator was failing to catch that. Without this change, ir_builder's type inference code broke for me when writing a new optimization pass. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Skip emitting MACH/MOV for small integers.Kenneth Graunke2014-04-081-12/+21
| | | | | | | | | | | | | | | | | The vector backend already implemented this optimization, but surprisingly, we never bothered to implement it in the scalar backend. In addition to saving two instructions, this eliminates a use of the accumulator as an explicit source, which is unsupported in SIMD16 mode on Gen7+, which could help us gain SIMD16 programs. Cuts 19.23% of the instructions in dolphin/efb2ram.shader_test. v2: Rebase on is_16bit_integer_constant -> is_uint16_constant rename. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Make is_16bit_constant from i965 an ir_constant method.Kenneth Graunke2014-04-083-16/+26
| | | | | | | | | | | | | | | | | | | | | | The i965 MUL instruction doesn't natively support 32-bit by 32-bit integer multiplication; additional instructions (MACH/MOV) are required. However, we can avoid those if we know one of the operands can be represented in 16 bits or less. The vector backend's is_16bit_constant static helper function checks for this. We want to be able to use it in the scalar backend as well, which means moving the function to a more generally-usable location. Since it isn't i965 specific, I decided to make it an ir_constant method, in case it ends up being useful to other people as well. v2: Rename from is_16bit_integer_constant to is_uint16_constant, as suggested by Ilia Mirkin. Update comments to clarify that it does apply to both int and uint types, as long as the value is non-negative and fits in 16-bits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: Move is_power_of_two() function from brw_context.h to macros.h.Kenneth Graunke2014-04-082-6/+11
| | | | | | | | | This makes the function available from core Mesa code, including the GLSL compiler. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix "SIMD16 unsupported" messages via KHR_debug.Kenneth Graunke2014-04-081-1/+1
| | | | | | | | | | Performance warnings are logged via KHR_debug in addition to when the INTEL_DEBUG=perf environment variable is set. Without this, messages in debug contexts would have "(null)" for the reason. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Fix missing dirty bits in the gen8_sbe_state atom.Kenneth Graunke2014-04-071-2/+2
| | | | | | | | | | These are clearly needed---the comments in the function are even present for each one of them. I originally had two separate state atoms for 3DSTATE_SBE and 3DSTATE_SBE_SWIZ. When I combined the functions, I must have forgotten to add the atoms for 3DSTATE_SBE_SWIZ. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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