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* i965: Emit ELSE/ENDIF JIP with type D on Gen 7.Matt Turner2014-09-251-2/+2
| | | | | | | | | | The spec says the type must be W (JIP is 16-bits after all), but we've been emitting it with a UD type all along and have experienced no adverse effects. Changing the type to D allows ELSE and ENDIF instructions to be compacted. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Support compaction of control flow instructions.Matt Turner2014-09-251-14/+16
| | | | | | | | | | | | We're currently emitting compactable control flow instruction the wrong types, preventing their compaction. The next patch will fix this and actually enable compaction. On chips that cannot compact control flow instructions, attempts to find a match in the datatype table will fail. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Add support for G45.Matt Turner2014-09-251-15/+24
| | | | | Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add BRW_OPCODE_NENOP for G45.Matt Turner2014-09-252-2/+4
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Add support for Gen5.Matt Turner2014-09-251-5/+210
| | | | | | Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Acked-by: Ian Romanick <[email protected]>
* i965/compaction: Reduce size of compacted_counts[] array.Matt Turner2014-09-251-22/+37
| | | | | | | | | The array was previously indexed in units of brw_compact_inst (8-bytes), but before compaction all instructions are uncompacted, so every odd element was unused. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Use sizeof brw_inst/brw_compact_inst.Matt Turner2014-09-251-15/+17
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Increment offset in for loop.Matt Turner2014-09-251-3/+2
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/compaction: Make src_offset local to the for loop.Matt Turner2014-09-251-8/+4
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Remove unnecessary is-compacted? check.Matt Turner2014-09-251-2/+3
| | | | | | | | Used to pass over previously compacted instructions in this loop, but no longer. No point in checking. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Don't set UIP on ELSE on Gen < 8.Matt Turner2014-09-251-1/+2
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/compaction: Rework 3-src compaction logic.Matt Turner2014-09-251-5/+9
| | | | | | | | | It may be possible to create a contrived example in which a 3-src instruction would have been compacted on Gen < 8. I'd rather not discover it in the wild. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/sf: Disable instruction compaction.Matt Turner2014-09-251-1/+4
| | | | | | | | Currently a no-op, since instruction compaction isn't implemented for the generations that have a programmable strips-and-fans unit. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Set JumpCount, not JIP, on ENDIF on Gen 6.Matt Turner2014-09-251-4/+7
| | | | | | | | Despite what the Sandybridge PRM says, ENDIF has Jump Count in <dst>, not JIP in <src1>. (The same mistake appears about WHILE as well). Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Use VertexArray, not _VertexArray, in array size expressions.Kenneth Graunke2014-09-243-6/+6
| | | | | | | | | Both sizes are VERT_ATTRIB_MAX, so this has no effect. But it drops a few trivial uses of the derived state. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Set correct array element in vbo_exec_vtx_init.Kenneth Graunke2014-09-241-1/+1
| | | | | | | | | | | I'm not familiar with this code, but this sure appears to be a typo. It looks like the intent is to set each array element, not arrays[0] each time. Notably, the loop just below uses "array", not "arrays". Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: [email protected]
* mesa: Use proper structure for glGet*(GL_TEXTURE_COORD_ARRAY*).Kenneth Graunke2014-09-241-4/+4
| | | | | | | | | | | | | | | | | | The code in get.c that handles this uses ctx->Array.VAO->VertexAttrib, which is a gl_vertex_attrib_array structure, not a gl_client_array. The offsets of all fields happened to be the same in both structures, at least on x86_64. "Size," "Type," and "Stride" are obviously the same: both structures start with the same fields, in the same order. "Enabled" is dicier: there are different fields before it in both structures, including pointer sized values which might need special alignment. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: [email protected]
* mesa: Remove some dead helper functions.Kenneth Graunke2014-09-241-26/+0
| | | | | | | | | Dead since the _MaxElement removal, but these functions seemed generally applicable, so I decided to remove them in a separate patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* vc4: Compute max_index instead of trusting the rest of userspace.Eric Anholt2014-09-241-5/+13
| | | | | | | | | | | | | | max_index was coming from either the user telling us as part of glDrawRangeElements, or from an incidental calculation as part of some sort of primitive conversion fallback. Sometimes, it was just set to the default "I don't know" ~0 value. If it wasn't set to the actual max index, then the kernel would reject the draw call for allowing out-of-bounds VBO reads. So, compute the max index from the sizes of the VBOs, which isn't too expensive (unlike mapping and reading the index buffer) and is reliable. Fixes piglit vao-element-array-buffer.
* vc4: Move shader record setup before the draw call.Eric Anholt2014-09-241-38/+38
| | | | | The flush only happens after both are written, so we can do them in either order. This will let me compute max_index during the shader record setup.
* i965/vec4: Call calculate_cfg() in test programs to avoid crashing.Matt Turner2014-09-242-0/+2
| | | | Reported-by: Mark Janes <[email protected]>
* vc4: Add support for gl_PointCoord.Eric Anholt2014-09-241-0/+34
| | | | Fixes piglit glsl-fs-pointcoord, point-sprite, and fbo-gl_pointcoord.
* vc4: Add support for point size setting.Eric Anholt2014-09-246-6/+47
| | | | This is the support for both the global and per-vertex modes.
* vc4: Add support for line width setting.Eric Anholt2014-09-242-0/+5
| | | | | I don't see piglit tests for it, but this should be better than not emitting it at all.
* vc4: Actually add support for polygon offset.Eric Anholt2014-09-243-1/+28
| | | | | Setting the bit without setting the offset values is kind of useless. Fixes piglit polygon-offset (but not polygon-mode-offset).
* vc4: Fix swapped 565 dithering versus no-dithering render configs.Eric Anholt2014-09-241-2/+2
| | | | | Fixes many 565 piglit tests (like fbo-generatemipmap-formats) that weren't expecting dithering.
* vc4: Add support for alpha test.Eric Anholt2014-09-242-0/+70
| | | | Fixes most of piglit fbo-alphatest-formats (but not RGB565/332).
* freedreno/a3xx: initial texture border-colorRob Clark2014-09-246-15/+65
| | | | | | | | | | | | Still some open questions.. and at any rate, no additional piglit passes due to various wrap modes that we need to emulate in at least some cases :-( But it does fix some mystery page-faults.. So add some comments in the code where there are things that we need to emulate or do more r/e, and push as-is. Signed-off-by: Rob Clark <[email protected]>
* util: use linear formats in util_blit_pixels()Brian Paul2014-09-241-2/+2
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* util: simplify writemask parameters for util_blit_pixels()Brian Paul2014-09-242-15/+17
| | | | | | | Instead of separate color and Z/S writemasks, just have one writemask parameter that takes a mask of the PIPE_MASK_[RGBAZS] flags. Reviewed-by: Charmaine Lee <[email protected]>
* util: s/PIPE_TEX_MIPFILTER/PIPE_TEX_FILTER/ in u_blit codeBrian Paul2014-09-241-5/+5
| | | | | | | | | | PIPE_TEX_MIPFILTER_x is not legal for the pipe_sampler_state:: min/mag_img_filter fields. But PIPE_TEX_MIPFILTER_x == PIPE_TEX_FILTER_x so we were getting lucky. This also makes the code consistent with u_blitter.c. Reviewed-by: Charmaine Lee <[email protected]>
* mesa: remove EXT suffix from FBO error messagesBrian Paul2014-09-241-30/+30
| | | | | | And use pass caller="" for _mesa_FramebufferTexture(). Reviewed-by: Matt Turner <[email protected]>
* mesa: Drop _mesa_getenv() wrapper.Matt Turner2014-09-2417-66/+47
| | | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Drop _mesa_bsearch() wrapper.Matt Turner2014-09-243-25/+4
| | | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Unifdef _WIN32_WCE.Matt Turner2014-09-247-39/+3
| | | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Unifdef _XBOX.Matt Turner2014-09-241-1/+1
| | | | | | | | Inexplicably added in commit 36940429. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Remove duplicate -DHAVE_PTHREAD.Matt Turner2014-09-241-5/+4
| | | | | | | It's also defined by the AX_PTHREAD macro. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Stop checking for perl.Matt Turner2014-09-241-2/+0
| | | | | | | Added by commit a75c6163, but no longer used. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Use test -a, rather than another test.Matt Turner2014-09-241-9/+9
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Use realloc() instead of _mesa_realloc() and remove the latter.Matt Turner2014-09-247-30/+8
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: Remove duplicate _mesa_{init,free}_shader_state prototypes.Matt Turner2014-09-241-7/+0
| | | | Reviewed-by: Tapani Pälli <[email protected]>
* gallivm: Wrap deleted inlcude in if HAVE_LLVM < 0x0306Tom Stellard2014-09-241-0/+2
| | | | This was missed in 8f4ee56.
* i965: Add and use functions to get next/prev blocks.Matt Turner2014-09-246-20/+73
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Call insert and remove functions from exec_node directly.Matt Turner2014-09-243-14/+11
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Make instruction lists local to the bblocks.Matt Turner2014-09-2412-92/+115
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add note about double-loop macros and break behavior.Matt Turner2014-09-241-0/+6
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Replace initialization loops with memset().Matt Turner2014-09-242-15/+5
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/vec4: Don't iterate between blocks with inst->next/prev.Matt Turner2014-09-241-21/+9
| | | | | | The register coalescing portion of this patch hurts three shaders in Guacamelee by one instruction each, but examining the diff makes me believe that what we were generating was (perhaps harmlessly) incorrect.
* i965/fs: Don't iterate between blocks with inst->next/prev.Matt Turner2014-09-245-47/+34
| | | | | | When instruction lists are per-basic block, this won't work. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add macros to iterate through a block given a starting point.Matt Turner2014-09-241-0/+10
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
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