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* nir: Fix output swizzle in get_mul_for_srcSamuel Iglesias Gonsalvez2015-08-031-1/+12
* i965/nir/vec4: Add implementation of nir_emit_texture()Alejandro Piñeiro2015-08-031-1/+194
* i965/ir/vec4: Refactor visit(ir_texture *ir)Alejandro Piñeiro2015-08-032-173/+209
* i965/vec4: Add a new dst_reg constructor accepting a brw_reg_typeAlejandro Piñeiro2015-08-032-0/+13
* i965/vec4: Change vec4_visitor::swizzle_result() method to allow reuseAlejandro Piñeiro2015-08-032-8/+15
* i965/vec4: Change vec4_visitor::gather_channel() method to allow reuseEduardo Lima Mitev2015-08-032-5/+6
* i965/vec4: Change vec4_visitor::emit_mcs_fetch() method to allow reuseEduardo Lima Mitev2015-08-032-6/+8
* i965/vec4: Move is_high_sample() method to vec4_visitor classEduardo Lima Mitev2015-08-032-3/+4
* i965/nir: Add new utility method brw_glsl_base_type_for_nir_type()Eduardo Lima Mitev2015-08-033-14/+25
* i965/nir/vec4: Implement nir_emit_jumpEduardo Lima Mitev2015-08-031-1/+14
* i965/nir/vec4: Mark as unreachable ops that should be already loweredAntia Puentes2015-08-031-0/+17
* i965/nir/vec4: Implement vector "any" operationAntia Puentes2015-08-031-0/+14
* i965/nir/vec4: Implement the dot product operationAntia Puentes2015-08-031-0/+15
* i965/nir/vec4: Implement conditional selectAntia Puentes2015-08-031-0/+6
* i965/nir/vec4: Implement linear interpolationAntia Puentes2015-08-031-0/+5
* i965/vec4: Return the emitted instruction in emit_lrp()Antia Puentes2015-08-032-6/+6
* i965/nir/vec4: Implement floating-point fused multiply-addAntia Puentes2015-08-031-0/+9
* i965/nir/vec4: Implement "shift" operationsAntia Puentes2015-08-031-0/+12
* i965/nir/vec4: Implement the "sign" operationAntia Puentes2015-08-031-0/+33
* i965/nir/vec4: Implement bit operationsAntia Puentes2015-08-031-0/+62
* i965/nir/vec4: Implement pack/unpack operationsAntia Puentes2015-08-031-0/+44
* i965/nir/vec4: "noise" ops should already be loweredAntia Puentes2015-08-031-0/+18
* i965/nir/vec4: Implement "bool<->int,float" format conversionAntia Puentes2015-08-031-0/+19
* i965/nir/vec4: Implement logical operatorsAntia Puentes2015-08-031-0/+16
* i965/nir/vec4: Implement non-equality ops on vectorsAntia Puentes2015-08-031-0/+34
* i965/nir/vec4: Implement equality ops on vectorsAntia Puentes2015-08-031-0/+33
* i965/nir/vec4: Implement non-vector comparison opsAntia Puentes2015-08-031-0/+14
* i965/nir: Add utility method for comparisonsAntia Puentes2015-08-031-0/+39
* i965/nir/vec4: Derivatives are not allowed in VSAntia Puentes2015-08-031-0/+8
* i965/nir/vec4: Implement min/max operationsAntia Puentes2015-08-031-0/+14
* i965/vec4: Return the emitted instruction in emit_minmax()Antia Puentes2015-08-032-3/+5
* i965/nir/vec4: Implement various rounding functionsAntia Puentes2015-08-031-0/+35
* i965/nir/vec4: Implement carry/borrow for addition/subtractionAntia Puentes2015-08-031-0/+16
* i965/nir/vec4: Implement more math operationsAntia Puentes2015-08-031-0/+52
* i965/vec4: Return the last emitted instruction in emit_math()Antia Puentes2015-08-032-4/+7
* i965/nir/vec4: Implement multiplicationAntia Puentes2015-08-031-0/+44
* i965/nir/vec4: Implement the addition operationAntia Puentes2015-08-031-0/+7
* i965/nir/vec4: Implement int<->float format conversion opsAntia Puentes2015-08-031-0/+11
* i965/nir/vec4: Lower "vecN" instructions and mark them unreachableAntia Puentes2015-08-032-0/+10
* i965/nir/vec4: Implement single-element "mov" operationsAntia Puentes2015-08-031-0/+13
* i965/nir: Disable alu_to_scalar pass on non-scalar shadersAlejandro Piñeiro2015-08-031-6/+10
* i965/nir/vec4: Prepare source and destination registers for ALU operationsAntia Puentes2015-08-031-1/+18
* i965/nir/vec4: Implement loading values from an UBOAntia Puentes2015-08-031-2/+59
* i965/nir/vec4: Implement atomic counter intrinsics (read, inc and dec)Alejandro Piñeiro2015-08-031-2/+25
* i965/nir/vec4: Implement load_uniform intrinsicIago Toral Quiroga2015-08-031-2/+24
* i965/nir/vec4: Implement intrinsics that load system valuesAlejandro Piñeiro2015-08-031-6/+21
* i965/nir/vec4: Implement store_output intrinsicEduardo Lima Mitev2015-08-032-3/+19
* i965/vec4: Make sure that register types always match during emit_urb_slot()Eduardo Lima Mitev2015-08-031-5/+10
* i965/nir/vec4: Implement load_input intrinsicEduardo Lima Mitev2015-08-031-2/+20
* i965/nir/vec4: Implement loop statements (nir_cf_node_loop)Eduardo Lima Mitev2015-08-031-1/+5
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