summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* i965/fs: Add support for 16-wide dispatch with uniforms in use.Eric Anholt2011-04-262-8/+53
| | | | | | | | | | | | This is glued in in a bit of an ugly way -- we rely on the uniforms having been set up by 8-wide dispatch, and we just reuse them without the ability to add new uniforms for any reason, since the 8-wide compile is already completed. Today, this all works out because our optimization passes are effectively the same for both and even if they weren't, we don't reduce the set of uniforms pushed after optimization. Reviewed-by: Kenneth Graunke <[email protected]>
* hash_table: Add an iterator for doing things like cleanup of the HT.Eric Anholt2011-04-262-0/+26
| | | | | | | Without this, consumers often have to keep linked lists of the entries, at additional malloc cost. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add a little whitespace between shader dumping debug.Eric Anholt2011-04-261-1/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for compr4 MRF writes.Eric Anholt2011-04-261-14/+18
| | | | | | | These reduce an emitted (not decoded) instruction per shader on g4x/gen5, but may allow for additional register coalescing as well. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide dispatch on gen5.Eric Anholt2011-04-263-12/+93
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add initial support for 16-wide dispatch on gen6.Eric Anholt2011-04-266-81/+210
| | | | | | | | | At this point it doesn't do uniforms, which have to be laid out the same between 8 and 16. Other than that, it supports everything but flow control, which was the thing that forced us to choose 8-wide for general GLSL support. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for discard instructions in 16-wide mode.Eric Anholt2011-04-261-0/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for math instructions in 16-wide mode.Eric Anholt2011-04-263-14/+45
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix interference calculation of pixel_[xy] in 16-wide.Eric Anholt2011-04-261-0/+23
| | | | | | Fixes glsl-fs-ceil in that mode, which produced the code in the comment. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Disable some optimization passes under 16-wide for now.Eric Anholt2011-04-262-0/+15
| | | | | | | These are fixable for 16, but that can wait until after it's basically working. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide texturing on gen5+.Eric Anholt2011-04-261-21/+29
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for computing pixel_[xy] in 16-wide.Eric Anholt2011-04-262-10/+46
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for 16-wide dispatch to the register allocator.Eric Anholt2011-04-261-19/+37
| | | | | | | | Note that the virtual grfs are in increments of the dispatch_width, not hardware registers -- this makes the 16-wide emit and 8-wide emit mostly the same. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move the destination reg setup for 8/16 wide to the emit code.Eric Anholt2011-04-264-10/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Use tiling for dri2AllocateBuffer implementationKristian Høgsberg2011-04-261-1/+10
|
* intel: Set gen in intelInitScreen, just copy value in intelInitContextKristian Høgsberg2011-04-263-5/+14
|
* intel: Use X tiling for DRM EGL ImagesKristian Høgsberg2011-04-261-1/+1
|
* mesa: Remove SWcontext::_FogMode, use gl_context::gl_fog_attrib::Mode everywhereIan Romanick2011-04-253-3/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* egl: Use the right extension name in #ifdefKristian Høgsberg2011-04-251-1/+1
|
* wayland: Fix prototypes for EGL_WL_bind_wayland_display extensionKristian Høgsberg2011-04-251-3/+2
|
* main: remove duplicated includesNicolas Kaiser2011-04-252-2/+0
| | | | | | | Remove duplicated includes of guarded headers. Signed-off-by: Nicolas Kaiser <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* winsys/wayland: Fix typo in MakefileBenjamin Franzke2011-04-251-1/+1
| | | | Reported by dir1212 on irc.
* st/egl: Add wayland shm softpipe supportBenjamin Franzke2011-04-254-3/+192
|
* st/egl: Generalize wayland backend a bitBenjamin Franzke2011-04-253-253/+361
|
* winsys: Add wayland shm sw winsysBenjamin Franzke2011-04-255-0/+344
|
* r600g: Unify comment style somewhat.Henri Verbeet2011-04-257-48/+53
| | | | Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Cleanup the big endian support a bit.Henri Verbeet2011-04-2511-162/+166
| | | | | | | In particular, make sure the code is at least compiled on little endian systems. Signed-off-by: Henri Verbeet <[email protected]>
* r600g: Use EG constants in EG r600_colorformat_endian_swap().Henri Verbeet2011-04-251-21/+21
| | | | | | This would actually fail to compile when PIPE_ARCH_BIG_ENDIAN is defined. Signed-off-by: Henri Verbeet <[email protected]>
* configure.ac: require LLVM for r300g on x86 and x86_64Marek Olšák2011-04-251-1/+8
|
* configure.ac: enable LLVM by default on x86 and x86_64Marek Olšák2011-04-251-1/+6
|
* mesa: add stricter checks for float formats in the texstore memcpy pathMarek Olšák2011-04-251-0/+2
| | | | | E.g. when the internal format was RGBA16F and the source was RG, it would use memcpy.
* mesa: implement generate-mipmap fallback for RGB10_A2Marek Olšák2011-04-251-0/+80
| | | | | | | | | | I hit this when testing RV350, which lacks RGB10_A2 render target support. It had been missed when implementing the format and probably unused by anything else too. Not applicable to 7.10. Reviewed-by: Eric Anholt <[email protected]>
* r600g: Remove r600_helper.c from SConscript.Vinson Lee2011-04-241-1/+0
| | | | This is a follow-up to commit d737857ed2ff4313fd6046dcd80018c6308a53c5.
* docs: update GL3 statusMarek Olšák2011-04-251-4/+4
|
* r600g: remove some pointless and unused functionsMarek Olšák2011-04-253-21/+3
|
* r600g: do not reset device to 0 when doing unrelated operationsMarek Olšák2011-04-251-2/+0
| | | | Seems to be a copy-paste bug.
* r600g: trivially implement LATC/3DCMarek Olšák2011-04-251-0/+4
| | | | Passes fbo-generatemipmap-formats.
* r600g: drop r600_helper.c no point in itDave Airlie2011-04-254-73/+39
| | | | | | move the one function into state common Signed-off-by: Dave Airlie <[email protected]>
* r600g: enable EXT_draw_buffers2Dave Airlie2011-04-251-5/+1
| | | | | | | Doesn't cause any piglit regression and passes the fbo-draw-buffers-blend test. Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: fix regression since a22aba4eae9b29db731487bce90e8292f7e82c72Dave Airlie2011-04-251-2/+2
| | | | | | | | | | "st/mesa: check image size before copy_image_data_to_texture()" caused a regression in piglit fbo-generatemipmap-formats test on all gallium drivers. Level 0 for NPOT textures will not match minified values, so don't do this check for level 0. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix glean clipflat test.Dave Airlie2011-04-242-3/+8
| | | | | | | | the provoking vertex doesn't apply to quad/strip/polygon. This fixes clipFlat on r600g. Signed-off-by: Dave Airlie <[email protected]>
* r300g: reorder capsMarek Olšák2011-04-241-13/+11
|
* r300g: fix exposing caps on r300-r400Marek Olšák2011-04-241-2/+2
| | | | Broken with 72239d16cd08113e994ea3508f91193c682b0930.
* glsl: Fix typos in comments.Bryan Cain2011-04-231-6/+6
|
* r600g: fix glsl-fs-abs-negDave Airlie2011-04-241-0/+2
| | | | | | the hw does neg after abs, so don't neg the source in the ABS instruction case. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix bank swizzle calcs for scalar only operations.Dave Airlie2011-04-241-15/+25
| | | | | | | | | | | | In the initial code if we had nothing in the vector slots r would never get reset to 0, so we'd fail to compile shaders, after the previous commit this would happen for the LIT tests. When I fixed that we did a lot of unnecessary loops through all the vector states when we had no vector slots filled. So this patch optimises thing for the scalar only state. This fixes the 3 LIT piglit tests on r600g. Signed-off-by: Dave Airlie <[email protected]>
* r600g: PV/PS have cycle restrictions in scalar operationsDave Airlie2011-04-241-2/+6
| | | | | | | | | | In the R600 ISA document: Section 4.7.5 Cycle restrictions for the ALU.trans states that PV/PS have cycle restrictions wrt constants. This is part of a fix for the LIT tests Signed-off-by: Dave Airlie <[email protected]>
* mesa: Add some comments about FRAG_RESULT_COLOR vs FRAG_RESULT_DATAn.Eric Anholt2011-04-231-0/+8
| | | | | This came from reading what swrast does, and 965 now behaves the same and gallium appears to as well.
* mesa: Fix fragment.color (no index) writes with OPTION ARB_draw_buffers.Eric Anholt2011-04-231-3/+8
| | | | | | | | | Fixes a bug in Trine where fragment.color would write FRAG_RESULT_COLOR (which is interpreted by drivers as being the "write this to all color buffers" option) instead of FRAG_RESULT_DATA0 (just the first target). Fixes piglit ATI_draw_buffers/arbfp-no-index.
* i965: Don't double-emit fragment.color writes for MRT with ARB_fp.Eric Anholt2011-04-232-35/+19
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 15:06:40 +0000