summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* broadcom/vc5: Fix a segfault on mix of booleans.Eric Anholt2018-02-011-1/+3
| | | | We don't have a src1 to look up if the compare instruction is "i2b".
* broadcom/vc5: Skip over missing color buffers for a couple of checks.Eric Anholt2018-02-012-0/+6
| | | | Fixes crashes in piglit alpha-to-coverage-no-draw-buffer-zero 2
* broadcom/vc5: Add the missing PIPE_CAP_FENCE_SIGNAL.Eric Anholt2018-02-011-0/+1
|
* mesa: fix query of GL_TEXTURE_COMPRESSION_HINT_ARBBaldur Karlsson2018-02-011-1/+1
| | | | | | | Fixes: f96a69f916a ("mesa: replace GLenum with GLenum16 in common structures (v4)") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104908 Reviewed-by: Brian Paul <[email protected]>
* renderonly: fix dumb BO allocation for non 32bpp formatsLucas Stach2018-02-011-1/+2
| | | | | | | | | | | | Take into account the resource format, instead of applying a hardcoded 32bpp. This not only over-allocates 16bpp formats, but also results in a wrong stride being filled into the handle. Fixes: 848b49b288f ("gallium: add renderonly library") CC: <[email protected]> Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Daniel Stone <[email protected]>
* intel/decoder: Fix control / evaluation label mixup.Kenneth Graunke2018-02-011-2/+2
| | | | Trivial. DS is TES, HS is TCS.
* i965: Bump official kernel requirement to Linux v3.9.Kenneth Graunke2018-02-011-2/+2
| | | | | | | | | | | | | | | | In commit 3f353342a6b6744773c26ed66b12afed42bd57af (present in 17.3.0) we started unconditionally using I915_EXEC_NO_RELOC, which was introduced in Linux v3.9. ChromeOS kernel 3.8 has backported this, so it should work too. Running on older kernels would likely result in every single batch being rejected by the kernel, which is pretty catastrophic. Yet, it appears that nobody noticed. So, let's just bump the official requirement and move forward ever so slowly. Fixes: 3f353342a6b ("i965: Use I915_EXEC_NO_RELOC") Reviewed-by: Chris Wilson <[email protected]> Acked-by: Emil Velikov <[email protected]>
* meson: don't install windows headers on non-windows platformsMarc Dietrich2018-02-011-1/+3
| | | | | | | | Only dive into the windows subdir if windows platform is selected. Signed-off-by: Marc Dietrich <[email protected]> Fixes: 5ef75cb02b2b4db5506b8 "meson: build src/glx/windows" Reviewed-by: Eric Engestrom <[email protected]>
* radeonsi: use ac_build_buffer_load_format for image buffer loadsMarek Olšák2018-02-011-4/+10
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: use ac_build_buffer_load_format for image buffer loadsMarek Olšák2018-02-011-8/+13
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add glc parameter to ac_build_buffer_load_formatMarek Olšák2018-02-015-5/+7
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: load the right number of components for VS inputs and TBOsMarek Olšák2018-02-014-5/+54
| | | | | | | | | | | | | | | | | | | | | | | The supported counts are 1, 2, 4. (3=4) The following snippet loads float, vec2, vec3, and vec4: Before: buffer_load_format_x v9, v4, s[0:3], 0 idxen ; E0002000 80000904 buffer_load_format_xyzw v[0:3], v5, s[8:11], 0 idxen ; E00C2000 80020005 s_waitcnt vmcnt(0) ; BF8C0F70 buffer_load_format_xyzw v[2:5], v6, s[12:15], 0 idxen ; E00C2000 80030206 s_waitcnt vmcnt(0) ; BF8C0F70 buffer_load_format_xyzw v[5:8], v7, s[4:7], 0 idxen ; E00C2000 80010507 After: buffer_load_format_x v10, v4, s[0:3], 0 idxen ; E0002000 80000A04 buffer_load_format_xy v[8:9], v5, s[8:11], 0 idxen ; E0042000 80020805 buffer_load_format_xyzw v[0:3], v6, s[12:15], 0 idxen ; E00C2000 80030006 s_waitcnt vmcnt(0) ; BF8C0F70 buffer_load_format_xyzw v[3:6], v7, s[4:7], 0 idxen ; E00C2000 80010307 Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: remove unused si_shader_context membersMarek Olšák2018-02-012-11/+0
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* glx/apple: locate dispatch table functions to wrap by nameJon Turney2018-02-013-7/+22
| | | | | | | | | | | | | Avoid reaching into the dispatch table internals (and thus having to deal with the complexities of remap etc.) by identifying functions to wrap by name. See: https://lists.freedesktop.org/archives/mesa-dev/2015-June/086721.html et seq. https://bugs.freedesktop.org/show_bug.cgi?id=90311 Signed-off-by: Jon Turney <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glx/apple: include util/debug.h for env_var_as_boolean prototypeJon Turney2018-02-012-0/+2
| | | | | | | | mesa/src/glx/glxcmds.c:1295:21: error: implicit declaration of function 'env_var_as_boolean' is invalid in C99 [-Werror,-Wimplicit-function-declaration] mesa/src/glx/apple/apple_visual.c:85:28: error: implicit declaration of function 'env_var_as_boolean' is invalid in C99 [-Werror,-Wimplicit-function-declaration] Signed-off-by: Jon Turney <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* osx: ld doesn't support --build-idJon Turney2018-02-012-1/+14
| | | | | Signed-off-by: Jon Turney <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* configure: Default to gbm=no on osxJon Turney2018-02-011-2/+2
| | | | | Signed-off-by: Jon Turney <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: remove usage of alloca in externalobjects.c v4Andres Rodriguez2018-02-011-12/+48
| | | | | | | | | | | | Don't want an overly large numBufferBarriers/numTextureBarriers to blow up the stack. v2: handle malloc errors v3: fix patch v4: initialize texObjs/bufObjs Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]>
* radv: do not insert shaders in cache when it's disabledSamuel Pitoiset2018-02-011-5/+24
| | | | | | | | | | | | | When the application doesn't provide its own pipeline cache, the driver uses a in-memory cache but it shouldn't insert any entries when the cache is explicitely disabled by the user. Found while running my experimental pipeline-db tool with a ton of shaders, the memory footprint was just huge, and sometimes the process was even killed... Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use separate bindings for graphics and compute descriptorsSamuel Pitoiset2018-02-013-53/+125
| | | | | | | | | | | | | The Vulkan spec says: "pipelineBindPoint is a VkPipelineBindPoint indicating whether the descriptors will be used by graphics pipelines or compute pipelines. There is a separate set of bind points for each of graphics and compute, so binding one does not disturb the other." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104732 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: store the bind point when creating descriptors with templatesSamuel Pitoiset2018-02-012-0/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600/eg: make sure we allow vpm bit on other CF ops.Dave Airlie2018-02-011-0/+1
| | | | | | | the vpm bit wasn't being applied to the push/pop instructions. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium/st/clover: remove unused PIPE_SHADER_IR_LLVMTimothy Arceri2018-02-017-19/+5
| | | | | | This has been unused since 100796c15c3a. Acked-by: Marek Olšák <[email protected]>
* r600/sb: just add some missing debug bitsDave Airlie2018-02-011-0/+15
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600: fix buffer resinfo opcode translation.Dave Airlie2018-02-012-2/+2
| | | | | | | | | The vtx operations never got translated, so things worked by 0 being equal to 0, translate them so we can use the proper buffer resinfo code. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/glsl_to_nir: add more nir opts to st_nir_opts()Timothy Arceri2018-02-011-16/+20
| | | | | | | | | | | | | | | | All of the current gallium nir driver use these optimisations but they do so in their backends. Having these called in the backend only can cause a number of problems: - Shader compile times are greater because the opts need to do significant passes over all shader variants. - The shader cache is partially defeated due to the significant optimisation passes over variants. - We might miss out on nir linking optimisation opportunities. Adding these passes to st_nir_opts() alleviates these problems. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: perform 2 uploads with dual slot *64*PASSTHRU formats on gen<8Andres Gomez2018-01-311-5/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The emission of vertex attributes corresponding to dvec3 and dvec4 vertex shader input variables was not correct when the <size> passed to the VertexAttribL* commands was <= 2. In 61a8a55f557 ("i965/gen8: Fix vertex attrib upload for dvec3/4 shader inputs"), for gen8+ we needed to determine if the attrib was dual slot to emit 128 or 256-bit, independently of the VAO size. Similarly, for gen < 8 we also need to determine whether the attrib is dual slot to force the emission of 256-bits through 2 uploads. Additionally, we make use of the ISL_FORMAT_R32_FLOAT format in this second upload to fill these unspecified components with zeros, as we also do for gen8+. Fixes the following test on Haswell: KHR-GL46.vertex_attrib_binding.basic-inputL-case1 v2: Added more inline comments to explain why we are using ISL_FORMAT_R32_FLOAT and its consequences, as requested by Alejandro and Antía. Fixes: 75968a668e4 ("i965/gen7: expose OpenGL 4.2 on Haswell when supported") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103006 Cc: Alejandro Piñeiro <[email protected]> Cc: Juan A. Suarez Romero <[email protected]> Cc: Antia Puentes <[email protected]> Cc: Rafael Antognolli <[email protected]> Cc: Kenneth Graunke <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Antia Puentes <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make texture validation code use texture objects, not units.Kenneth Graunke2018-01-312-16/+17
| | | | | | | | This requires moving the _MaxLevel handling up to the callers. Another user of intel_finalize_mipmap_tree will be added later that depends on _MaxLevel not being modified. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Pass tObj into intel_update_max_level instead of intel_obj.Kenneth Graunke2018-01-311-3/+3
| | | | | | | We want both anyway, but this will simplify things a tiny bit in an upcoming patch. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Delete more misleading comments.Kenneth Graunke2018-01-311-3/+0
| | | | | | | brw_bo_wait_rendering used to take a brw_context pointer for perf_debug messages about stalls. Chris eliminated that in 833108ac14ade91f54cc6e. This message about passing NULL to avoid those warnings is no longer relevant, and just adds confusion. So, drop it.
* docs/features: mark EXT_semaphore(_fd) as DONE v2Andres Rodriguez2018-01-312-3/+4
| | | | | | | | Support for these extensions is available in radeonsi. v2: also updated relnotes Signed-off-by: Andres Rodriguez <[email protected]>
* st/mesa: whitespace, formatting fixes in st_glsl_to_tgsi.cppBrian Paul2018-01-311-104/+169
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* st/mesa: s/int/GLenum/ in st_glsl_to_tgsi.cppBrian Paul2018-01-311-5/+6
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: use opcode local var to simplify some codeBrian Paul2018-01-311-4/+2
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: s/unsigned/VGPU10_OPCODE_TYPE/Brian Paul2018-01-311-10/+11
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* radv: do not dump meta shader statsSamuel Pitoiset2018-01-312-21/+18
| | | | | | | That's quite useless and that pollutes the output. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: fix emission of ffract for 64-bitSamuel Pitoiset2018-01-311-7/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* meson: dedup gallium-xa logicEric Engestrom2018-01-311-15/+10
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* meson: dedup gallium-va logicEric Engestrom2018-01-311-20/+18
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* meson: dedup gallium-omx logicEric Engestrom2018-01-311-19/+19
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* meson: dedup gallium-xvmc logicEric Engestrom2018-01-311-20/+18
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* meson: dedup gallium-vdpau logicEric Engestrom2018-01-311-22/+19
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* Revert "mesa: add missing RGB9_E5 format in _mesa_base_fbo_format"Antia Puentes2018-01-311-3/+0
| | | | | | | | | | | | | | | | | | | | This reverts commit 513c2263cbff45edb105c7b46e58f316e06746ab. _mesa_base_fbo_format_ is used to validate the internalformat passed to RenderbufferStorage, which in the OpenGL 4.6 is said: "An INVALID_ENUM error is generated if internalformat is not one of the color-renderable, depth-renderable, or stencil-renderable formats defined in section 9.4." RGB9_E5 format is not renderable, as stated in the same specification (Bug 9338). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104794 Cc: Juan A. Suarez Romero <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Juan A. Suarez <[email protected]>
* winsys/radeon: Compute is_displayable in surf_drm_to_winsysMichel Dänzer2018-01-311-0/+3
| | | | | | | | It was always 0, breaking (at least) DRI3 with Xwayland. Bugzilla: https://bugs.freedesktop.org/104306 Fixes: 5f2073be3282 ("ac/surface: add ac_surface::is_displayable") Reviewed-by: Marek Olšák <[email protected]>
* radv: remove predication on cache flushesMatthew Nicholls2018-01-314-18/+13
| | | | | | | | | This can lead to a situation where cache flushes could get conditionally disabled while still clearing the flush_bits, and thus flushes due to application pipeline barriers may never get executed. Fixes: a6c2001ace (radv: add support for cmd predication.) Signed-off-by: Dave Airlie <[email protected]>
* mesa: fix broken glGet*(GL_POLYGON_MODE) queryBrian Paul2018-01-302-3/+3
| | | | | | | | | This reverts part of the patch which introduced the GLenum16 change. Fixes a conform regression found by Roland. Fixes: f96a69f916aed405 ("mesa: replace GLenum with GLenum16 in common structures (v4)") Reviewed-by: Roland Scheidegger <[email protected]>
* virgl: also remove dimension on indirect.Dave Airlie2018-01-311-1/+0
| | | | | | | | | This fixes some dEQP tests that generated bad shaders. Fixes: b6f6ead19 (virgl: drop const dimensions on first block.) Reviewed-by: Gurchetan Singh <[email protected]> Tested-by: Gurchetan Singh <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: remove DBG_PRECOMPILEMarek Olšák2018-01-313-51/+0
| | | | | | it's useless and shader-db stats only report the main shader part. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: print shader-db stats for main parts, not final binariesMarek Olšák2018-01-313-13/+23
| | | | | | This is needed to get shader-db stats for LS,HS,ES,GS stages on gfx9. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move max_simd_waves computation into a separate functionMarek Olšák2018-01-312-12/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 12:25:17 +0000