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* mesa: do internal format error checking for glTexStorage()Brian Paul2012-09-111-0/+48
| | | | | | | | Turns out we weren't doing any format checking before. Now check the internal format and, in particular, make sure that unsized internal formats aren't accepted. Note: This is a candidate for the stable branches.
* mesa/msaa: Allow X and Y flips in multisampled blits.Paul Berry2012-09-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the GL 4.3 spec, section 18.3.1 "Blitting Pixel Rectangles": If SAMPLE_BUFFERS for either the read framebuffer or draw framebuffer is greater than zero, no copy is performed and an INVALID_OPERATION error is generated if the dimensions of the source and destination rectangles provided to BlitFramebuffer are not identical, or if the formats of the read and draw framebuffers are not identical. It is not clear from the spec whether "dimensions" should mean both sign and magnitude, or just magnitude. Previously, Mesa interpreted "dimensions" as meaning both sign and magnitude, so any multisampled blit that attempted to flip the image in the X and/or Y direction would fail. However, Y flips are likely to be commonplace in OpenGL applications that have been ported from DirectX applications, as a result of the fact that DirectX and OpenGL differ in their orientation of the Y axis. Furthermore, at least one commercial driver (nVidia) permits Y filps, and L4D2 relies on them being permitted. So it seems prudent for Mesa to permit them. This patch changes Mesa to allow both X and Y flips, since there is no language in the spec to indicate that X and Y flips should be treated differently. NOTE: This is a candidate for stable release branches. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* radeon/llvm: Fix operand order of V_CNDMASK in custom inserterTom Stellard2012-09-111-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Assert if we try to encode an unknown registerTom Stellard2012-09-111-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Add register encoding for VCCTom Stellard2012-09-111-0/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Ignore special registers when calculating reg countTom Stellard2012-09-111-0/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Handle position input parameter for pixel shaders v2Tom Stellard2012-09-114-1/+53
| | | | | | | | v2: - Don't increment ninterp or set any of the have_* flags for TGSI_SEMANTIC_POSITION Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Coding style fixesTom Stellard2012-09-114-31/+31
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Move interpolation mode check into the compilerTom Stellard2012-09-112-12/+21
| | | | | | | The compiler needs to know which interpolation modes are enabled, so it knows which values will be preloaded into the VGPRs. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Add missing interpolation mode to check for enabled modesTom Stellard2012-09-111-0/+1
| | | | | | | At least one interpolation mode must be enable, but the code that checks this was not checking for perspective center. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Pass shader type to the compilerTom Stellard2012-09-111-0/+12
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Add SHADER_TYPE instructionTom Stellard2012-09-118-1/+32
| | | | | | | This allows the program to specify the type of shader being compiled (e.g. PXEL, VERTEX, etc.) Reviewed-by: Michel Dänzer <[email protected]>
* r600g: avoid GPU doing constant preload from random addressJerome Glisse2012-09-112-0/+40
| | | | | | | | | Previous command stream might have set any of the constant buffer and the previous address might no longer be valid thus GPU might preload constant from random invalid address and possibly triggering lockup. Signed-off-by: Jerome Glisse <[email protected]>
* radeonsi: Texture border colour fixes.Michel Dänzer2012-09-113-8/+56
| | | | | | | | | | * Handle arbitrary border colours. * Use correct packing format for detecting special border colours. Fixes piglit tex-border-1 and probably many other tests using border colours. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Handle NULL sampler states.Michel Dänzer2012-09-111-1/+1
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* i965: Remove incorrect comment above opt_algebraic.Kenneth Graunke2012-09-101-8/+0
| | | | | The comment was cut-and-pasted from propagate_constants(), and had no relation at all to opt_algebraic().
* glsl: Generate compile errors for explicit blend indices < 0 or > 1.Kenneth Graunke2012-09-101-2/+17
| | | | | | | | | | | | | | According to the GLSL 4.30 specification, this is a compile time error. Earlier specifications don't specify a behavior, but since 0 and 1 are the only valid indices for dual source blending, it makes sense to generate the error. Fixes (the fixed version of) piglit's layout-12.frag. NOTE: This is a candidate for the 9.0 branch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* r600g: remove unused functionMarek Olšák2012-09-112-22/+0
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* r600g: fix printf warningMarek Olšák2012-09-111-1/+2
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* mesa: bump version to 9.1 (devel)Andreas Boll2012-09-094-5/+5
| | | | | | | Now that branch 9.0 is created, bump the minor version in master. Reviewed-by: Kenneth Graunke <[email protected]>
* Set OSMESA_VERSION=8.Johannes Obermayr2012-09-073-7/+7
| | | | | | VERSION_NUMBER is not required anymore. So it will be removed. Reviewed-by: Adam Jackson <[email protected]>
* nvc0/ir: add initial code to support GK110 ISA encodingChristoph Bumiller2012-09-0710-13/+1691
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* radeonsi: Float format fixups.Michel Dänzer2012-09-071-1/+24
| | | | | | Fixes piglit spec/ARB_texture_float/fbo-generatemipmap-formats. Signed-off-by: Michel Dänzer <[email protected]>
* radeonsi: Handle more SNORM formats.Michel Dänzer2012-09-071-0/+22
| | | | | | | Fixes piglit spec/EXT_texture_snorm/fbo-generatemipmap-formats (except for what seems like a random fluke). Signed-off-by: Michel Dänzer <[email protected]>
* i965: Fix virtual_grf_interferes() between calculate_live_intervals() and DCE.Eric Anholt2012-09-071-0/+24
| | | | | | | This fixes the blue zombies bug in l4d2. NOTE: This is a candidate for the 9.0 branch. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make the param pointer arrays for the VS dynamically sized.Eric Anholt2012-09-074-2/+38
| | | | | | | | | Saves 96MB of wasted memory in the l4d2 demo. v2: Rebase on compare func change, change brace style. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Make the param pointer arrays for the WM dynamically sized.Eric Anholt2012-09-075-4/+46
| | | | | | | | | Saves 26.5MB of wasted memory allocation in the l4d2 demo. v2: Rebase on compare func change, fix comments. Reviewed-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add functions for comparing two brw_wm/vs_prog_data structs.Eric Anholt2012-09-076-6/+78
| | | | | | | | | | | | Currently, this just avoids comparing all unused parts of param[] and pull_param[], but it's a step toward getting rid of those giant statically sized arrays. v2: Actually use the new function instead of just looking at its address. This required changing the args to const pointers. (review by Kenneth) Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Count builtin uniforms against uniform component limits.Eric Anholt2012-09-071-1/+4
| | | | | | | | We don't fully process the builtin uniforms, but at least num_uniform_components reflects reality now. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* radeonsi: Handle TGSI_SEMANTIC_FOG.Michel Dänzer2012-09-071-0/+1
| | | | | | | | | Fixes exponential fog. The pixel shaders for linear fog seem to get miscompiled still somehow. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Match fexp2 for SI.Michel Dänzer2012-09-071-1/+3
| | | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* glapi/glx: rename 'table' variable to 'disp_table'Brian Paul2012-09-061-2/+2
| | | | | | | | | | | | This fixes an issue where the local 'table' variable was hiding the function parameter name in glGetColorTable(..., void *table). This should be OK as long as there's never a GL entrypoint that uses 'disp_table' as a parameter name. Note: This is a candidate for the 9.0 branch. Reviewed-by: Jose Fonseca <[email protected]>
* glx: move 'prime' var into #ifdef'd code blockBrian Paul2012-09-061-8/+10
| | | | | | To silence unused var warning. Reviewed-by: Jose Fonseca <[email protected]>
* i965: Fix primitive restart on Haswell.Kenneth Graunke2012-09-065-1/+43
| | | | | | | | | | | | | | | | | | | | | Haswell moved the "Cut Index Enable" bit from the INDEX_BUFFER packet to a new 3DSTATE_VF packet, so we need to emit that. Also, it requires us to specify the cut index rather than assuming it's 0xffffffff. This adds a new Haswell-specific tracked state atom to gen7_atoms. Normally, we would create a new generation-specific atom list, but since there's only one difference over Ivybridge so far, I chose to simply make it return without doing any work on non-Haswell systems. Fixes five piglit tests: - general/primitive-restart-DISABLE_VBO - general/primitive-restart-VBO_COMBINED_VERTEX_AND_INDEX - general/primitive-restart-VBO_INDEX_ONLY - general/primitive-restart-VBO_SEPARATE_VERTEX_AND_INDEX - general/primitive-restart-VBO_VERTEX_ONLY Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* build: Disable building of d3d1xMatt Turner2012-09-061-5/+7
| | | | | It's broken and unmaintained, and I'm tired of seeing bug reports about it.
* intel: avoid undefined variable warnings in intel_screen.cPaul Berry2012-09-061-2/+3
| | | | Reviewed-by: Matt Turner <[email protected]>
* r600g: order atom emission v3Jerome Glisse2012-09-067-82/+116
| | | | | | | | | | | | | To avoid GPU lockup registers must be emited in a specific order (no kidding ...). This patch rework atom emission so order in which atom are emited in respect to each other is always the same. We don't have any informations on what is the correct order so order will need to be infered from fglrx command stream. v2: add comment warning that atom order should not be taken lightly v3: rebase on top of alphatest atom fix Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix num of dwords needed for alphatest_state atomJerome Glisse2012-09-061-1/+1
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* mesa: Don't advertise GLES extensions in GL contextsChad Versace2012-09-061-5/+6
| | | | | | | | | | | | glGetStringi(GL_EXTENSIONS) failed to respect the context's API, and so returned all internally enabled GLES extensions from a GL context. Likewise, glGetIntegerv(GL_NUM_EXTENSIONS) also failed to repsect the context's API. Note: This is a candidate for the 8.0 and 9.0 branches. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* llvmpipe: Make driver name more informative.José Fonseca2012-09-061-1/+4
| | | | | | | | | | | | | | | Such as "llvmpipe (LLVM 3.1, 128 bits)" or "llvmpipe (LLVM 3.1, 256 bits)" when leveraging AVX 8-wide registers. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: Handle more L/I/A format cases.Michel Dänzer2012-09-061-0/+14
| | | | | | | Fixes piglit fbo-generatemipmap-formats. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Enable whole quad mode for pixel shaders.Michel Dänzer2012-09-061-2/+10
| | | | | | | Fixes wrong mipmap level being sampled at some triangle edges. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Add intrinsic for enabling whole quad mode in SI pixel shaders.Michel Dänzer2012-09-064-0/+23
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: SI shader vector instructions implicitly use the EXEC register.Michel Dänzer2012-09-061-0/+4
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Extend SI EXEC register support.Michel Dänzer2012-09-062-2/+7
| | | | | | | Add 32 bit lo and hi variants, and binary encodings. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Remove R600InstrInfo.td from TD_FILESTom Stellard2012-09-061-1/+0
| | | | | Fixes build bug introduced by cebbdd4ac23725963207bf6f8fc7101150e6065f
* radeonsi: Enable NPOT textures again.Michel Dänzer2012-09-061-1/+1
| | | | | | | | Should be at least mostly working now (with the corresponding fixes in libdrm_radeon). Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: Mipmaps require memory footprint to be padded to powers of two.Michel Dänzer2012-09-061-0/+1
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: Sampler view state simplification.Michel Dänzer2012-09-061-11/+9
| | | | | | | | We can always use the offset and tiling mode from level 0 and restrict the first and last mipmap level to be used in the sampler resource. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: Untiled textures are linear aligned, not linear general.Michel Dänzer2012-09-061-3/+3
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
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