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* meta: Move loop declaration to top of block.José Fonseca2015-01-221-2/+4
| | | | | | Fixes MSVC build. Trvial.
* i965/tex_subimage: use meta instead of the blitter for PBO TexSubImageJason Ekstrand2015-01-221-100/+15
| | | | Reviewed-by: Neil Roberts <[email protected]>
* i965/tex_image: Use meta for instead of the blitter PBO TexImage and GetTexImageJason Ekstrand2015-01-221-179/+18
| | | | Reviewed-by: Neil Roberts <[email protected]>
* i965/pixel_read: Use meta_pbo_GetTexSubImage for PBO ReadPixelsJason Ekstrand2015-01-221-118/+3
| | | | | | | Since the meta path can do strictly more than the blitter path, we just remove the blitter path entirely. Reviewed-by: Neil Roberts <[email protected]>
* meta: Add an implementation of GetTexSubImage for PBOsJason Ekstrand2015-01-222-0/+125
| | | | Reviewed-by: Neil Roberts <[email protected]>
* meta: Add a BlitFramebuffers-based implementation of TexSubImageJason Ekstrand2015-01-223-0/+248
| | | | | | | | | | | | | | This meta path, designed for use with PBO's, creates a temporary texture out of the PBO and uses BlitFramebuffers to do the actual texture upload. v2 Jason Ekstrand <[email protected]>: - Add support for handling simple packing options v3 Jason Ekstrand <[email protected]>: - Refactor to split out the texture-from-pbo code - Rename to _mesa_meta_pbo_TexSubImage Reviewed-by: Neil Roberts <[email protected]>
* formats: Use a hash table for _mesa_format_from_array_formatJason Ekstrand2015-01-221-12/+56
| | | | | | | | | | | Going through the for loop every time has noticable overhead. This fixes things up so we only do that once ever and then just do a hash table lookup which should be much cheaper. v2 Jason Ekstrand <[email protected]>: - Use once_flag and call_once from c11/threads.h instead of pthreads Reviewed-by: Neil Roberts <[email protected]>
* i965: Implement SetTextureStorageForBufferObjectJason Ekstrand2015-01-221-0/+57
| | | | Reviewed-by: Neil Roberts <[email protected]>
* i965: Apply the miptree offset to surface state for renderbuffersJason Ekstrand2015-01-224-4/+8
| | | | | | | | | Previously, we were completely ignoring the mt->offset field for renderbuffers. While it does have some alignment constraints, it is valid to use it. This patch adds the code to each of the 4 surface state setup functions to handle it. Reviewed-by: Neil Roberts <[email protected]>
* i965/mipmap_tree: Add a depth parameter to create_for_boJason Ekstrand2015-01-226-7/+14
| | | | Reviewed-by: Neil Roberts <[email protected]>
* mesa/dd: Add a function for creating a texture from a buffer objectJason Ekstrand2015-01-221-0/+16
| | | | Reviewed-by: Neil Roberts <[email protected]>
* glsl: do not allow interface block to have name already takenTapani Pälli2015-01-221-1/+15
| | | | | | | | | | Fixes currently failing Piglit case interface-blocks-name-reused-globally.vert v2: combine var declaration with assignment (Ian) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Replace assert(0) with unreachable().Matt Turner2015-01-214-43/+22
| | | | | | Fixes a couple of warnings in the process. Reviewed-by: Connor Abbott <[email protected]>
* i965/vec4: Fix fprintf argument ordering.Matt Turner2015-01-211-2/+2
| | | | Introduced in commit 3167a80b.
* nir: Stop using designated initializersJason Ekstrand2015-01-2110-105/+47
| | | | | | | | | Designated initializers with anonymous unions don't work in MSVC or GCC < 4.6. With a couple of constructor methods, we don't need them any more and the code is actually cleaner. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88467 Reviewed-by: Connor Abbot <[email protected]>
* mesa: change assert to unreachable in two format functionsTobias Klausmann2015-01-212-2/+2
| | | | | | | | | | This fixes two problems reported by osc: I: Program returns random data in a function E: Mesa no-return-in-nonvoid-function ../../src/mesa/main/format_utils.c:180 E: Mesa no-return-in-nonvoid-function ../../src/mesa/main/glformats.c:2714 Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* nir: Add src and dest constructorsJason Ekstrand2015-01-211-0/+37
| | | | Reviewed-by: Connor Abbott <[email protected]>
* mesa: Add assert to check number of vector elementsJan Vesely2015-01-212-0/+2
| | | | | | | | The below code crashes when vector_elements <= 0 Fixes Warray-bounds warnings Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* mesa: Fix some signed-unsigned comparison warningsJan Vesely2015-01-2129-54/+56
| | | | | | | | v2: s/unsigned int/unsigned/ in prog_optimize.c Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: David Heidelberg <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* mesa: remove comparisons that are always trueJan Vesely2015-01-212-3/+0
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* nir: Add a nir_foreach_phi_src helper macroJason Ekstrand2015-01-209-11/+14
| | | | Reviewed-by: Connor Abbott <cwabbott02gmail.com>
* i965: Extract scalar region checking logicBen Widawsky2015-01-203-7/+15
| | | | | | | | | | | There are currently 2 users of this functionality. I have 2 more users coming up, and having a simple function makes the results much cleaner. The existing interface semantics was proposed by Matt. v2 (Ken): Rename to region_matches()/has_scalar_region(). Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add QWORD sizes to type_sz macroBen Widawsky2015-01-201-0/+3
| | | | | | | | | | | | | | | | | | | GEN8 added the QWORD as a valid type for certain operations on the EU. In order to calculate the number of registers used one must have the type size as part of the equation. Quoting the formula in the code: regs_written = (dst.width * dst.stride * type_sz(dst.type) + 31) / 32; Adding this separately for bisection since there is no simple way to add an assert in the type_sz function. NOTE: As a side note, I was confused for a while because it's impossible to calculate the region, ie. registers needed, without vstride. However, at this point these are all part of the IR, and so no vstride must exist. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* vc4: Fix build since 8ed5305d28d9309d651dfec3fbf4349854694694Eric Anholt2015-01-201-1/+1
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* freedreno/a4xx: sysmem bypassRob Clark2015-01-201-3/+58
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2015-01-205-23/+36
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeonsi: Re-enable LLVM IR dumpsTom Stellard2015-01-201-1/+3
| | | | | This was inadvertently disabled by 761e36b4caab4e8e09a4c2b1409a825902fc7d2c.
* radeonsi/compute: Use relocs for scratch pointer rather than user sgprs v2Tom Stellard2015-01-201-0/+42
| | | | | | | | | Instead of passing a pointer to the scratch buffer via user sgprs, we now patch the shader with the buffer address using reloc information from the LLVM generated ELF. v2: - Make sure not to break older LLVM.
* radeon: Teach radeon_elf_read() how to parse reloc information v3Tom Stellard2015-01-205-7/+78
| | | | | | | | | v2: - Use strdup for copying reloc names. - Free reloc memory. v3: - Add free_relocs parameter to radeon_shader_binary_free_members()
* radeon: Add a helper function for freeing members of radeon_shader_binaryTom Stellard2015-01-204-6/+13
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* i965: Work around mysterious Gen4 GPU hangs with minimal state changes.Kenneth Graunke2015-01-191-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gen4 hardware appears to GPU hang frequently when using Chromium, and also when running 'glmark2 -b ideas'. Most of the error states contain 3DPRIMITIVE commands in quick succession, with very few state packets between them - usually VERTEX_BUFFERS/ELEMENTS and CONSTANT_BUFFER. I trimmed an apitrace of the glmark2 hang down to two draw calls with a glUniformMatrix4fv call between the two. Either draw by itself works fine, but together, they hang the GPU. Removing the glUniform call makes the hangs disappear. In the hardware state, this translates to removing the CONSTANT_BUFFER packet between the two 3DPRIMITIVE packets. Flushing before emitting CONSTANT_BUFFER packets also appears to make the hangs disappear. I observed a slowdown in glxgears by doing it all the time, so I've chosen to only do it when BRW_NEW_BATCH and BRW_NEW_PSP are unset (i.e. we haven't done a CS_URB_STATE change or already flushed the whole pipeline). I'd much rather understand the problem, but at this point, I don't see how we'd ever be able to track it down further. We have no real tools, and the hardware people moved on years ago. I've analyzed 20+ error states and read every scrap of documentation I could find. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80568 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85367 Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Matt Turner <[email protected]> Cc: "10.4 10.3" <[email protected]>
* i965/nir: Enable SIMD16 support in the NIR FS backend.Kenneth Graunke2015-01-191-2/+1
| | | | | | | | With the previous commits in place, it just works. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/nir: Use offset() instead of altering reg_offset directly.Kenneth Graunke2015-01-191-59/+32
| | | | | | | | | | | offset() properly handles reg_width, so it'll work for SIMD16. While we're in the area, simplify a few cases, and use retype() to cut a few more lines of code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/nir: Replace fs_reg(GRF, virtual_grf_alloc(...)) with vgrf(...).Kenneth Graunke2015-01-193-13/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | brw_fs_nir.cpp creates almost all of its registers via: fs_reg reg = fs_reg(GRF, virtual_grf_alloc(num_components)); When we add SIMD16 support, we'll need to set reg->width = 16 and double the VGRF size...on pretty much every VGRF it allocates. This patch replaces that pattern with a new "vgrf" helper method: fs_reg reg = vgrf(num_components); The new function correctly takes reg_width into account. For now, reg_width is always 1, so this should have no functional change. v2: Just make vgrf() account for reg_width right away, rather than changing the behavior in the next patch. v3: Replace one last virtual_grf_alloc I missed. It's used in code that only runs for dispatch_width == 8, so it doesn't matter, but consistency is nice. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Replace fs_reg(fs_visitor, type) with fs_visitor::vgrf(type).Kenneth Graunke2015-01-196-128/+122
| | | | | | | | | | | | | | | | | | I dislike how fs_reg has a constructor that knows about fs_visitor. Apart from that, it stands alone, with no need to interact with the rest of the compiler. Which is sensible - a class that represents a register should do just that. Allocating virtual register numbers should be left up to the compiler (fs_visitor). This patch replaces the constructor with a new fs_visitor::vgrf method, eliminating fs_reg's dependency on fs_visitor. It ends up being no more code. v2: Rebase from May 2014 -> January 2015. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/mesa: don't set vs.key.clamp_color if a shader doesn't write any colorsMarek Olšák2015-01-193-5/+10
| | | | And update some comments.
* winsys/radeon: increase the size of buffer cacheMarek Olšák2015-01-191-1/+1
| | | | | | | This should fix this performance regression: https://bugs.freedesktop.org/show_bug.cgi?id=88227 Reviewed-by: Michel Dänzer <[email protected]>
* Rename sha1.c and sha1.h to mesa-sha1.c and mesa-sha1.hCarl Worth2015-01-193-3/+3
| | | | | | | | The filename of sha1.h was conflicting with the system-provided sha1.h, (and in some confiurations, our sha1.c was unsuccessfully attemping to include "sha1.h" and <sha1.h> as two different files). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88523
* mesa: fix a trivial spelling mistakeMartin Peres2015-01-191-1/+1
| | | | | Signed-off-by: Martin Peres <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: support GL_RGB for GL_EXT_texture_type_2_10_10_10_REVTapani Pälli2015-01-195-0/+8
| | | | | | | | | | | | | | | | | Commit 8ec6534 changed texture upload path and the way how texture format is being checked, this commit adds support for GL_RGB with GL_UNSIGNED_INT_2_10_10_10_REV as specified by the extension EXT_texture_type_2_10_10_10_REV specification. This fixes regression in ES3 conformance test ES3-CTS.gtf.GL3Tests.packed_pixels.packed_pixels v2: add MESA_FORMAT_R10G10B10X2_UNORM format (Iago Toral) Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88385 Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* mesa: Add ARB_shader_precision infrastructureMicah Fedke2015-01-196-1/+13
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Fix the dummy fragment shader.Kenneth Graunke2015-01-171-7/+32
| | | | | | | | | | | | | | | | | | | | | | | | We hit an assertion that the destination of the FB write should not be an immediate. (I don't know what we were thinking.) Use ARF null. Trying to substitute real shaders with the dummy shader would crash when trying to upload non-existent uniforms. Say there are none. It also wouldn't generate any code because we didn't compute the CFG, and code generation now requires it. Compute it. Gen4-5 also require a message header to be present. On Gen6+, there were assertion failures in SF/SBE state because urb_setup was memset to 0 instad of -1, causing it to think there were attributes when nothing was set up right. Set to no attributes. Finally, you have to ensure "Setup URB Entry Read Length" is non-zero or you get GPU hangs, at least on Crestline. It now works on at least Crestline and Haswell. Signed-off-by: Kenneth Graunke <[email protected]>
* gbm: Define _DEFAULT_SOURCE to avoid warningKristian Høgsberg2015-01-161-0/+1
| | | | | | | | | glibc 2.19 introduced _DEFUAULT_SOURCE as a replacement for _BSD_SOURCE, and deprecates _BSD_SOURCE with an annoying warning. Defining both is how you're supposed to transition so let's do that. It gets rid of the warning and we can figure out when/if we can drop _BSD_SOURCE later. Signed-off-by: Kristian Høgsberg <[email protected]>
* sha1: Fix gcry_md_hd_t typo.Vinson Lee2015-01-161-1/+1
| | | | | | | | | | | | | Fix build error. CC libmesautil_la-sha1.lo sha1.c: In function '_mesa_sha1_final': sha1.c:210:22: error: 'grcy_md_hd_t' undeclared (first use in this function) gcry_md_hd_t h = (grcy_md_hd_t) ctx; ^ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88519 Signed-off-by: Vinson Lee <[email protected]>
* nir: s/malloc.h/stdlib.h/Vinson Lee2015-01-161-1/+1
| | | | | | | | | | | Fix build error on Mac OS X. CC nir_to_ssa.lo nir_to_ssa.c:29:10: fatal error: 'malloc.h' file not found ^ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88478 Signed-off-by: Vinson Lee <[email protected]>
* i965: Fix up too-wide commentKristian Høgsberg2015-01-161-4/+3
| | | | Signed-off-by: Kristian Høgsberg <[email protected]>
* gbm/dri: Fix const confusionKristian Høgsberg2015-01-161-4/+3
| | | | | | | | The driver name is no longer const, it's always allocated dynamically one way or another. Drop const from dri_screen_create_dri2 driver_name argument to avoid warning. Signed-off-by: Kristian Høgsberg <[email protected]>
* configure: Add machinery for --enable-shader-cache (and --disable-shader-cache)Carl Worth2015-01-164-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't actually have the code for the shader cache just yet, but this configure machinery puts everything in place so that the shader cache can be optionally compiled in. Specifically, if the user passes no option (neither --disable-shader-cache, nor --enable-shader-cache), then this feature will be automatically detected based on the presence of a usable SHA-1 library. If no suitable library can be found, then the shader cache will be automatically disabled, (and reported in the final output from configure). The user can force the shader-cache feature to not be compiled, (even if a SHA-1 library is detected), by passing --disable-shader-cache. This will prevent the compiled Mesa libraries from depending on any library for SHA-1 implementation. Finally, the user can also force the shader cache on with --enable-shader-cache. This will cause configure to trigger a fatal error if no sutiable SHA-1 implementation can be found for the shader-cache feature. Bug fix by José Fonseca <[email protected]>: Fix to put conditional assignment in Makefile.am, not Makefile.sources to avoid breaking scons build. Note: As recommended by José, with this commit the scons build will not compile any of the SHA-1-using code. This is waiting for someone to write SConstruct detection of the available SHA-1 libraries, (and set the appropriate HAVE_SHA1_* variables). Reviewed-by: Matt Turner <[email protected]>
* mesa: Add mesa SHA-1 functionsCarl Worth2015-01-165-0/+504
| | | | | | | | | | | | | | | | | The upcoming shader cache uses the SHA-1 algorithm for cryptographic naming. These new mesa_sha1 functions are implemented with any one of several differeny cryptographics libraries. This code was copied from the xserver repository, (where it has apparently been functioning well on a variety of operating systems), and comes licensed with a license identical to that of Mesa. Bug fixes by José Fonseca <[email protected]>: Fix to put conditional assignment in Makefile.am, not Makefile.sources to avoid breaking scons build. Fix include file for CryptoAPI section. Fix missing cast in openssl section. Reviewed-by: Matt Turner <[email protected]>
* configure: Add copyright and license block to configure.acCarl Worth2015-01-161-0/+31
| | | | | | | | | | | | | | | | | | | | | Prior to copying in code from the xserver configure.ac file, it makes sense to have the license of this file clearly marked, (to show that it's licensed identically to the configure.ac file from the xserver repository). And since the text of the license refers to "the above copyright notice" it also makes sense to have an actual copyright attribution in place. I generated this list of names by looking at the output of: git shortlog -n --format=%aD -- configure.ac (and arbitrarily stopping for contributors with fewer than 15 commits). Then for each name, I looked for existing Copyright attributions in the mesa source tree with the same name, (and using "Intel Corporation" as the copyright holder where I knew that was appropriate).
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