| Commit message (Collapse) | Author | Age | Files | Lines |
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If the drm minor version is > 9 (i.e. whats in drm-next),
we enable s3tc + texture tiling by default now.
this changes R600_FORCE_TILING to R600_TILING which can
be set to false to disable tiling on working drm.
Signed-off-by: Dave Airlie <[email protected]>
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ATI engineers have probably chosen those sign bits by a dice roll.
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By default the hardware rounds texcoords. However,
for point sampled textures, the expected behavior is
to truncate. When we have point sampled textures,
set the truncate bit in the sampler.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=25871
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Zou Nan hai <[email protected]>
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Signs don't work the way I'd like...
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No idea why I didn't do it like this the first time, but share
the code like other portions of mesa do using _tmp.h suffix
and some #defines for the types.
Signed-off-by: Dave Airlie <[email protected]>
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We'll flush after the same-shader comparison.
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The other draw stages like aaline and pstipple were already doing this.
If the driver used the aapoint stage but not the others it would crash
because of a null pipe->draw pointer.
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These were only used by GL_SGI_texture_color_table, which is gone now.
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It was only implemented in the swrast driver and probably not used by
any applications. A modern app would use a dependent/chained texture
lookup in the fragment shader.
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when updating/validating framebuffer state. The _Status field is set
to zero when we need to recompute _Status. Otherwise, it's up to date.
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when doing glCopyTex[Sub]Image() and checking the source buffer's
completeness.
We only need to determine FBO completeness when the status is indeterminate.
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The function may invoke blitter, which invalidates vertex buffers.
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Instead of temporarily.
The HiZ function (something like a depth function) is a property
of a HiZ buffer and can only be changed during HiZ clears.
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I removed the HiZ memory management, because the HiZ RAM is too small
and I also did it in hope that HiZ will be enabled more often.
This also sets aligned strides to HIZ_PITCH and ZMASK_PITCH.
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Signed-off-by: Alex Deucher <[email protected]>
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should fix scons build.
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Plugs a memory leak when compiling shaders with user defined structures.
NOTE: This is a candidate for the 7.9 and 7.10 branches.
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Signed-off-by: Jerome Glisse <[email protected]>
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It doesn't work.
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this just adds a format check + format conversion.
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This adds support for the RGTC unsigned and signed
texture storage and fetch methods.
the code is a port of the DXT5 alpha compression code.
Signed-off-by: Dave Airlie <[email protected]>
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We need this to do signed stuff for RGTC.
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So far I haven't implemented the u_format code for these.
Signed-off-by: Dave Airlie <[email protected]>
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still can't get signed to work
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This reverts commit b6d40213935da702570eca2c0861bd4b1d7f5254.
This actually breaks gears here on my rv670.
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TRUNC is neither a scalar instruction nor exclusive to the Trans unit.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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With an extremely dumb strategy. But it's the same i915c employs.
Also improve the hw_atom code slightly by statically specifying the
required batch space. For extremely variably stuff (shaders, constants)
it would probably be better to add a new parameter to the hw_atom->validate
function.
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Daniel Vetter <[email protected]>
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Also contains the first few bits for hw state atoms.
v2: Implement suggestion by Jakob Bornecrantz.
Signed-off-by: Daniel Vetter <[email protected]>
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v2: Add the batch bo to the libdrm validation lost, for otherwise
libdrm won't take previously used buffers into account.
Signed-off-by: Daniel Vetter <[email protected]>
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These files can be decoded with intel_dump_decode from the intel-gpu-tools
available at:
http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/
Signed-off-by: Daniel Vetter <[email protected]>
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