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* nir: split out lower_sub from lower_negateRob Clark2015-04-113-2/+5
| | | | | | | | | | Originally you had to have one or the other. But actually I don't want either. (Or rather I want whatever is the minimum # of instructions.) TODO: not sure where the best place to insert a check that driver hasn't set *both* lower_negate and lower_sub? Signed-off-by: Rob Clark <[email protected]>
* gallium/ttn: add support for system valuesRob Clark2015-04-111-0/+34
| | | | | | | | So far just the system values that freedreno supports, so we may add more later. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/ttn: fix TXDRob Clark2015-04-111-3/+17
| | | | | | | With TXD we also have the ddx/ddy sources (before the sampler). Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/ttn: add TXQ support (v2)Rob Clark2015-04-111-8/+51
| | | | | | | | | | Split out from ttn_tex() since it is kind of a weird instruction that maps to two NIR opcodes, and it was cleaner this way. v2: query_levels doesn't take any args Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/ttn: split out helper to get texture infoRob Clark2015-04-111-53/+59
| | | | | | | | We'll need this as well for TXQ. Split this out first to reduce noise in the next patch. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/ttn: add support for temp arraysRob Clark2015-04-111-15/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since the rest of NIR really would rather have these as variables rather than registers, create a nir_variable per array. But rather than completely re-arrange ttn to be variable based rather than register based, keep the registers. In the cases where there is a matching var for the reg, ttn_emit_instruction will append the appropriate intrinsic to get things back from the shadow reg into the variable. NOTE: this doesn't quite handle TEMP[ADDR[]] when the DCL doesn't give an array id. But those just kinda suck, and should really go away. AFAICT we don't get those from glsl. Might be an issue for some other state tracker. v2: rework to use load_var/store_var with deref chains v3: create new "burner" reg for temporarily holding the (potentially writemask'd) dest after each instruction; add load_var to initialize temporary dest in case not all components are overwritten v4: review comments: asserts and use ttn_src_for_indirect() in ttn_array_deref() so we can drop later patch converting to use vec1 for addr reg (since ttn_src_for_indirect() handles the imov to vec1 from tgsi addr component that we want) v5: rebase: new requirements about parent mem ctx for derefs Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/ttn: minor cleanupRob Clark2015-04-111-5/+6
| | | | | | | Extract tgsi_dst->Index into a local.. split out from 'gallium/ttn: add support for temp arrays' for noise reduction.. Signed-off-by: Rob Clark <[email protected]>
* i965: Use NIR by default for fragment shadersJason Ekstrand2015-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GLSL IR vs. NIR shader-db results on i965: total instructions in shared programs: 2889747 -> 2890782 (0.04%) instructions in affected programs: 2425446 -> 2426481 (0.04%) helped: 3698 HURT: 5341 GLSL IR vs. NIR shader-db results on g4x: total instructions in shared programs: 2547252 -> 2550440 (0.13%) instructions in affected programs: 1984482 -> 1987670 (0.16%) helped: 2844 HURT: 4776 GLSL IR vs. NIR shader-db results on Iron Lake: total instructions in shared programs: 4053381 -> 4063828 (0.26%) instructions in affected programs: 3026601 -> 3037048 (0.35%) helped: 4110 HURT: 8331 GAINED: 1287 LOST: 9 GLSL IR vs. NIR shader-db results on Sandy Bridge: total instructions in shared programs: 5307041 -> 5236666 (-1.33%) instructions in affected programs: 3442908 -> 3372533 (-2.04%) helped: 11829 HURT: 5604 GAINED: 33 LOST: 18 GLSL IR vs. NIR shader-db results on Ivy Bridge: total instructions in shared programs: 4926333 -> 4857017 (-1.41%) instructions in affected programs: 3144042 -> 3074726 (-2.20%) helped: 11559 HURT: 4774 GAINED: 46 LOST: 25 GLSL IR vs. NIR shader-db results on Bay Trail: total instructions in shared programs: 4926333 -> 4857017 (-1.41%) instructions in affected programs: 3144042 -> 3074726 (-2.20%) helped: 11559 HURT: 4774 GAINED: 46 LOST: 25 GLSL IR vs. NIR shader-db results on Haswell: total instructions in shared programs: 4392487 -> 4293476 (-2.25%) instructions in affected programs: 2800180 -> 2701169 (-3.54%) helped: 13073 HURT: 3383 GAINED: 46 LOST: 23 GLSL IR vs. NIR shader-db results on Broadwell (FS only): total instructions in shared programs: 4378113 -> 4283025 (-2.17%) instructions in affected programs: 2743209 -> 2648121 (-3.47%) helped: 12470 HURT: 3609 GAINED: 64 LOST: 27 Signed-off-by: Jason Ekstrand <[email protected]> Acked-by: Matt Turner <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Don't set NirOptions for stages that will use the vec4 backend.cros-mesa-10.6-vanillachadv/cros-mesa-10.6-vanillachadv/cros-gerrit-262788-baseKenneth Graunke2015-04-101-9/+6
| | | | | | | | | | | | | | | | | | | We've started using NirOptions != NULL to mean "we're using NIR for this stage." However, when INTEL_USE_NIR=1, we set it for a bunch of stages that still use the vec4 backend, and thus definitely aren't using NIR. For example, if INTEL_USE_NIR=1 we disable the GLSL IR cubemap normalization pass, even for vertex shaders and geometry shaders. This is wrong, but breaks a very uncommon case. When I started deleting GLSL IR for stages where we claimed to be using NIR, this bug quickly became apparent. For now, only set it for fragment shaders, and vertex shaders if brw->scalar_vs is set. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* gallivm: Fix build since llvm-3.7.0svn r234495Nick Sarnie2015-04-101-4/+0
| | | | | | | | Revert 50e9fa2ed69cb5f76f66231976ea789c0091a64d as LLVM reverted their change. Signed-off-by: Nick Sarnie <[email protected]> Reviewed-by: Jan Vesely <[email protected]>
* i965/disasm: Print the type after the swizzle also for 3src src operandsVille Syrjälä2015-04-101-3/+3
| | | | | | | | | The disassembly currently has the swizzle after the type for 3src source operands, and the other way around for 2src. Flip the type and swizzle around for 3src so that the output matches 2src. Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]>
* i965: Move brw_link_shader's GLSL IR transformations into a helper.Kenneth Graunke2015-04-101-93/+99
| | | | | | | | This function was getting a bit large and unwieldy. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Change brw_shader to gl_shader in brw_link_shader().Kenneth Graunke2015-04-101-32/+31
| | | | | | | | | Nothing actually wanted brw_shader fields - we just had to type shader->base all over the place for no reason. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Constify nir_lower_sampler's gl_shader_program pointer.Kenneth Graunke2015-04-102-6/+6
| | | | | | | | | Now that we're not generating linker errors, we don't actually modify this. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Remove linker_error calls from nir_lower_samplers().Kenneth Graunke2015-04-101-7/+2
| | | | | | | | | These should never happen. Plus, NIR passes really shouldn't be reporting linker errors - this is past link time. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Make nir_lower_samplers take a gl_shader_stage, not a gl_program *.Kenneth Graunke2015-04-103-16/+14
| | | | | | | | | | We don't actually need a gl_program struct. We only used it to translate prog->Target (i.e. GL_VERTEX_PROGRAM) to the gl_shader_stage (i.e. MESA_SHADER_VERTEX). We may as well just pass that. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Move gl_shader_stage enum from mtypes.h to shader_enums.h.Kenneth Graunke2015-04-103-19/+18
| | | | | | | | | I want to use this in some code that doesn't currently include mtypes.h. It seems like a better place for it anyway. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Fix #include guards in shader_enums.h.Kenneth Graunke2015-04-101-3/+3
| | | | | | | | | This header was originally going to be called pipeline.h, but it got renamed at the last minute. Make the include guards match. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* nir: Constify prog_to_nir's gl_program pointer.Kenneth Graunke2015-04-102-3/+3
| | | | | | | | | prog_to_nir should not modify the incoming Mesa IR program - just translate it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* gallivm: Fix build since llvm-3.7.0svn r234460.Vinson Lee2015-04-091-0/+4
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89963 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* draw: (trivial) don't print the shader twice with GALLIVM_DEBUG=tgsi (or ir)Roland Scheidegger2015-04-091-5/+5
| | | | | | | | Neither the shader nor the key change when doing elts or linear variant, so this was just annoying (probably mildly useful at some point when we printed the IR per function too). Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: don't use control flow when doing indirect constant buffer lookupsRoland Scheidegger2015-04-093-69/+58
| | | | | | | | | | | | | | | | | | | | | | | llvm goes crazy when doing that, using way more memory and time, though there's probably more to it - this points to a very much similar issue as fixed in 8a9f5ecdb116d0449d63f7b94efbfa8b205d826f. In any case I've seen a quite plain looking vertex shader with just ~50 simple tgsi instructions (but with a dozen or so such indirect constant buffer lookups) go from a terribly high ~440ms compile time (consuming 25MB of memory in the process) down to a still awful ~230ms and 13MB with this fix (with llvm 3.3), so there's still obvious improvements possible (but I have no clue why it's so slow...). The resulting shader is most likely also faster (certainly seemed so though I don't have any hard numbers as it may have been influenced by compile times) since generally fetching constants outside the buffer range is most likely an app error (that is we expect all indices to be valid). It is possible this fixes some mysterious vertex shader slowdowns we've seen ever since we are conforming to newer apis at least partially (the main draw loop also has similar looking conditionals which we probably could do without - if not for the fetch at least for the additional elts condition.) v2: use static vars for the fake bufs, minor code cleanups Reviewed-by: Jose Fonseca <[email protected]>
* glsl: check for forced_language_version in is_version()Brian Paul2015-04-081-1/+3
| | | | | | | | | This is a follow-on fix from the earlier "glsl: allow ForceGLSLVersion to override #version directives" change. Since we're not changing the language_version field, we have to check forced_language_version here. Reviewed-by: Ian Romanick <[email protected]>
* i965/skl: Fix the order of the arguments for the LD sampler messageNeil Roberts2015-04-081-2/+13
| | | | | | | | | | | | | | In Skylake the order of the arguments for sample messages with the LD type are u, v, lod, r whereas previously they were u, lod, v, r. This fixes 144 Piglit tests including ones that directly use texelFetch and also some using the meta stencil blit path which appears to use texelFetch in its shader. v2: Fix sampling 1D textures Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Fix depth field setting in surface state for raw buffer on Gen7/8Zhenyu Wang2015-04-082-4/+10
| | | | | | | | | | On Gen7/8 for RAW surface format, the depth field (surf[3]) in surface state means [30:21] bits of number of entries which is different from other surface format which uses [26:21] bits field. Signed-off-by: Zhenyu Wang <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* u_tile: fix warnings about incompatible casts.Dave Airlie2015-04-081-3/+3
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600g/sb: Enable SB for geometry shadersGlenn Kennard2015-04-0811-16/+55
| | | | | | | | | | | | | | | | Add SV_GEOMETRY_EMIT special variable type to track the implicit dependencies between CUT/EMIT_VERTEX/MEM_RING instructions so GCM/scheduler doesn't reorder them. Mark emit instructions as unkillable so DCE doesn't eat them. Enable only for evergreen/cayman as there are a few unexplained GS piglit regressions on R6xx/R7xx with SB enabled otherwise. Signed-off-by: Glenn Kennard <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g/sb: Update last_cf for loopsGlenn Kennard2015-04-081-0/+8
| | | | | | | | | | | CF_END could end up emitted in the middle of a shader on cayman when there was a loop at the very end. Fixes glsl-1.50-geometry-end-primitive and ext_transform_feedback-geometry-shaders-basic piglit tests. Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* u_tile: fix stencil texturing tests under softpipeDave Airlie2015-04-081-6/+6
| | | | | | | | | arb_stencil_texturing-draw failed under softpipe because we got a float back from the texturing function, and then tried to U2F it, stencil texturing returns ints, so we should fix the tiling to retrieve the stencil values as integers not floats. Signed-off-by: Dave Airlie <[email protected]>
* nir: Make nir_*_instr_create take a nir_shader instead of a void * contextJason Ekstrand2015-04-072-27/+27
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Implement a nir_sweep() pass.Kenneth Graunke2015-04-073-0/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This pass performs a mark and sweep pass over a nir_shader's associated memory - anything still connected to the program will be kept, and any dead memory we dropped on the floor will be freed. The expectation is that this will be called when finished building and optimizing the shader. However, it's also fine to call it earlier, and many times, to free up memory earlier. v2: (feedback from Jason Ekstrand) - Skip sweeping impl->start_block, as it's already in the CF list. - Don't sweep SSA defs (they're owned by their defining instruction) - Don't steal phi sources (they're owned by nir_phi_instr). - Don't steal tex->src (it's owned by the tex_inst itself) - Don't sweep dereference chains (top-level dereferences are owned by the instruction; sub-dereferences are owned by the parent deref). - Don't sweep sources and destinations (SSA defs are handled as part of the defining instruction, and registers are handled as part of function implementations). - Just steal instructions; don't walk them (no longer required). v3: (feedback from Jason Ekstrand) - Steal indirect sources from nir_src/nir_dest. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Allocate dereferences out of their parent instruction or deref.Kenneth Graunke2015-04-076-42/+45
| | | | | | | | | | | | | | | | | | | | | | | | | Jason pointed out that variable dereferences in NIR are really part of their parent instruction, and should have the same lifetime. Unlike in GLSL IR, they're not used very often - just for intrinsic variables, call parameters & return, and indirect samplers for texturing. Also, nir_deref_var is the top-level concept, and nir_deref_array/nir_deref_record are child nodes. This patch attempts to allocate nir_deref_vars out of their parent instruction, and any sub-dereferences out of their parent deref. It enforces these restrictions in the validator as well. This means that freeing an instruction should free its associated dereference chain as well. The memory sweeper pass can also happily ignore them. v2: Rename make_deref to evaluate_deref and make it take a nir_instr * instead of void *. This involves adding &instr->instr everywhere. (Requested by Jason Ekstrand.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Allocate nir_ssa_def::uses/if_uses out of the instruction.Kenneth Graunke2015-04-071-4/+2
| | | | | | | | | | We can't allocate them out of the nir_ssa_def itself, because it may not be ralloc'd (for example, nir_dest embeds a nir_ssa_def). However, allocating them out of the instruction should work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Allocate nir_phi_src values out of the nir_phi_instr.Kenneth Graunke2015-04-073-3/+3
| | | | | | | | Phi sources are part of the phi instruction and should have the same lifetime. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Allocate nir_call_instr::params out of the nir_call itself.Kenneth Graunke2015-04-071-1/+1
| | | | | | | | The lifetime of the params array needs to be match the nir_call_instr itself. So, allocate it using the instruction itself as the context. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add the ability to render to I8/L8 and I16/L16 UNORM formats.Kenneth Graunke2015-04-071-0/+8
| | | | | | | | This allows those formats to work with the meta PBO upload path. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Use SET_FIELD in 3DSTATE_STREAMOUT packets.Kenneth Graunke2015-04-072-16/+16
| | | | | | | | Suggested by Topi Pohjolainen. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* nir/lower_tex_projector: Don't use designated initializersJason Ekstrand2015-04-071-1/+2
| | | | | | | These don't work in MSVC or in older versions of GCC Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89899 Reviewed-by: Mark Janes <[email protected]>
* glsl: relax input->output validation for SSO programsTapani Pälli2015-04-071-1/+1
| | | | | | | | | | | | | | Commit 18004c3 introduced more restrictive validation to linker between inputs and outputs. This patch skips the additional check for programs that utilize GL_ARB_separate_shader_objects, there inputs and outputs might not make exact match during linking but only when constructing the final pipeline. This made some of the GL_ARB_program_interface_query tests shaders fail to link, these tests can be used to verify the change. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* nv50,nvc0: limit the y-tiling of 3d textures to the first level's tilingIlia Mirkin2015-04-063-10/+13
| | | | | | | | | | | | | | We limit y-tiling to 0x20 when depth is involved. However the function is run for each miplevel, and the hardware expects miplevel 0 to have the highest tiling settings. Perform the y-tiling limit on all levels of a 3d texture, not just the ones that have depth. Fixes: texelFetch fs sampler3D 98x129x1-98x129x9 Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Nick Tenney <[email protected]> # GT216 Cc: "10.4 10.5" <[email protected]>
* r600g: fix op3 abs issueDave Airlie2015-04-071-17/+34
| | | | | | | | | | | This code to handle absolute values on op3 srcs was a bit too simple, it really needs a temp reg per src, not one per channel, make it easier and let sb clean up the mess. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89831 Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Do not render primitives in non-zero streams then TF is disabledIago Toral Quiroga2015-04-061-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Haswell hardware seems to ignore Render Stream Select bits from 3DSTATE_STREAMOUT packet when the SOL stage is disabled even if the PRM says otherwise. Because of this, all primitives are sent down the pipeline for rasterization, which is wrong. If SOL is enabled, Render Stream Select is honored and primitives bound to non-zero streams are discarded after stream output. Since the only purpose of primives sent to non-zero streams is to be recorded by transform feedback, we can simply discard all geometry bound to non-zero streams then transform feedback is disabled to prevent it from ever reaching the rasterization stage. Notice that this patch introduces a small change in the behavior we get when a geometry shader emits more vertices than the maximum declared: before, a vertex that was emitted to a non-zero stream when TF was disabled would still count for the purposes of checking that we don't exceed the maximum number of output vertices declared by the shader. With this change, these vertices are completely ignored and won't increase the output vertex count, making more room for other (hopefully more useful) vertices. Fixes piglit test arb_gpu_shader5-emitstreamvertex_nodraw on Haswell and Broadwell. v2 (Ken): Drop is_haswell check in favor of doing this unconditionally. Broadwell needs the workaround as well, and it doesn't hurt to do it in general. Also tweak comments - the Haswell PRM does actually mention this ("Command Reference: Instructions" page 797). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83962 Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected]
* i965: Add forgotten multi-stream code to Gen8 SOL state.Kenneth Graunke2015-04-061-0/+9
| | | | | | | | Fixes Piglit's arb_gpu_shader5-xfb-streams-without-invocations. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Cc: [email protected]
* i965: Fix instanced geometry shaders on Gen8+.Kenneth Graunke2015-04-061-0/+2
| | | | | | | | | | | | | Jordan added this in commit 741782b5948bb3d01d699f062a37513c2e73b076 for Gen7 platforms. I missed this when adding the Broadwell code. Fixes Piglit's spec/arb_gpu_shader5/invocation-id-{basic,in-separate-gs} with MESA_EXTENSION_OVERRIDE=GL_ARB_gpu_shader5 set. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Cc: [email protected]
* i965: Free dead GLSL IR one last time.Kenneth Graunke2015-04-061-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | While working on NIR's memory allocation model, I realized the GLSL IR memory model was broken. During glCompileShader, we allocate everything out of the _mesa_glsl_parse_state context, and reparent it to gl_shader at the end. During glLinkProgram, we allocate everything out of a temporary context, then reparent it to the exec_list containing the linked IR. But during brw_link_shader - the driver's final opportunity to do lowering and optimization - we just allocated everything out of the permanent context given to us by the linker. That memory stayed forever. Notably, passes like brw_fs_channel_expressions cause us to churn the majority of the code, so we really want to free dead IR here. Saves 125MB of memory when replaying a Dota 2 trace on Broadwell. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Implement SIMD16 texturing on Gen4.Kenneth Graunke2015-04-063-10/+90
| | | | | | | | | | | | | | | | | | | | | | | | | This allows SIMD16 mode to work for a lot more programs. Texturing is also more efficient in SIMD16 mode than SIMD8. Several messages don't actually exist in SIMD8 mode, so we did SIMD16 messages and threw away half of the data. Now we compute real data in both halves. Also, the SIMD16 "sample" message doesn't require all three coordinate components to exist (like the SIMD8 one), so we can shorten the message lengths, cutting register usage a bit. I chose to implement the visitor functionality in a separate function, since mixing true SIMD16 with SIMD8 code that uses SIMD16 fallbacks seemed like a mess. The new code bails on a few cases where we'd have to do two SIMD8 messages - we just fall back to SIMD8 for now. Improves performance in "Shadowrun: Dragonfall - Director's Cut" by about 20% on GM45 (measured with LIBGL_SHOW_FPS=1 while standing around in the first mission). v2: Add ir_txf to the has_lod case (caught by Jordan Justen). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Use SIMD16 instead of SIMD8 on Gen4 when possible.Kenneth Graunke2015-04-062-3/+4
| | | | | | | | | | | | | | | | | | | | | | | Gen5+ systems allow you to specify multiple shader programs - both SIMD8 and SIMD16 - and the hardware will automatically dispatch to the most appropriate one, given the number of subspans to be processed. However, that is not the case on Gen4. Instead, you program a single shader. If you enable multiple dispatch modes (SIMD8 and SIMD16), the shader is supposed to contain a series of jump instructions at the beginning. The hardware will launch the shader at a small offset, hitting one of the jumps. We've always thought that sounds like a pain, and weren't clear how it affected performance - is it worth having multiple shader types? So, we never bothered with SIMD16 until now. This patch takes a simpler approach: try and compile a SIMD16 shader. If possible, set the no_8 flag, telling the hardware to just use the SIMD16 variant all the time. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Respect the no_8 flag on Gen4-5.Kenneth Graunke2015-04-061-21/+34
| | | | | | | | | This flag means to ignore the SIMD8 program and only use the SIMD16 one. It was originally meant for repdata clear shaders, but I plan to use it for other things on Gen4 as well. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fp: Set coord_components correctly for cube textures.Kenneth Graunke2015-04-061-1/+1
| | | | | | | | | | I've no idea why this was 4. It certainly seems wrong. Prevents assertion failures in fp-incomplete-tex with some upcoming patches of mine. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* glsl/cse: Maintain a list of free ae_entry objectsIan Romanick2015-04-061-8/+55
| | | | | | | | | | | The CSE algorithm will continuously allocate new ae_entry objects. As each new basic block is exited, all of the previously allocated objects are dumped. Instead, put them in a free list and re-use them in the next basic block. Reduce, reuse, recycle! Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Thomas Helland <[email protected]>
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