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* nv50: check grclass instead of chipset for 3D capsChristoph Bumiller2011-03-032-6/+4
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* nv50: increase size of shader code boChristoph Bumiller2011-03-034-14/+23
| | | | 512 KiB should be quite enough, but dynamic resize might be nicer.
* nouveau: allow pipe driver to define which buffers should start in sysmemBen Skeggs2011-03-034-7/+6
| | | | | | | PIPE_BIND_CONSTANT_BUFFER alone was OK for nv50/nvc0, but nv30 will need to be able to set others on certain chipsets. Signed-off-by: Ben Skeggs <[email protected]>
* nv50: fix IB index buffer pathChristoph Bumiller2011-03-021-8/+12
| | | | Add missing VERTEX_END and treat unaligned offsets correctly.
* nv50: fix POINT_COORD_REPLACE_MAP method sizeChristoph Bumiller2011-03-021-2/+2
| | | | Introduced in 223d98bb8d49c9e52e498a12980722467ae2bf87.
* nv50: primitive restart trick for vertex data through FIFO modeChristoph Bumiller2011-03-021-12/+17
| | | | | Also, on nv50 the VERTEX_BEGIN method doesn't follow VERTEX_END, which was erroneously taken over from nvc0 and is fixed now.
* nv50: fix depth clamp for disabled primitive clippingChristoph Bumiller2011-03-021-2/+12
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* nv50: implement independent blend functions for nva3+ and fix capChristoph Bumiller2011-03-023-6/+34
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* nv50: fix tile size calculationsChristoph Bumiller2011-03-022-2/+2
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* nv50: fix point sprite state validationChristoph Bumiller2011-03-023-14/+38
| | | | | Wasn't updated if the FP didn't change, and coordinate replacement wasn't disabled anymore.
* nv50: allow accidentally disabled IB index buffers againChristoph Bumiller2011-03-021-1/+1
| | | | Must have sneaked in from debugging.
* nv50: apply relocations to shader codeChristoph Bumiller2011-03-021-0/+2
| | | | | On nv50, branches are absolute, so we need to adjust them according to the shader's position in the code buffer.
* nv50: fix wrong miptree tile flags taken over from nvc0Christoph Bumiller2011-03-021-3/+0
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* nouveau: remove nouveau_stateobj.hBen Skeggs2011-03-011-316/+0
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nvc0: fix a crash on context destructionBen Skeggs2011-03-011-2/+6
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: ensure vbo_dirty is set when buffer write transfer completeBen Skeggs2011-03-0126-231/+267
| | | | | | This introduces a shared nouveau_context struct to track such things. Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: fix leak of nouveau_mman structsBen Skeggs2011-03-011-0/+2
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nvc0: port to common fence/mm/buffer codeBen Skeggs2011-03-0121-1347/+128
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nv50: multiply polygon offset units by 2Ben Skeggs2011-03-011-1/+1
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nv50: sync textures with render targets ourselvesBen Skeggs2011-03-017-7/+37
| | | | | | Port of the nvc0 commit doing the same. Signed-off-by: Ben Skeggs <[email protected]>
* nv50: move onto common linear buffer managerBen Skeggs2011-03-0116-690/+74
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: common linear buffer manager, ported from nv50/nvc0 driversBen Skeggs2011-03-016-2/+638
| | | | | | | nv50_resource is being called nv04_resource now temporarily, to avoid a naming conflict with nouveau_resource from libdrm. Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: create linear gart/vram mman in common screen initBen Skeggs2011-03-016-14/+19
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: fix fence_ref() where fence and *ref are the same fenceBen Skeggs2011-03-011-2/+3
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: fix compiler complaintBen Skeggs2011-03-014-2/+11
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nv50: make mm available as common codeBen Skeggs2011-03-019-70/+82
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nv50: move onto shared fence codeBen Skeggs2011-03-0110-347/+45
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nouveau: move nv50/nvc0 fencing to common location, and modify slightlyBen Skeggs2011-03-015-4/+296
| | | | | | | Modified from original to remove chipset-specific code, and to be decoupled from the mm present in said drivers. Signed-off-by: Ben Skeggs <[email protected]>
* nv50-nvc0: set cur_ctx during init if none currently boundBen Skeggs2011-03-012-0/+4
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* nv50: replace most of it with nvc0 driver ported to nv50Christoph Bumiller2011-02-2841-6621/+8825
| | | | We'll have to do some unification now to reduce code duplication.
* r300g: disable hyper-z on rs6xx+Marek Olšák2011-02-281-6/+0
| | | | It doesn't work.
* mesa: Add texcompress_rgtc.c to SConscript.Vinson Lee2011-02-271-0/+1
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* rgtc: update docsDave Airlie2011-02-282-1/+2
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* mesa/st: add RGTC format support.Dave Airlie2011-02-282-0/+33
| | | | this just adds a format check + format conversion.
* swrast: add RGTC supportDave Airlie2011-02-282-0/+20
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* mesa: Add RGTC texture store/fetch support.Dave Airlie2011-02-288-3/+1287
| | | | | | | | | This adds support for the RGTC unsigned and signed texture storage and fetch methods. the code is a port of the DXT5 alpha compression code. Signed-off-by: Dave Airlie <[email protected]>
* mesa: make_float_temp_image non-staticDave Airlie2011-02-282-23/+32
| | | | We need this to do signed stuff for RGTC.
* rgtc: llvmpipe/softpipe refuse RGTC until u_format has support.Dave Airlie2011-02-282-0/+10
| | | | | | So far I haven't implemented the u_format code for these. Signed-off-by: Dave Airlie <[email protected]>
* r300g: force swizzles for RGTCDave Airlie2011-02-281-0/+5
| | | | still can't get signed to work
* r600g: implement instanced drawing supportChristian König2011-02-286-103/+191
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* st/mesa & v_bug_mgr: two small instanced drawing fixesChristian König2011-02-282-1/+6
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* Revert "r600g: Don't negate result of ABS instruction"Dave Airlie2011-02-281-2/+0
| | | | | | This reverts commit b6d40213935da702570eca2c0861bd4b1d7f5254. This actually breaks gears here on my rv670.
* r600g: Process TRUNC with tgis_op2Fabian Bieler2011-02-281-2/+2
| | | | | | TRUNC is neither a scalar instruction nor exclusive to the Trans unit. Signed-off-by: Dave Airlie <[email protected]>
* r600g: Don't negate result of ABS instructionFabian Bieler2011-02-281-0/+2
| | | | Signed-off-by: Dave Airlie <[email protected]>
* i915g: implement cache flushingDaniel Vetter2011-02-276-8/+62
| | | | | | | | | | | With an extremely dumb strategy. But it's the same i915c employs. Also improve the hw_atom code slightly by statically specifying the required batch space. For extremely variably stuff (shaders, constants) it would probably be better to add a new parameter to the hw_atom->validate function. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: buffer validation for blitterDaniel Vetter2011-02-271-0/+11
| | | | Signed-off-by: Daniel Vetter <[email protected]>
* i915g: buffer validation for render stateDaniel Vetter2011-02-273-0/+87
| | | | | | | | Also contains the first few bits for hw state atoms. v2: Implement suggestion by Jakob Bornecrantz. Signed-off-by: Daniel Vetter <[email protected]>
* i915g/winsys: buffer validation supportDaniel Vetter2011-02-273-0/+42
| | | | | | | v2: Add the batch bo to the libdrm validation lost, for otherwise libdrm won't take previously used buffers into account. Signed-off-by: Daniel Vetter <[email protected]>
* i915g: add raw batchbuffer dumping in drm winsysDaniel Vetter2011-02-273-0/+11
| | | | | | | | | These files can be decoded with intel_dump_decode from the intel-gpu-tools available at: http://cgit.freedesktop.org/xorg/app/intel-gpu-tools/ Signed-off-by: Daniel Vetter <[email protected]>
* i915g: cleanup static state calculation, part 2Daniel Vetter2011-02-273-48/+48
| | | | | | Now also for the DRAW_RECT command Signed-off-by: Daniel Vetter <[email protected]>