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* freedreno: fix for null texturesRob Clark2014-06-132-6/+10
| | | | | | | | Some apps seem to give us a null sampler/view for texture slots which come before the last used texture slot. In particular 0ad triggers this. Signed-off-by: Rob Clark <[email protected]>
* llvmpipe: increase number of queries which can be binned simultaneously to 64Roland Scheidegger2014-06-131-1/+1
| | | | | | | | | | | Gallium (but not OpenGL) does allow nesting of queries, but there's no limit specified (d3d10 has no limit neither). Nevertheless, for practical purposes we need some limit in llvmpipe, otherwise we'd need more complex handling of queries as we need to keep track of all binned queries (this only affects queries which gather data past setup). A limit of 16 is too small though, while 64 would suffice. Reviewed-by: Jose Fonseca <[email protected]>
* radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITSBruno Jiménez2014-06-133-0/+15
| | | | | | | | v2: Add RADEON_INFO_ACTIVE_CU_COUNT as a define, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* Remove _mesa_is_type_integer and _mesa_is_enum_format_or_type_integerNeil Roberts2014-06-132-36/+0
| | | | | | | | | | | | | | | | | | | | | | | The comment for _mesa_is_type_integer is confusing because it says that it returns whether the type is an “integer (non-normalized)” format. I don't think it makes sense to say whether a type is normalized or not because it depends on what format it is used with. For example, GL_RGBA+GL_UNSIGNED_BYTE is normalized but GL_RGBA_INTEGER+GL_UNSIGNED_BYTE isn't. If the normalized comment is just a mistake then it still doesn't make much sense because it is missing the packed-pixel types such as GL_UNSIGNED_INT_5_6_5. If those were added then it effectively just returns type != GL_FLOAT. That function was only used in _mesa_is_enum_format_or_type_integer. This function effectively checks whether the format is non-normalized or the type is an integer. I can't think of any situation where that check would make sense. As far as I can tell neither of these functions have ever been used anywhere so we should just remove them to avoid confusion. These functions were added in 9ad8f431b2a47060bf05517246ab0fa8d249c800. Reviewed-by: Brian Paul <[email protected]>
* clover: query driver for the max number of compute unitsBruno Jiménez2014-06-123-1/+8
| | | | | Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* gallium: Add PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITSBruno Jiménez2014-06-122-1/+4
| | | | | Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* r600g/compute: solve a bug introduced by ↵Bruno Jiménez2014-06-121-1/+1
| | | | | | | | | | | | | | | | | | | 2e01b8b440c1402c88a2755d89f40292e1f36ce5 That commit made possible that the items could be one just after the other when their size was a multiple of ITEM_ALIGNMENT. But compute_memory_prealloc_chunk still looked to leave a gap between items. Resulting in that we got an infinite loop when trying to add an item which would left no space between itself and the next item. Fixes piglit test: cl-custom-r600-create-release-buffer-bug And the test for alignment I have just sent: http://lists.freedesktop.org/archives/piglit/2014-June/011135.html Sorry about this. Reviewed-by: Tom Stellard <[email protected]>
* egl/gallium: Set defines for supported APIs when using automakeNiels Ole Salscheider2014-06-123-0/+28
| | | | | | | | | | | | This fixes automake builds which are broken since b52a530ce2aada1967bc8fefa83ab53e6a737dae. v2: This patch also adds the FEATURE_* defines back to targets/egl-static for Android and Scons that have been removed in the mentioned commit. Signed-off-by: Niels Ole Salscheider <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79885 Reviewed-by: Emil Velikov <[email protected]>
* configure: correctly autodetect xvmc/vdpau/omxEmil Velikov2014-06-121-1/+1
| | | | | | | | | | | | | Commit e62b7d38a1d (configure: autodetect video state-trackers when non swrast driver is present) added a check that caused the autodetection to be omitted when we have the swrast gallium driver. Whereas it should have skipped the VL targets when only swrast was selected. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79907 Cc: "10.2" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Christian König <[email protected]>
* mesa: glx: Reduce error log levelCourtney Goeltzenleuchter2014-06-121-1/+1
| | | | | | | | | | | The code that parses LIBGL_DRIVERS_PATH was printing an error for every attempted dlopen. It's not an error to have to check multiple items in the path, only an error if no suitable library is found. Reduced the load error to a warning to match behavior of dynamic linker. Signed-off-by: Courtney Goeltzenleuchter <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* cso: fix stream-out clean up in cso_release_all()Brian Paul2014-06-121-1/+1
| | | | | | | | | Use the has_streamout flag as we do elsewhere to check if we need to call pipe->set_stream_output_targets(). The driver might implement the set_stream_output_targets() function, but not for all hardware configurations. Reviewed-by: Jose Fonseca <[email protected]>
* i965: Set the fast clear color value for texture surfacesNeil Roberts2014-06-122-2/+6
| | | | | | | | | | | | | | When a multisampled texture is used for sampling the fast clear color value needs to be programmed into the surface state. This was being left as all zeroes so if the surface was cleared to a value other than black then it wouldn't work properly. This doesn't matter for single-sample textures because in that case the MCS buffer is resolved before it is used as a texture source. https://bugs.freedesktop.org/show_bug.cgi?id=79729 Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Cc: "10.1 10.2" <[email protected]>
* glsl: Fix typo in comment.Chris Forbes2014-06-121-1/+1
| | | | Signed-off-by: Chris Forbes <[email protected]>
* i965: Fix disassembly of BLORP clear programs.Kenneth Graunke2014-06-121-1/+1
| | | | | | | Too many levels of indirection. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Move FB write default state mashing in a level.Kenneth Graunke2014-06-121-7/+7
| | | | | | | | | | We only need to alter the default state if we're emitting MOVs for header related fields. So, we can simply move the push/pop of state in to the if (header_present) block, bypassing it in the common case. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79903
* i965: Fix Haswell discard regressions since Gen4-5 line AA fix.Kenneth Graunke2014-06-121-2/+7
| | | | | | | | | | | | | | | | In commit dc2d3a7f5c217a7cee92380fbf503924a9591bea, Iago accidentally moved fire_fb_write() above the brw_pop_insn_state(), which caused the SEND to lose its predication and change from WE_normal to WE_all. Haswell uses predicated SENDs for discards, so this broke Piglit's tests for discards. We want the Gen4-5 MOV to be uncompressed, unpredicated, and unmasked, but the actual FB write itself should respect those. So, pop state first, and force it again around the single MOV. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79903
* gbm: Remove 64x64 restriction from GBM_BO_USE_CURSORMichel Dänzer2014-06-124-16/+12
| | | | | | | | | | GBM_BO_USE_CURSOR_64X64 is kept so that existing users of GBM continue to build, but it no longer rejects widths or heights other than 64. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79809 Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Use brw->gen in some generation checks.Matt Turner2014-06-115-11/+17
| | | | | | | Will simplify the automated conversion if we want to allow compiling the driver for a single generation. Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/fs: Clean up tabs in brw_fs_cse.cpp.Matt Turner2014-06-111-43/+43
| | | | I'm adding vec4 CSE, and I want to diff the files.
* configure.ac: Simplify DUSE_EXTERNAL_DXTN_LIB logic.Matt Turner2014-06-111-9/+3
| | | | | Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Alphabetize AC_CONFIG_FILES.Matt Turner2014-06-111-7/+7
| | | | | | | This isn't supposed to be difficult. Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Remove single quotes to fix syntax highlighting.Matt Turner2014-06-111-2/+2
| | | | | | | Please stop adding them. Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* meta: save and restore swizzle for _GenerateMipmapRobert Bragg2014-06-111-0/+12
| | | | | | | | | | This makes sure to use a no-op swizzle while iteratively rendering each level of a mipmap otherwise we may loose components and effectively apply the swizzle twice by the time these levels are sampled. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4: Emit smarter code for b2f of a comparisonIan Romanick2014-06-112-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | Previously we would emit the comparison, emit an AND to mask off extra bits from the comparison result, then convert the result to float. Now, do the comparison, then use a cleverly constructed SEL to pick either 0.0f or 1.0f. No piglit regressions on Ivybridge. total instructions in shared programs: 1642311 -> 1639449 (-0.17%) instructions in affected programs: 136533 -> 133671 (-2.10%) GAINED: 0 LOST: 0 Programs that are affected appear to save between 1 and 5 instuctions (just by skimming the output from shader-db report.py. v2: s/b2i/b2f/ in commit subject (noticed by Chris Forbes). Remove extraneous fix_3src_operand (suggested by Matt). The latter change required swapping the order of the operands and using predicate_inverse. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Silence a couple unused parameter warningsIan Romanick2014-06-111-2/+2
| | | | | | | | brw_vec4_visitor.cpp:2717:1: warning: unused parameter 'ir' [-Wunused-parameter] brw_vec4_visitor.cpp:2723:1: warning: unused parameter 'ir' [-Wunused-parameter] Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Store gl_uniform_driver_storage::format as the actual typeIan Romanick2014-06-112-6/+3
| | | | | | | | And delete the incorrect comment. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* softpipe: fix pt->resource assert placementDave Airlie2014-06-111-1/+1
| | | | | | oops meant to move this. Signed-off-by: Dave Airlie <[email protected]>
* softpipe: enable AMD_vertex_shader_layer.Dave Airlie2014-06-111-1/+1
| | | | | | | This passes tests now on softpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: enable GLSL 3.30 support.Dave Airlie2014-06-111-1/+1
| | | | | | | This enables GL3.3 on softpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: bump the softpipe geometry limitsDave Airlie2014-06-111-1/+1
| | | | | | | This just aligns the limits with llvmpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi_exec: use defines for max inputs/outputsDave Airlie2014-06-112-4/+4
| | | | | | | | | This fixes the limits for GL 3.2, and subsequently fixes some segfaults in some varying packing tests and max varying tests after the limits bumped. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add layered rendering support.Dave Airlie2014-06-117-9/+55
| | | | | | | This adds support for GL 3.2 layered rendering to softpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add layering to the surface tile cache.Dave Airlie2014-06-115-72/+112
| | | | | | | | | | This adds the layer info to the tile cache. This changes clear_flags to be dynamically allocated as MAX_LAYERS seems like a too big step. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add depth clamping support. (v2)Dave Airlie2014-06-112-6/+30
| | | | | | | | | | | | | This passes the piglit depth clamp tests. this is required for GL 3.2. v2: move min/max up one level, could go further, thanks to Roland for suggestion. v1: Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/gs: bound max output vertices in shaderDave Airlie2014-06-112-0/+9
| | | | | | | | | This limits the number of emitted vertices to the shaders max output vertices, and avoids us writing things into memory that isn't big enough for it. Reviewed-by: Zack Rusin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Add GPU BLIT of texture image to PBO in Intel driverJon Ashburn2014-06-101-0/+110
| | | | | | | | | | | | | | | | | | | Add Intel driver hook for glGetTexImage to accelerate the case of reading texture image into a PBO. This case gets huge performance gains by using GPU BLIT directly to PBO rather than GPU BLIT to temporary texture followed by memcpy. No regressions on Piglit tests with Intel driver. Performance gain (1280 x 800 FBO, Ivybridge): glGetTexImage + glMapBufferRange with patch 1.45 msec glGetTexImage + glMapBufferRange without patch 4.68 msec v3: (by Kenneth Graunke) - Fix compile after Eric's change to drop the tiling argument to intel_miptree_create_for_bo. - Add GL_TEXTURE_3D to blacklisted texture targets to prevent Piglit regressions. - Squash in several whitespace and coding style fixes.
* i965: Invalidate live intervals when inserting Gen4 SEND workarounds.Kenneth Graunke2014-06-101-0/+6
| | | | | | | | | We need to invalidate the live intervals when inserting new instructions. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* i965: Don't use the head sentinel as an fs_inst in Gen4 workaround code.Kenneth Graunke2014-06-101-1/+1
| | | | | | | | | | | When walking backwards, we want to stop at the head sentinel, which is where scan_inst->prev->prev == NULL, not scan_inst->prev == NULL. Fixes random crashes, as well as valgrind errors. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* meta: Label the meta GLSL clear program.Kenneth Graunke2014-06-101-0/+1
| | | | | | | | | Giving the meta clear program a meaningful name makes it easier to find in output such as INTEL_DEBUG=fs or INTEL_DEBUG=shader_time. We already did so for integer programs, but neglected to label the primary program. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Combine generate_math[12]_gen6 methods.Kenneth Graunke2014-06-102-33/+13
| | | | | | | | | | | | | | These used to call different math emitters (brw_math vs. brw_math2). Now that they both call gen6_math, they're virtually identical. When unrolling SIMD16 to multiple SIMD8 operations, we should take care not to apply sechalf to brw_null_reg for src1. Otherwise, we'd end up with BRW_ARF_NULL + 1 as the register number, and I'm not sure if that's valid. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Drop the generate_math[12]_gen7 methods.Kenneth Graunke2014-06-102-30/+5
| | | | | | | | | | These functions are basically identical, so we should combine them. However, they're so trivial, we may as well just fold them into their only call sites. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/vec4: Combine generate_math[12]_gen6 methods.Kenneth Graunke2014-06-102-28/+12
| | | | | | | | | These are trivial to combine: we should just avoid checking the second operand if it's brw_null_reg. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/vec4: Drop the generate_math2_gen7() method.Kenneth Graunke2014-06-102-14/+1
| | | | | | | | | It's now a single line of code, so we may as well fold it into the caller. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Rename brw_math to gen4_math.Kenneth Graunke2014-06-106-46/+46
| | | | | | | | | Usually, I try to use "brw" for functions that apply to all generations, and "gen4" for dead end/legacy code that is only used on Gen4-5. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Split Gen4-5 and Gen6+ MATH instruction emitters.Kenneth Graunke2014-06-104-89/+39
| | | | | | | | | | | | | | | | | | | | Our existing functions, brw_math and brw_math2, had unclear roles: Gen4-5 used brw_math for both unary and binary math functions; it never used brw_math2. Since operands are already in message registers, this is reasonable. Gen6+ used brw_math for unary math functions, and brw_math2 for binary math functions, duplicating a lot of code. The only real difference was that brw_math used brw_null_reg() for src1. This patch improves brw_math2's assertions to allow both unary and binary operations, renames it to gen6_math(), and drops the Gen6+ code out of brw_math(). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Make src_reg::equals() take a constant reference, not a pointer.Kenneth Graunke2014-06-103-14/+14
| | | | | | | This is more typical C++ style. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Don't set the "switch" flag on control flow instructions on Gen6+.Kenneth Graunke2014-06-101-6/+4
| | | | | | | | | | | | | | Thread switching on control flow instructions is a documented workaround for Gen4-5 errata. As far as I can tell, it hasn't been needed since Sandybridge. Thread switching is not free, so in theory this may help performance slightly. Flow control instructions with the "switch" flag cannot be compacted, so removing it will make these instructions compactable. (Of course, we still have to implement compaction for flow control instructions...) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Allow CSE on math opcodes on Gen6+.Kenneth Graunke2014-06-101-0/+11
| | | | | | | | | | total instructions in shared programs: 2081469 -> 2081248 (-0.01%) instructions in affected programs: 22606 -> 22385 (-0.98%) No programs were hurt by this patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* glsl: Remove unused include in expr.flatt.Thomas Helland2014-06-101-2/+0
| | | | | | | | Found with IWYU. Compile-tested on my Ivy-bridge system. Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Thomas Helland <[email protected]>
* glsl: Remove unused include in ir.cppThomas Helland2014-06-101-1/+0
| | | | | | | | Found with IWYU. Compile-tested on my Ivy-bridge system. Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Thomas Helland <[email protected]>
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