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* vc4: Don't forget to set up the offset for render targets.Eric Anholt2014-08-181-0/+2
* vc4: Fix multi-level texture setup.Eric Anholt2014-08-182-2/+12
* vc4: Fix viewport handling in the uniforms upload.Eric Anholt2014-08-181-4/+2
* docs/relnotes: document GLX_MESA_query_rendererMarek Olšák2014-08-191-0/+1
* clover: Refuse to build a program if there are kernel objects attached to it.Francisco Jerez2014-08-185-3/+18
* clover/util: Pass initial count value to ref_counter constructor.Francisco Jerez2014-08-181-2/+2
* clover/util: Implement minimalist reference to clover::ref_counter object.Francisco Jerez2014-08-181-0/+45
* clover: clGetProgramInfo support for OpenCL 1.2.EdB2014-08-171-0/+11
* nouveau: don't keep stale pointer to free'd dataIlia Mirkin2014-08-161-0/+1
* egl: don't exit process on initialization failureIlia Mirkin2014-08-161-1/+1
* mesa: fix compressed_subtexture_error_check() return valueBrian Paul2014-08-161-3/+3
* mesa: move _mesa_compressed_texture_pixel_storage_error_check()Brian Paul2014-08-165-46/+61
* mesa: minor improvements to _mesa_compute_compressed_pixelstore()Brian Paul2014-08-163-12/+23
* util: whitespace and formatting fixes in u_math.hBrian Paul2014-08-161-17/+23
* nouveau: make sure to invalidate any vbo state as wellIlia Mirkin2014-08-161-0/+1
* i965/gen6: Force ALL_SLICES_AT_EACH_LOD for separate stencil/hizJordan Justen2014-08-151-2/+4
* i965/gen6: Stencil/hiz needs an offset for LOD > 0Jordan Justen2014-08-152-3/+41
* i965/gen6: Force tile alignment for each stencil/hiz LODJordan Justen2014-08-151-3/+36
* i965: Support array_layout == ALL_SLICES_AT_EACH_LOD for multiple LODsJordan Justen2014-08-151-2/+19
* i965: Allow forcing miptree->array_layout = ALL_SLICES_AT_EACH_LODJordan Justen2014-08-157-17/+35
* i965: Change mipmap array_spacing_lod0 to array_layout (enum)Jordan Justen2014-08-157-19/+73
* i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surfaceJordan Justen2014-08-153-59/+51
* i965/gen6 fbo: make unmatched depth/stencil configs return unsupportedJordan Justen2014-08-151-3/+3
* i965/gen6 blorp depth: calculate base surface width/heightJordan Justen2014-08-151-0/+13
* i965/gen6 depth surface: calculate minimum array element being renderedJordan Justen2014-08-152-0/+4
* i965/gen6 depth surface: calculate LOD being rendered toJordan Justen2014-08-152-0/+6
* i965/gen6 depth surface: calculate depth (array size) for depth surfaceJordan Justen2014-08-152-0/+5
* i965/gen6 depth surface: calculate more specific surface typeJordan Justen2014-08-152-0/+50
* i965/gen6_depth_state.c: Remove (gen != 6) code pathsJordan Justen2014-08-151-31/+14
* i965: Split gen6 depth hiz state out from brwJordan Justen2014-08-154-1/+188
* i965/gen6: Adjust render height in errata case for MSAAJordan Justen2014-08-151-1/+17
* i965/gen6: Add support for layered renderbuffersJordan Justen2014-08-152-40/+43
* i965/gen6_surface_state.c: Remove (gen < 6) code pathJordan Justen2014-08-151-22/+0
* i965: Split gen6 renderbuffer surface state from gen5 and olderJordan Justen2014-08-154-0/+159
* meta: Use instanced rendering for layered clears.Kenneth Graunke2014-08-151-16/+5
* mesa: Expose vbo_exec_DrawArraysInstanced as _mesa_DrawArraysInstanced.Kenneth Graunke2014-08-152-0/+10
* Revert "hud: don't overrun malloced arrays"Dave Airlie2014-08-161-1/+0
* i965: Guard access to gl_Layer by extension #ifdefKristian Høgsberg2014-08-151-0/+2
* gallium/vc4: PIPE_CAP_VIDEO_MEMORY return the amount of system ramEmil Velikov2014-08-151-3/+9
* vc4: Add support for blending.Eric Anholt2014-08-155-12/+199
* vc4: Drop incorrect attempt to incorrectly invert the primconvert hw_mask.Eric Anholt2014-08-151-1/+1
* vc4: Use cl_f() instead of cl_u32(fui())Eric Anholt2014-08-151-6/+6
* vc4: Consistently use qir_uniform_f().Eric Anholt2014-08-151-7/+6
* vc4: Consume the implicit varyings for points and lines.Eric Anholt2014-08-153-12/+33
* vc4: Move the deref of the color buffer for simulator into the simulator.Eric Anholt2014-08-153-8/+4
* i965: Implement fast color clears using meta operationsKristian Høgsberg2014-08-1510-642/+744
* i965: Add optimization pass to let us use the replicate data messageKristian Høgsberg2014-08-155-1/+106
* meta: Export _mesa_meta_drawbuffers_from_bitfield()Kristian Høgsberg2014-08-152-3/+6
* mesa: Use _mesa_lock_context_textures in _mesa_GetTexParameterfv()Kristian Høgsberg2014-08-151-3/+3
* i965: Move pre-draw resolve buffers to dd::UpdateStateKristian Høgsberg2014-08-152-40/+25
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