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* intel/genxml: Make "Stencil Buffer Enable" a booleanJason Ekstrand2016-10-153-3/+3
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Make a couple of STREAMOUT fields booleansJason Ekstrand2016-10-154-8/+8
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Make "Include Vertex Handles" and "Include Primitive ID" booleansJason Ekstrand2016-10-154-12/+12
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Make "Vector Mask Enable" a booleanJason Ekstrand2016-10-153-9/+9
| | | | | | | We also get rid of the "(VME)" a few places Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/genxml: Make "Single Program Flow" a booleanJason Ekstrand2016-10-155-17/+17
| | | | | | | We also get rid of the "(SPF)" a few places. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nv50/ir: constant fold OP_SPLITTobias Klausmann2016-10-141-0/+18
| | | | | | | | | | | Split the source immediate value into new values and move them into the original defs set by the split. Since we can only have up to 64-bit immediates, this is largely beneficial for F64 (and, in the future, U64) operations. Signed-off-by: Tobias Klausmann <[email protected]> [imirkin: always use U32, set newi for foldCount tracking] Signed-off-by: Ilia Mirkin <[email protected]>
* i965: Enable OpenGL 4.5.Kenneth Graunke2016-10-142-2/+2
| | | | | | | | | Everything is in place. There are still conformance issues to sort out, but we may as well turn it on in master. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Remove a meta hack from emit_ds_stateJason Ekstrand2016-10-141-4/+1
| | | | Signed-off-by: Jason Ekstrand <[email protected]>
* anv/image: Create views directly in VkCreate*ViewJason Ekstrand2016-10-142-66/+34
| | | | | | | Without meta, we no longer need the _init helpers and the ability to back an image view with surface states allocated out of the command buffer. Signed-off-by: Jason Ekstrand <[email protected]>
* anv/image: Get rid of the usage hacks for metaJason Ekstrand2016-10-142-97/+28
| | | | | | | | Now that meta is gone and we're using blorp, we don't need all of the usage hacks. Instead, the usage provided by the app is exactly the usage that we want because the app is the only thing creating image views. Signed-off-by: Jason Ekstrand <[email protected]>
* anv: Move Create*Pipelines into genX_cmd_buffer.cJason Ekstrand2016-10-144-122/+61
| | | | | | | | Now that we don't have meta, we have no need for a gen-agnostic pipeline create path. We can, instead, just generate one Create*Pipelines function per gen and be done with it. Signed-off-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Remove support for direct-from-nir shadersJason Ekstrand2016-10-142-77/+54
| | | | Signed-off-by: Jason Ekstrand <[email protected]>
* anv: Make entrypoint resolution take a gen_device_infoJason Ekstrand2016-10-143-20/+12
| | | | | | | | | | | | In order for things such as the ANV_CALL and the ifuncs to work, we used to have a singleton gen_device_info structure that got assigned the first time you create a device. Given that the driver will never be used simultaneously on two different generations of hardware, this was fairly safe to do. However, it has caused a few hickups and isn't, in general, a good plan. Now that the two primary reasons for this singleton are gone, we can get rid of it and make things quite a bit safer. Signed-off-by: Jason Ekstrand <[email protected]>
* anv: Get rid of the ANV_CALL macroJason Ekstrand2016-10-144-14/+8
| | | | | | | | This macro was needed by meta in order to make gen-specific calls from gen-agnostic code. Now that we don't have meta, the remaining two uses are fairly trivial to get rid of. Signed-off-by: Jason Ekstrand <[email protected]>
* anv: Get rid of graphics_pipeline_create_info_extraJason Ekstrand2016-10-147-101/+35
| | | | | | | | | Now that we no longer have meta, all pipelines get created via the normal Vulkan pipeline creation mechanics. There is no more need for this bit of extra magic data that we've been passing around. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv: Get rid of metaJason Ekstrand2016-10-147-765/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv: Use blorp for subpass clearsJason Ekstrand2016-10-142-298/+81
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv: Use blorp for ClearAttachmentsJason Ekstrand2016-10-142-24/+113
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv/hiz: Perform HiZ resolves for all partial rendersJason Ekstrand2016-10-141-1/+11
| | | | | | | | | | | | | | If we don't, we can end up with corruption in the portion of the depth buffer that lies outside the render area when we do a HiZ resolve at the end. The only reason we weren't seeing this before was that all of the meta-based clears such as VkCmdClearDepthStencilImage were internally using HiZ so the HiZ buffer never truly got out-of-sync. If the CTS ever tested a depth upload (which doesn't care about HiZ) and then a partial render we would have seen problems. Soon, we will be using blorp to do depth clears and it won't bother with HiZ so we would get CTS regressions without this. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* anv: Use blorp for ClearDepthStencilImageJason Ekstrand2016-10-142-141/+59
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv/image: Add an isl_view to anv_image_viewJason Ekstrand2016-10-145-26/+26
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv/image: Rework our handling of 3-D image array rangesJason Ekstrand2016-10-141-4/+12
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* anv/blorp: Don't hand-roll flush_pipeline_select_3dJason Ekstrand2016-10-141-38/+1
| | | | | | | | When I initially brought up Vulkan blorp, I completely missed that this was already factored out. There's no good reason for us to hand-roll it. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Add a flag to make blorp not re-emit dept/stencil buffersJason Ekstrand2016-10-145-18/+32
| | | | | | | | | | | In Vulkan, we want to be able to use blorp to perform clears inside of a render pass. If blorp stomps the depth/stencil buffers packets then we'll have to re-emit them. This gets tricky when secondary command buffers get involved. Instead, we'll simply guarantee that the depth and stencil buffers we pass to blorp (if any) match those already set in the hardware. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Add an entrypoint for clearing depth and stencilJason Ekstrand2016-10-142-0/+79
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Emit a NULL render target for depth/stencil-only operationsJason Ekstrand2016-10-141-5/+44
| | | | | | | | | | This never mattered before because the only time we used blorp depth/stencil only was to do HiZ operations on gen6-7. It may have worked in that case (and maybe it didn't) but slow depth clears actually do depth rendering so they need a valid render target. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Allow for running without a PS on gen8+Jason Ekstrand2016-10-141-18/+24
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Add an "enabled" bit to surface_infoJason Ekstrand2016-10-143-15/+19
| | | | | | | | This gives a slightly smarter way to check whether or not a particular surface exists than looking at the address. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Emit more complete DEPTH_STENCIL stateJason Ekstrand2016-10-142-11/+47
| | | | | | | | | | This should now set the pipeline up properly for doing depth and/or stencil clears by plumbing through depth/stencil test values. We are now also emitting color calculator state for blorp operations without an actual shader because that is where the stencil reference value goes pre-SKL. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Unify the DEPTH_STENCIL emit code across gensJason Ekstrand2016-10-141-12/+15
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Simplify depth/stencil configJason Ekstrand2016-10-141-15/+5
| | | | | | | | | The newly reworked depth/stencil config code can properly handle having depth, stencil, both, or neither. We no longer need to predicate it on having depth or stencil. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Set QPitch for depth and HiZ on gen8+Jason Ekstrand2016-10-141-0/+9
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* intel/blorp: Add support for binding an actual stencil bufferJason Ekstrand2016-10-142-34/+79
| | | | | | | | | | | While we're here, we also make depth without HiZ work. v2: - Use the correct surface type for 1-D on SKL+ - Set QPitch on BDW+ Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Move CLEAR_PARAMS setup into emit_depth_stencil_configJason Ekstrand2016-10-141-11/+12
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/genxml: Add a uint MOCS field to 3DSTATE_STENCIL_BUFFERJason Ekstrand2016-10-145-0/+5
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/blorp: Make the Z component of the primitive adjustableJason Ekstrand2016-10-142-6/+7
| | | | | | | | We want to be able to start doing slow depth clears with blorp. This allows us to adjust the depth we're clearing to. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i915: workaround multiple intelFenceExtension definitionsEmil Velikov2016-10-141-0/+1
| | | | | | | | | | | | | Due to conflicting symbol names (between i915 and i965) in the megadriver, we use a set of defines in i915/intel_screen.h. With a recent commit we've introduced a symbol intelFenceExtension which has different implementation for each driver, yet we forgot to add the define. Fixes: d11515ff1b3 ("i915/sync: Implement DRI2_Fence extension") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98264 Signed-off-by: Emil Velikov <[email protected]>
* docs/specs: Update allocated EGL enum valuesChad Versace2016-10-141-1/+26
| | | | | | | | | | | | Document the EGL enum ranges for Mesa and those values allocated by the following extensions: EGL_MESA_drm_image EGL_MESA_platform_gbm EGL_MESA_platform_surfaceless EGL_WL_bind_wayland_display Reviewed-by: Emil Velikov <[email protected]>
* doc/specs: Reference the Khronos registry XMLChad Versace2016-10-141-6/+10
| | | | | | | Years ago Khronos replaced the registry's spec files with newfangled XML files. Update the reference in doc/specs/enum.txt accordingly. Reviewed-by: Emil Velikov <[email protected]>
* egl: Move old EGL_MESA_screen_surface specChad Versace2016-10-141-0/+0
| | | | | | | It was the lone file in src/egl/docs. Move it to where the other specs live, in $MESA_TOP/docs/specs. Reviewed-by: Emil Velikov <[email protected]>
* egl: Implement EGL_MESA_platform_surfacelessChad Versace2016-10-145-1/+75
| | | | Reviewed-by: Emil Velikov <[email protected]>
* egl: Don't advertise unsupported platform extensionsChad Versace2016-10-141-2/+8
| | | | | | | | | | | | | Mesa's set of supported platform extensions depends on the autoconf option --with-egl-platforms=foo,bar,baz. If --with-egl-platforms lacks foo, then eglGetPlatformDisplay(EGL_PLATFORM_FOO, ...) unconditonally fails. So, if --with-egl-platforms lacks foo, then remove EGL_VENDOR_platform_foo from the EGL client extension string. Cc: [email protected] Reviewed-by: Emil Velikov <[email protected]>
* docs: Add EGL_MESA_platform_surfaceless.txt (v2)Chad Versace2016-10-141-0/+120
| | | | | | | | v2: - Assign enum values. - Define interactions with EGL_EXT_platform_base and EGL 1.4. Reviewed-by: Emil Velikov <[email protected]>
* i965: Sort some extension namesIan Romanick2016-10-141-3/+3
| | | | | | | Trivial. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]>
* scons: Fix the Python dependency scanner.Jose Fonseca2016-10-141-2/+8
| | | | | | | | | | | | | | modulefinder wasn't searching for dependencies in the script dir. It's not capable of detecting the sys.path manipulations scripts do internally neither. This change fixes the first issue, and hacks around the second. Honestly, I've come to the conclusion that automatic Python dependency it will always be too brittle. I think we should start manually typing the dependencies like we do in automake. At very least it will enable any person to eyeball and spot/fix missing dependencies, without dig into SCons internals.
* pipe_loader_sw: Don't invoke Unix close() on Windows.Jose Fonseca2016-10-141-0/+2
| | | | Trivial.
* Revert "egl/dri2: rework dri2_make_current code flow"Emil Velikov2016-10-141-36/+36
| | | | This reverts commit 675719817e7bf7c5b9da22c02252aca77a41338d.
* i915: store reference to the context within struct intel_fence (v2)Mauro Rossi2016-10-141-11/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Porting of the corresponding patch for i965. Here follows the original commit message by Tomasz Figa: "As the spec allows for {server,client}_wait_sync to be called without currently bound context, while our implementation requires context pointer. v2: Add a mutex and acquire it for the duration of brw_fence_client_wait() and brw_fence_is_completed() as suggested by Chad." NOTE: in i915 all references to 'brw' are replaced by 'intel' Marshmallow-x86 boots ok with the following results of Android CTS. Android CTS 6.0_r7 build:2906653 Session Pass Fail Not Executed 0(EGL) 1410 24 0 1(GLES2) 13832 82 0 I get the same results as per i965GM. [Emil Velikov: Include Mauro's test results] Signed-off-by: Emil Velikov <[email protected]>
* i915/sync: Implement DRI2_Fence extensionMauro Rossi2016-10-143-30/+152
| | | | | | | | | | | Here is the porting of corresponding patch for i965, i.e. commit c636284 i965/sync: Implement DRI2_Fence extension Here follows part of original commit message by Chad Versace: "This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync." Signed-off-by: Emil Velikov <[email protected]>
* i915/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'Mauro Rossi2016-10-142-26/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | This is the porting of corresponding patch for i965, i.e. commit 2516d83 i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync' The only difference compared to i965 one is that intel_check_sync() was renamed to intel_gl_check_sync() here, as it is more appropriate. Here follows original commit message by Chad Versace: "I'm about to implement DRI2_Fenc in intel_syncobj.c. To prevent madness, we need to prefix functions for GL_ARB_sync with 'gl' and functions for DRI2_Fence with 'dri'. Otherwise, the file will become a jumble of similiarly named functions. For example: old-name: intel_client_wait_sync() new-name: intel_gl_client_wait_sync() soon-to-come: intel_dri_client_wait_sync() I wrote this renaming commit separately from the commit that implements DRI2_Fence because I wanted the latter diff to be reviewable." [Emil Velikov: rename the outstanding intel_sync instances] Signed-off-by: Emil Velikov <[email protected]>
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