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* radv: split the device local memory heap into twoFredrik Höglund2016-10-283-6/+20
| | | | | | | | | | Advertise two device local memory heaps; one that is host visible and one that is not. This makes it possible for clients to tell how much host visible vs. non-host visible memory is available. Signed-off-by: Dave Airlie <[email protected]>
* radv: add a write-combining host-local memory typeFredrik Höglund2016-10-281-4/+13
| | | | | | | | | | | | | | | | | | | | | | Add the new memory type between the two device-local types. This makes the list of supported memory types look like this: 1) DEVICE_LOCAL | | | 2) | HOST_VISIBLE | HOST_COHERENT | 3) DEVICE_LOCAL | HOST_VISIBLE | HOST_COHERENT | 4) | HOST_VISIBLE | HOST_COHERENT | HOST_CACHED With this order a client that searches for a HOST_VISIBLE and HOST_COHERENT memory type using the algorithm described in section 10.2 of the Vulkan specification (revision 32) will find the host- local memory type first. A client that requires the memory type to be HOST_VISIBLE and HOST_COHERENT, but not DEVICE_LOCAL is most likely searching for a memory type suitable for staging buffers / images. Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965/miptree: Remove the width/height < 32768 restrictionsJason Ekstrand2016-10-272-8/+1
| | | | | | | | | | | | These restrictions existed because intel_miptree_blit couldn't handle surfaces bigger than 32k. How that we're chopping blits up into chunks, it can handle any size we throw at it so we can get rid of this restriction. This improves the terrain tests in synmark by 25-30% on my Sky Lake gt3. Signed-off-by: Jason Ekstrand <[email protected]> Reported-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/blit: Break blits into chunks in intel_miptree_blitJason Ekstrand2016-10-271-23/+41
| | | | | | | | | | | | | | This allows us to blit much larger images than if we use the blitter directly. In particular, it gives us an almost infinite image height compared to the fairly limiting 32k. We do, however, still have a restriction on stride of the image because handling larger strides, while possible, is fairly difficult. v2: Properly handle linear blit alignment restrictions Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/blit: Break blits into chunks in set_alpha_to_oneJason Ekstrand2016-10-271-15/+73
| | | | | | | | v2: Properly handle linear blit alignment restrictions Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/blit: Remove a bogus assertionJason Ekstrand2016-10-271-4/+0
| | | | | | | | | | | | This assertion, while valid for linear buffers, doesn't work properly for tiled memory. It used to work most of the time because the offset provided was always to the left-hand edge of the image. However, if you use a byte offset to get to the inside of the image, the height * stride calculation may actually end up being too large. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/miptree: Break miptree -> ISL tiling conversion into a helperJason Ekstrand2016-10-272-25/+33
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offsetJason Ekstrand2016-10-275-28/+8
| | | | | | | | | The only actual user of this parameter was blorp and, since the conversion to ISL, it no longer uses this function. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/blorp: Fix a couple asserts around image copy rectanglesJason Ekstrand2016-10-271-2/+6
| | | | | | | | | | | | | | | | | With dealing with rectangles in compressed images, you can have a width or height that isn't a multiple of the corresponding compression block dimension but only if that edge of your rectangle is on the edge of the image. When we call convert_to_single_slice, it creates an 2-D image and a set of tile offsets into that image. When detecting the right-edge and bottom-edge cases, we weren't including the tile offsets so the assert would misfire. This caused crashes in a few UE4 demos Signed-off-by: Jason Ekstrand <[email protected]> Reported-by: "Eero Tamminen" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98431 Cc: "13.0" <[email protected]> Tested-by: "Eero Tamminen" <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* anv/allocator: Assert that we have a valid gem handle in bo_pool_allocJason Ekstrand2016-10-271-0/+1
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* nvc0/ir: fix emission of IMAD with NEG modifiersSamuel Pitoiset2016-10-272-2/+2
| | | | | | | | | The emitter tried to emit sub instead of subr when src0 has actually a NEG modifier. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "11.0 12.0 13.0" <[email protected]>
* glsl: inspect interfaces in contains_foo()Juan A. Suarez Romero2016-10-272-13/+14
| | | | | | | | | | | | | When checking if a type contains doubles, integers, samples, etc. we check if the current type is a record or array, but not if it is an interface. This commit also inspects if the type is an interface. It fixes spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/invalid-block-with-double.vert piglit test. Reviewed-by: Timothy Arceri <[email protected]>
* i965/vec4: make offset() work in terms of a simd width and scalar componentsIago Toral Quiroga2016-10-273-18/+16
| | | | | | | | | | | | | | | So that it has the same semantics as the scalar backend implementation. The helper will now take a simd width (which is always 8 in vec4 mode) and step as many scalar components as specified by that width, respecting the size of the scalar channels. v2 (Curro): - Remove the assertion in offset(), byte_offset() has the same checks. - Use byte_offset() directly instead of add_byte_offset(). - Make things more clear by explicitly including the vertical stride in the byte offset expression. Reviewed-by: Francisco Jerez <[email protected]>
* i965/vec4: use byte_offset() instead of offset()Iago Toral Quiroga2016-10-275-15/+29
| | | | | | | | | | | In a later patch we want to change the semantics of offset() to be in terms of SIMD width and scalar channels so it is consistent with the definition of the same helper in the scalar backend. However, some uses of offset() in the vec4 backend do not operate naturally in terms of these semantics. In these cases it is more natural to use the byte_offset() helper instead. Reviewed-by: Francisco Jerez <[email protected]>
* i965/vec4: add a byte_offset helperIago Toral Quiroga2016-10-271-0/+50
| | | | | | | | v2: wrap the helper in a namespace to make clear that it is an implementation detail of byte_offset() and is not intended to be used independently (Curro). Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Size TCS->TES unsized arrays to gl_MaxPatchVertices for queries.Kenneth Graunke2016-10-274-3/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SSO validation and other program interface queries want to see that unsized (non-patch) TCS output/TES input arrays are implicitly sized to gl_MaxPatchVertices. By the time we create the program resource lists, we've sized the arrays to their actual size. (We try to create TCS output arrays to match the output patch size right away, and at this point, we should have shrunk TES input arrays.) One option would be to keep them sized to gl_MaxPatchVertices, and defer shrinking them. But that's a big change, and I don't think it's a good idea. Instead, this patch introduces a new ir_variable flag which indicates the variable is implicitly to gl_MaxPatchVertices. Then, the linker munges the types when creating the resource list, ignoring the size in the IR's types. Basically, lie about it for resource queries. It's ugly, but I think it ought to work. We probably could use var->data.implicit_sized_array for this, but I opted for a separate bit to try and avoid convoluting the existing SSBO handling. They're similar in concept, but share none of the same code... Fixes: ES31-CTS.core.tessellation_shader.single.xfb_captures_data_from_correct_stage and the ES32-CTS and ESEXT-CTS variants. v2: Add a comment (requested by Timothy, written by me). Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: Pass ctx to program interface query helper functions.Kenneth Graunke2016-10-271-13/+20
| | | | | | | | | | The next commit will use this in add_shader_variable - this just separates out some of the mechanical changes for easier review. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* egl: set preserved behavior for surface only if config supports itTapani Pälli2016-10-271-1/+5
| | | | | | | | | | | | | | Otherwise we can end up with mismatching behavior between config and surface when client queries surface attributes. As example, configs for DRI3 do not support preserved behavior but here we were setting preserved behavior for pixmap and pbuffer. Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98326 Cc: "12.0 13.0" <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Chad Versace <[email protected]> Tested-by: Mark Janes <[email protected]>
* mesa: expose GL_EXT_robustnessTapani Pälli2016-10-271-0/+1
| | | | | | | | | | | Fixes 8 failing dEQP tests: dEQP-EGL.functional.create_context_ext.robust_gles* (now 42 tests pass in dEQP-EGL*robust*, 0 fail and rest are skipped) Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98343 Reviewed-by: Eric Engestrom <[email protected]>
* st/mesa: set RobustAccess true when is supportedTapani Pälli2016-10-271-1/+3
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i956: set RobustAccess true when is supportedTapani Pälli2016-10-271-1/+3
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* mesa: add missing CONTEXT_ROBUST_ACCESS enumTapani Pälli2016-10-275-0/+11
| | | | | | | | commit 85008db1d51f923113832394d7f8d6b1868be882 missed this enum for GL_KHR_robustness implementation Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* egl: fix error handling in _eglCreateSyncTapani Pälli2016-10-271-2/+9
| | | | | | | | | | | | EGL specification requires context to be current only when sync type matches EGL_SYNC_FENCE_KHR. Fixes 25 failing dEQP tests: dEQP-EGL.functional.reusable_sync.* Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98339 Reviewed-by: Eric Engestrom <[email protected]>
* vulkan/wsi/x11: add support for IMMEDIATE present modeDave Airlie2016-10-271-1/+3
| | | | | | | | We shouldn't be using ASYNC here, that would be used for immediate mode, so let's implement that. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vulkan/wsi: store present mode in swapchain base classDave Airlie2016-10-273-3/+5
| | | | | | | | This just moves this up a level as x11 will need it to implement things properly. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vulkan/wsi/x11: handle timeouts properly in next image acquire (v1.1)Dave Airlie2016-10-271-5/+57
| | | | | | | | | | | | | For 0 timeout, just poll for an event, and if none, return For UINT64_MAX timeout, just wait for special event blocked For other timeouts get the xcb fd and block on it, decreasing the timeout if we get woken up for non-special events. v1.1: return VK_TIMEOUT for poll timeouts. handle timeout going negative. Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac/llvm: trim texture return valuesDave Airlie2016-10-271-1/+2
| | | | | | | | | | | | | The intrinsic engine asserts in llvm due to this, as we put a vec4 into a vec1, and the next instruction isn't expecting it. So trim the vector at the end before inserting it. Reported-by: Christoph Haag <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* glsl: Add pthread libs to cache_testRhys Kidd2016-10-271-1/+4
| | | | | | | | | | | Fixes the following compile error, present when the SHA1 library is libgcrypt: CCLD glsl/tests/cache-test glsl/.libs/libglsl.a(libmesautil_la-mesa-sha1.o): In function `call_once': /mesa/src/util/../../include/c11/threads_posix.h:96: undefined reference to `pthread_once' Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* genxml: Handle failure of Python codegen scripts.Matt Turner2016-10-261-1/+1
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* nvc0/ir: fix emission of SHLADD with NEG modifiersSamuel Pitoiset2016-10-262-2/+2
| | | | | | | | | | | | | This affects GF100:GK110 chipsets, but not GM107+ where the logic is a bit different. The emitters tried to emit sub instead of subr when src0 has a NEG modifier. This fixes the following piglit tests glsl-fs-loop-nested and glsl-vs-loop-nested. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]> Cc: "13.0" <[email protected]>
* compiler: avoid warning about redefinition of PYTHON_GENErik Faye-Lund2016-10-263-3/+1
| | | | | | | | | | | | PYTHON_GEN is defined to the exact same thing in both Makefile.glsl.am and Makefile.nir.am. This makes automake complain, so let's lift the definition up to Makefile.am, the same way as MKDIR_GEN. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl/dri2: swap_buffers_with_damage falls back to swap_buffersEric Engestrom2016-10-261-1/+2
| | | | | | | | | | | | | | | | | | Since commit 0a606a400fe3 ("egl: add eglSwapBuffersWithDamageKHR"), Android has been broken because the function eglSwapBuffersWithDamageKHR is provided regardless of the extension being present. Also, the Android meta-EGL always advertises the extension regardless of the underlying EGL implementation. As there doesn't seem to be a simple way conditionally make the EGL function ptr NULL, just implement a brain dead version of eglSwapBuffersWithDamage{KHR,EXT}. Cc: 13.0 <[email protected]> CC: Rob Clark <[email protected]> Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Rob Herring <[email protected]> [Emil Velikov: copy the original commit message from Rob's patch] Reviewed-by: Emil Velikov <[email protected]>
* compiler: automake: add shader_info.h to the sources listEmil Velikov2016-10-261-1/+2
| | | | | | | Otherwise it'll be missing from the tarball. Fixes: 094fe3a9591 ("nir: move nir_shader_info to a common compiler header") Signed-off-by: Emil Velikov <[email protected]>
* configure.ac: simplify EGL requirements for drivers dependent on EGLMarek Olšák2016-10-261-14/+13
| | | | Reviewed-by: Emil Velikov <[email protected]>
* st/mesa: allow multiple concurrent waiters in ClientWaitSyncMarek Olšák2016-10-261-4/+22
| | | | | | | | | | so->fence can be unreferenced by one thread while another thread is somewhere in ClientWaitSync and expecting so->fence to be non-NULL. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98172 Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: unduplicate st_check_sync codeMarek Olšák2016-10-261-20/+6
| | | | | | | | It's the same as st_client_wait_sync. Discovered by Michel. This is needed to make the following fix simpler. Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove si_resource_create_customMarek Olšák2016-10-265-20/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using PIPE_BIND_CUSTOMMarek Olšák2016-10-2611-24/+18
| | | | | | it has no effect whatsoever Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: remove a redundant buffer_create helperMarek Olšák2016-10-261-23/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unused r600_cmask_info membersMarek Olšák2016-10-262-16/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't force the same tiling parameters for FMASKMarek Olšák2016-10-262-8/+12
| | | | | | | | | GCN can use a completely different tile mode for FMASK. FMASK allocation now skips one unrelated amdgpu_surface_init codepath as hinted by the assertion. Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: allocate FMASK properlyMarek Olšák2016-10-261-2/+4
| | | | | | | I expect no change in behavior, because r600_texture.c forces the same tile mode as the base texture has. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: print tiling index when printing texture infoMarek Olšák2016-10-261-4/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't do (fmask.size && cmask.size)Marek Olšák2016-10-263-3/+3
| | | | | | fmask implies that cmask is present too. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: re-order radeon_surf::dcc and htile membersMarek Olšák2016-10-261-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignmentMarek Olšák2016-10-267-20/+20
| | | | | | these names were misleading. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove flags specific to libdrm_radeon from winsys interfaceMarek Olšák2016-10-263-15/+6
| | | | | | | These just say whether libdrm can assume that the latest radeon_surface definition is used by Mesa. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_htile_infoMarek Olšák2016-10-263-38/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unnecessary fields from radeon_surf_levelMarek Olšák2016-10-267-37/+16
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: decrease the size of radeon_surfMarek Olšák2016-10-263-34/+36
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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