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* r300g: fix RG/LATC1_SNORM by doing UNORM->SNORM conversion in the shaderMarek Olšák2011-04-056-36/+123
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* r300/compiler: implement the CND opcodeMarek Olšák2011-04-057-3/+17
| | | | No one uses it now, but I will need it for a lowering pass.
* r300/compiler: set the MSB of ADDR for inline constantsMarek Olšák2011-04-051-2/+5
| | | | The docs say so.
* st/mesa: minor assorted clean-ups and fixesBrian Paul2011-04-041-20/+22
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* st/mesa: use 'array' local var to simplify the code a bitBrian Paul2011-04-041-29/+28
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* st/mesa: fix zero-sized user vertex buffer bugBrian Paul2011-04-041-13/+23
| | | | | | | Commit 4c4ab5668cd6df573db7b065f0493fb80ac70ab8 didn't properly handle the stride==0 case. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=35961
* mesa: Add fall-back formats for unsupported snorm formatsIan Romanick2011-04-041-3/+23
| | | | | | | | | | | | | | | | | | | | This is always the way with real hardware and desktop OpenGL. Some hardware can't do some formats natively. The alpha-only, luminance, and intensity formats are usually the most problematic. Some sized formats can also be problematic. This patch provides fall-back formats for those that are not natively supported. At some point it would be interesting to try providing device-independent conversions using EXT_texture_swizzle. The drivers that support EXT_texture_swizzle could, for example, see GL_LUMINANCE16_SNORM as MESA_FORMAT_SIGNED_R16 with a { r, r, r, 1 } swizzle. Care would need to be taken to prevent issues with using those textures for FBO rendering. This is the rest of the fix for glean's pixelFormats test on i965. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add the missing supportable EXT_texture_snorm formatsIan Romanick2011-04-042-0/+9
| | | | | | | | | | | | This class of hardware can natively sample all of the snorm surface formats that DX10 requires, but it can't do some of the legacy GL formats. In particular, all of the alpha, luminance, and intensity formats are unsupported. This partially fixes the breakage in glean's pixelFormats test since GL_EXT_texture_snorm support was added to Mesa. Reviewed-by: Kenneth Graunke <[email protected]>
* nv50: prevent NV_OP_SELECT from having flags_def definedBryan Cain2011-04-041-0/+1
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* mesa: work around failed assertion for GL_RGBA16_SNORM accum bufferBrian Paul2011-04-041-1/+14
| | | | | | | | We use this format to represent the accum buffer. No snorm texture sampling or rendering takes place. Fixes failed assertion with swrast and any app using the accum buffer (and glxinfo).
* docs: update prerequisites, remove old demo infoBrian Paul2011-04-041-80/+24
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* docs: update info about Mesa packaging/contentsBrian Paul2011-04-041-58/+25
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* r300/compiler: apply the texture swizzle to shadow pass and fail values tooMarek Olšák2011-04-041-8/+20
| | | | | | | | | | | | Piglit tests: - glsl-fs-shadow2d-01 - glsl-fs-shadow2d-02 - glsl-fs-shadow2d-03 - fs-shadow2d-red-01 - fs-shadow2d-red-02 - fs-shadow2d-red-03 NOTE: This is a candidate for the stable branches.
* r300/compiler: propagate SaturateMode down to the result of shadow comparisonMarek Olšák2011-04-041-0/+3
| | | | NOTE: This is a candidate for the stable branches.
* r600g: add some additional ontario pci idsAlex Deucher2011-04-041-0/+2
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600c: add new ontario pci idsAlex Deucher2011-04-042-0/+4
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r300g: do not wait for a busy BO if neither GPU nor CPU is changing itMarek Olšák2011-04-034-12/+75
| | | | | Improves frame rate in apps with at least one user vertex buffer and a hw index buffer.
* r300g: remove unused RADEON_PB_USAGE_CACHEMarek Olšák2011-04-032-6/+0
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* r300g: tell the GLSL compiler to lower the continue opcodeMarek Olšák2011-04-031-2/+2
| | | | NOTE: This is a candidate for the stable branches.
* r300g: avoid mapping the same buffer twiceMarek Olšák2011-04-031-0/+5
| | | | Shouldn't happen, but you never know.
* r300g: handle DISCARD_WHOLE_RESOURCE for buffersMarek Olšák2011-04-031-10/+25
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* r300g: remove the redundant reference counter in radeon_boMarek Olšák2011-04-033-36/+21
| | | | We already have pb_buffer::reference::count.
* Revert "r300/compiler: Remove obsolete compiler passes"Tom Stellard2011-04-027-0/+415
| | | | | | | This reverts commit 9f013a8233197d4a0482661cb37cfeac1a61b804. These passes are still need for non-GLSL paths like g3dvl and ARB programs.
* i965/fs: Switch W and 1/W in Sandybridge interpolation setup.Kenneth Graunke2011-04-021-4/+4
| | | | | | | | | | | | Various documentation mentions that "W" is handed to the WM stage, but further digging seems to indicate that they really mean 1/W. The code here is still unclear, but changing this fixes piglit test "fragcoord_w" on Sandybridge as well as a Khronos ES2 conformance test. I also tested 3DMarkMobile ES2.0's taiji and hoverjet demos, as well as Nexuiz, just to be safe. NOTE: This is a candidate for the 7.10 branch.
* i965: Fix null register use in Sandybridge implied move resolution.Kenneth Graunke2011-04-031-9/+8
| | | | | | | | | | | Fixes regressions caused by commit 9a21bc6401, namely GPU hangs when running gnome-shell or compiz (Mesa bugs #35820 and #35853). I incorrectly refactored the case that dealt with ARF_NULL; even in that case, the source register needs to be changed to the MRF. NOTE: This is a candidate for the 7.10 branch (if 9a21bc6401 is cherry-picked, take this one too).
* i965: Fix the VS thread limits for GT1, and clarify the WM limits on both.Eric Anholt2011-04-013-4/+13
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* tests: Use elts in translate_test.José Fonseca2011-04-011-8/+14
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* scons: Add aliases for unit tests.José Fonseca2011-04-011-4/+4
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* translate: Respect translate_buffer::max_index.José Fonseca2011-04-013-2/+28
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* draw: Prevent out-of-bounds vertex buffer access.José Fonseca2011-04-0111-7/+157
| | | | Based on some code and ideas from Keith Whitwell.
* gallium: set PIPE_CAP_MIXED_COLORBUFFER_FORMATS in some driversMarek Olšák2011-04-018-0/+11
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* gallium: add a CAP for mixed colorbuffer format supportMarek Olšák2011-04-012-1/+25
| | | | | Some GPUs can't do it (I think most of DX9 ones), so they should have the option not to allow it.
* r300/compiler: Remove obsolete compiler passesTom Stellard2011-03-317-415/+0
| | | | | | Branch emulation and loop unrolling are done in the GLSL frontend. Transforming loops is no longer needed for fragment shaders, but it is still necessary for vertex shaders.
* prog_optimize: Fix reallocating registers for shaders with loopsTom Stellard2011-03-311-3/+14
| | | | | | | | | | | Registers that are used inside of loops need to be considered live starting with the first instruction of the outermost loop. https://bugs.freedesktop.org/show_bug.cgi?id=34370 NOTE: This is a candidate for the 7.9 and 7.10 branches. Reviewed-by: Eric Anholt <[email protected]>
* nv50: fix for GPR allocation granularity being 16 bitChristoph Bumiller2011-03-311-3/+9
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* nv50: copy regalloc fixes from nvc0Christoph Bumiller2011-03-312-80/+216
| | | | | | | Should fix gnome-shell's fade shader. Unification of the shader backend which is supposed to remove the code duplication is still WIP.
* draw: Revert code reorg in previous change.José Fonseca2011-03-311-4/+4
| | | | | | | | | | Because fetch_count = max_index - min_index + 1 overflows for min_index = 0 and max_index = 0xffffffff. Fixes fdo 35815.
* intel: Fix regression in clear_with_blit from 7bae1c3dChris Wilson2011-03-311-11/+12
| | | | | | | | | | Oops, the mask was being used in the loop to determine whether to use include the stencil || depth values. This began to fail when mask was cleared at the beginning of the loop. So reorder the tests and do the work up-front along with determining the depth_stencil value to use. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35822 Signed-off-by: Chris Wilson <[email protected]>
* draw: implement vertex color clamping, and disable SSE and PPC pathsLuca Barbieri2011-03-314-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (some little changes by Marek Olšák) Squashed commit of the following: commit 737c0c6b7d591ac0fc969a7590e1691eeef0ce5e Author: Luca Barbieri <[email protected]> Date: Fri Aug 27 02:13:57 2010 +0200 draw: disable SSE and PPC paths (use LLVM instead) These paths don't support vertex clamping, and are anyway obsoleted by LLVM. If you want to re-enable them, add vertex clamping and test that it works with the ARB_color_buffer_float piglit tests. commit fed3486a7ca0683b403913604a26ee49a3ef48c7 Author: Luca Barbieri <[email protected]> Date: Thu Aug 26 18:27:38 2010 +0200 draw_llvm: respect vertex color clamp commit ef0efe9f3d1d0f9b40ebab78940491d2154277a9 Author: Luca Barbieri <[email protected]> Date: Thu Aug 26 18:26:43 2010 +0200 draw: respect vertex clamping in interpreter path
* gallium: list use inline function to avoid macro shot comingJerome Glisse2011-03-301-43/+67
| | | | | | | | | | | | | | | | | | | Macro can lead to hard to debug list bugs. For instance consider the following : LIST_ADD(item, list->prev) 3 instruction of the macro became : (list->prev)->next->prev = item which is equivalent to : list->prev = item Thus list prev field changes and next instruction in the macro (list->prev)->next = item became : item->next = item And you endup with list corruption, other case lead to similar list corruption. Inline function are not affected by this short coming Signed-off-by: Jerome Glisse <[email protected]>
* draw: Forgot to remove one istart usage.José Fonseca2011-03-301-1/+1
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* draw: Fix bug when drawing ushort indices.José Fonseca2011-03-301-6/+8
| | | | | | | | | | When the condition min_index == 0 && sizeof(ib[0]) == sizeof(draw_elts[0]) was true, we were wrongly ignoring istart and processing indices 0. Reorder some statements to make the code easier to understand.
* intel: Remove the unrelaxed relocation assertionChris Wilson2011-03-301-4/+0
| | | | | | | Now that we purposefully generate delta that point outside of the target buffer, the assertion has outlived its usefulness. Signed-off-by: Chris Wilson <[email protected]>
* egl_dri2 x11: Fix a typoFeng, Haitao2011-03-301-1/+1
| | | | Signed-off-by: Haitao Feng <[email protected]>
* intel: Add some defense against buffer allocation failure for subimage blitsChris Wilson2011-03-301-1/+9
| | | | | | | Once more! This time without the unwarranted conversion from drm_intel_bo_alloc_tiled. Signed-off-by: [a very embarrassed] Chris Wilson <[email protected]>
* Revert "intel: Add some defense against buffer allocation failure for ↵Chris Wilson2011-03-301-11/+11
| | | | | | | | | | | | | | subimage blits" This reverts commit de7678ef521f4fb34459e407a66ab8bf8be733e1. The conversion from using drm_intel_bo_alloc_tiled to a plain drm_intel_bo_alloc forgot that the tiled variant adjusts the allocation height even for TILING_NONE. Reported-by: Dave Airlie <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35786 Signed-off-by: Chris Wilson <[email protected]>
* gallium: Use explicit values in caps enums.Michel Dänzer2011-03-301-63/+63
| | | | Simplifies mapping between numbers and identifiers for these.
* Use row stride instead of width when getting colour index texels.Michel Dänzer2011-03-301-2/+3
| | | | Untested, noticed while working on the depth/stencil fix.
* Use proper source row stride when getting depth/stencil texels.Michel Dänzer2011-03-301-1/+2
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* intel: Add IS_GT2 macro for recognizing Sandybridge GT2 systems.Kenneth Graunke2011-03-291-8/+7
| | | | Also, refactor IS_GEN6 to use the IS_GT1 and IS_GT2 macros.