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* mesa: do depth/stencil format conversion in glGetTexImageBrian Paul2014-02-281-2/+9
| | | | | | | | | | | | | | | | glGetTexImage(GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8) was just using memcpy() instead of _mesa_unpack_uint_24_8_depth_stencil_row() to convert texels from the hardware format to the GL format. Fixes issue reported by David Meng at Intel. The new piglit ext_packed_depth_stencil-getteximage test checks for this bug. Also, add some format/type assertions. We don't yet handle the GL_FLOAT_32_UNSIGNED_INT_24_8_REV type. That should be fixed in a follow-on patch. Reviewed-by: Eric Anholt <[email protected]> Cc: "10.0" "10.1" <[email protected]>
* mesa: fix depth/stencil comments in formats.hBrian Paul2014-02-281-2/+2
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* winsys/svga: Avoid calling drm getparam for max surface size on older kernelsThomas Hellstrom2014-02-281-7/+8
| | | | | | | | | | | | | This avoids the kernel driver spewing out errors about the param not being supported. Also correct the max surface size used when the kernel does not support the query. Reported-by: Brian Paul <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Charmaine Lee <[email protected]> Cc: "10.1" <[email protected]>
* meta: Drop ctx->API checks.Kenneth Graunke2014-02-272-92/+50
| | | | | | | | | | | | | API is always API_OPENGL_COMPAT (since commit 4e4a537ad55f61a25, "meta: Push into desktop GL mode when doing meta operations."), so most of these checks do nothing. We could instead check save->API to only bother setting/restoring relevant GL state, but I'm not sure saving a few _mesa_set_enable calls is worth the complexity. My understanding is the point of the ctx->API guards was to avoid raising GL errors. Signed-off-by: Kenneth Graunke <[email protected]>
* meta: Restore API at the end of _mesa_meta_end(), not the start.Kenneth Graunke2014-02-271-2/+2
| | | | | | | | | | | In _mesa_meta_begin(), we switch to API_OPENGL_COMPAT, then munge a lot of state (including some that doesn't exist in the actual API - like PolygonStipple in API_OPENGL_CORE). It seems reasonable that in _mesa_meta_end(), we should restore it, then switch back to the original API. This at least makes it symmetric. Signed-off-by: Kenneth Graunke <[email protected]>
* util/u_format: don't crash in util_format_translate if we can't do translationRoland Scheidegger2014-02-272-6/+17
| | | | | | | | | | | | Some formats can't be handled - in particular cannot handle ints/uints formats, which lack the pack_rgba_float/unpack_rgba_float functions. Instead of trying to call these (and crash) return an error (I'm not sure yet if we should try to translate such formats too here might not make much sense). v2: suggested by Jose, use separate checks for pack/unpack of rgba_8unorm and rgba_float functions (right now if one exists the other should as well). Reviewed-by: Jose Fonseca <[email protected]>
* i965: Convert VUE map generation checks to if rather than switch.Kenneth Graunke2014-02-271-11/+2
| | | | | | | | | | | | There are currently only two VUE map layouts: one for Gen4-5, and one for everything else. We keep having to add new "case N+1" labels for every new hardware generation, and so far it's always been the same. This patch makes it so we only have to do work in the case where something actually changes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Only emit VS state pipe control workaround on IVB and BYT.Kenneth Graunke2014-02-273-3/+5
| | | | | | | | | | | | | | According to the BSpec's 3D workarounds page, this is unnecessary on shipping Haswell hardware, and was never necessary on Broadwell. It unfortunately doesn't say anything about Baytrail. The workaround database confirms those results for Ivybridge, Haswell, and Broadwell. Baytrail is less clear - one page says it's necessary, while the other says it isn't. For now, be conservative and leave it enabled. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nouveau: add a nouveau_compiler binary to compile TGSI into shader ISAIlia Mirkin2014-02-263-0/+235
| | | | | | | This makes it easy to compare output between different cards, especially for ones that you don't have (and/or not in the current machine). Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove nv30_context use from nvfx_*progIlia Mirkin2014-02-2613-107/+110
| | | | | | | This should pave the way to being able to use the compiler without a context. Also leads to cleaner code. Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove unused sprite flipping parameterIlia Mirkin2014-02-263-5/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove unused render_mode and hw_pointsprite_controlIlia Mirkin2014-02-262-8/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove use_nv4x, it is identical to is_nv4xIlia Mirkin2014-02-264-16/+14
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* docs: update nvc0 stateIlia Mirkin2014-02-261-1/+1
| | | | ARB_texture_buffer_object_rgb32 has been supported for a while already.
* radeonsi: Prevent geometry shader from emitting too many verticesMichel Daenzer2014-02-271-0/+16
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* i965: Fix the region's pitch condition to use blitterAnuj Phogat2014-02-261-3/+3
| | | | | | | | | intelEmitCopyBlit uses a signed 16-bit integer to represent buffer pitch, so it can only handle buffer pitches < 32k. Cc: [email protected] Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: add switch case for MESA_SHADER_COMPUTEBrian Paul2014-02-261-0/+3
| | | | | | To fix warning about unhandled enum value. Reviewed-by: Anuj Phogat <[email protected]>
* meta: Use a #define for the vector type to avoid %svec4 everywhere.Kenneth Graunke2014-02-261-10/+7
| | | | | | | | | | | | | | | | By adding "#define gvec4 %svec4" to the top of our fragment shader, we can write generic code without needing to specialize it to vec4, ivec4, or uvec4 via asprintf. This also makes the INT and UNSIGNED_INT merge function code identical, so I combined those two cases. It's not a big savings, but a little bit tidier. v2: Rebase on Vinson's MSVC build fixes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Don't try to dump shader source for fixed-function FS programs.Kenneth Graunke2014-02-261-1/+1
| | | | | | | | | | sh->Source is NULL and this will segfault. Fixes MESA_GLSL=dump with "The Swapper". Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't forget to subtract mt->first_level in minify calls.Kenneth Graunke2014-02-265-12/+13
| | | | | | | | | | | This fixes fbo-clear-formats GL_ARB_depth_texture on Ironlake, which regressed since commit f128bcc7c293013f4b44e4b661638333de0077c2 ("i965: Drop mt->levels[].width/height.") intel_miptree_copy_slice was calling minify(.., 7) on a 2x2 texture with mt->first_level == 7. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75292 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Delete LRP_TO_ARITH lowering pass flag.Kenneth Graunke2014-02-262-35/+2
| | | | | | | | | | | | | | Tt's kind of a trap---calling do_common_optimization() after lower_instructions() may cause opt_algebraic() to reintroduce ir_triop_lrp expressions that were lowered, effectively defeating the point. Because of this, nobody uses it. v2: Delete more code (caught by Ian Romanick). Cc: "10.1" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965: Stop lowering ir_triop_lrp.Kenneth Graunke2014-02-261-2/+0
| | | | | | | | | | Both the vector and scalar backends now support it natively, so there's no point in lowering it. Cc: "10.1" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965/vec4: Handle ir_triop_lrp on Gen4-5 as well.Kenneth Graunke2014-02-262-7/+38
| | | | | | | | | | | | | | | | | | | | | | | When the vec4 backend encountered an ir_triop_lrp, it always emitted an actual LRP instruction, which only exists on Gen6+. Gen4-5 used lower_instructions() to decompose ir_triop_lrp at the IR level. Since commit 8d37e9915a3b21 ("glsl: Optimize open-coded lrp into lrp."), we've had an bug where lower_instructions translates ir_triop_lrp into arithmetic, but opt_algebraic reassembles it back into a lrp. To avoid this ordering concern, just handle ir_triop_lrp in the backend. The FS backend already does this, so we may as well do likewise. v2: Add a comment reminding us that we could emit better assembly if we implemented the infrastructure necessary to support using MAC. (Assembly code provided by Eric Anholt). Cc: "10.1" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75253 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Acked-by: Eric Anholt <[email protected]>
* i965/vec4: Add a brw->gen >= 6 assertion in three-source emitters.Kenneth Graunke2014-02-261-0/+1
| | | | | | | | | | | Three source instructions didn't exist until Gen6. vec4_generator has assertions to catch this, but catching it in the visitor provides a nicer backtrace. Cc: "10.1" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Acked-by: Eric Anholt <[email protected]>
* ilo: create u_upload_mgr lastChia-I Wu2014-02-261-8/+11
| | | | | Similar to u_blitter, u_upload_mgr is now a client of the pipe context. Its creation needs to be delayed until the context has been (almost) initialized.
* glx: Fix the GLXFBConfig attrib sort prioritiesFredrik Höglund2014-02-261-7/+4
| | | | | | | | | The sort priorites for GLX_SAMPLES and GLX_SAMPLE_BUFFERS are not defined in GL_ARB_multisample, but they are defined in the GLX 1.4 specification. Cc: "9.2 10.0 10.1" <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glx: Fix the default values for GLXFBConfig attributesFredrik Höglund2014-02-261-7/+2
| | | | | | | | | | | | The default values for GLX_DRAWABLE_TYPE and GLX_RENDER_TYPE are GLX_WINDOW_BIT and GLX_RGBA_BIT respectively, as specified in the GLX 1.4 specification. This fixes the glx-choosefbconfig-defaults piglit test. Cc: "9.2 10.0 10.1" <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* Re-commit 'clover: Fix build with LLVM 3.5'Tom Stellard2014-02-251-1/+3
| | | | This was accidentally reverted in 9dfd7c5f75c806801b1b4b4d405899236c09ba75
* mesa: Add GL_ARB_buffer_storage to dispatch_sanity.cpp.Vinson Lee2014-02-251-0/+3
| | | | | | | | | Fixes 'make check' failure introduced with commit 119ffa7307d62e7310ce3902fded662ee4021c92. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75503 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* Revert "Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/mesa"Timothy Arceri2014-02-261-3/+1
| | | | | This reverts commit 1b79582f322d4a89dd6d197c8d4962c788ae7f25, reversing changes made to 376a98d345dfc3da8d5b0f1e489196f861c4e754.
* Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/mesaTimothy Arceri2014-02-261-1/+3
|\ | | | | | | ry,
| * clover: Fix build with LLVM 3.5Tom Stellard2014-02-251-1/+3
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* | glsl: removed unused dimension_count varibleTimothy Arceri2014-02-261-6/+2
|/ | | | | | | | This variable is no longer needed after the cleanup to the code prior to the first arrays of array series Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* build: llvm libs may not be in system search path, add rpathIlia Mirkin2014-02-251-0/+1
| | | | | | | | | | | On my gentoo system, llvm libs are in /usr/lib64/llvm, and llvm-config --ldflags does not provide the rpath (it does, of course, provide a -L). This adds the llvm dir to the rpath. It should be harmless if the path is a system path, and should make things work when it's not. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Tested-by: Emil Velikov <[email protected]>
* i965: Fix segfaults since the buffer_storage changes.Eric Anholt2014-02-251-1/+1
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* docs: update nv50 supportIlia Mirkin2014-02-251-2/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: enable txg where supportedIlia Mirkin2014-02-253-2/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: enable cube map array texture supportIlia Mirkin2014-02-253-9/+7
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* libgl-xlib: add -Isrc/gallium/winsys flagBrian Paul2014-02-251-0/+1
| | | | | | So that sw/xlib/xlib_sw_winsys.h can be found. Fixes a build break. Reviewed-by: Emil Velikov <[email protected]>
* st/mesa: add comment to explain _min(), _maxf(), etc. functionsBrian Paul2014-02-251-0/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: consolidate create_surface and surface_destroyMarek Olšák2014-02-256-85/+63
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: inline util_blitter_copy_textureMarek Olšák2014-02-251-3/+21
| | | | | | | | This will be used for changing texture properties without modifying pipe_resource like r600g, but not in this series. For now, this change allows consolidation of pipe_surface functions. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove useless psbox variable from resource_copy_regionMarek Olšák2014-02-251-3/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: compute depth surface registers only onceMarek Olšák2014-02-251-44/+54
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: compute color surface registers only onceMarek Olšák2014-02-251-44/+55
| | | | | | Same as r600g. Reviewed-by: Michel Dänzer <[email protected]>
* r600g: remove r600_resource.hMarek Olšák2014-02-255-48/+15
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g: remove r600_surface::htile_enabledMarek Olšák2014-02-253-10/+4
| | | | | | v2: use one of the htile registers instead Reviewed-by: Michel Dänzer <[email protected]>
* r600g: use r600_surface::db_z_infoMarek Olšák2014-02-251-10/+10
| | | | | | | | | | db_z_info was unused. This just renames the variable to match the register name. Now, db_depth_info is unused on Evergreen. Both variables will be needed on SI though. Reviewed-by: Michel Dänzer <[email protected]>
* r600g,radeonsi: share r600_surfaceMarek Olšák2014-02-255-54/+50
| | | | | | I'm gonna use this in radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to framebuffer stateMarek Olšák2014-02-251-8/+21
| | | | | | It doesn't depend on anything else. Reviewed-by: Michel Dänzer <[email protected]>
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