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* nvc0: program smooth line width when multisampling is enabledIlia Mirkin2015-08-171-1/+1
* nvc0: bind a fake tess control program when there isn't one availableIlia Mirkin2015-08-174-8/+44
* gm107/ir: avoid letting the lowering pass get out of syncIlia Mirkin2015-08-172-88/+5
* nv50,nvc0: take level into account when doing eng2d multi-layer blitsIlia Mirkin2015-08-172-8/+20
* st/mesa: also move yoffset to zoffset for 1d array texturesIlia Mirkin2015-08-171-0/+2
* nir: Add a glsl_uint_type() wrapper.Kenneth Graunke2015-08-162-0/+7
* freedreno/a3xx: add per-texture seamless cubemap controlIlia Mirkin2015-08-162-1/+2
* freedreno/a4xx: add cube map array supportIlia Mirkin2015-08-154-4/+14
* freedreno/a4xx: fix srgb render targetsRob Clark2015-08-153-8/+22
* freedreno: update generated headersRob Clark2015-08-155-14/+30
* scons: Always define __STDC_LIMIT_MACROS.Vinson Lee2015-08-151-0/+1
* freedreno: expose OES exts for float linear filteringIlia Mirkin2015-08-141-2/+4
* nvc0: disable tessellation on maxwellIlia Mirkin2015-08-141-2/+5
* nir: Add support for CSE on textures.Eric Anholt2015-08-141-4/+39
* nir: Zero out texture instructions when creating them.Eric Anholt2015-08-141-1/+1
* vc4: Move all of our fixed function fragment color handling to NIR.Eric Anholt2015-08-146-388/+538
* vc4: Add a helper for making driver-specific NIR load_uniform for GL stateEric Anholt2015-08-142-2/+30
* nir: Don't try to scalarize unpack ops.Eric Anholt2015-08-141-0/+15
* nir: Add a nir_opt_undef() to handle csels with undef.Eric Anholt2015-08-144-0/+108
* gm107/ir: indirect handle goes first on maxwell alsoIlia Mirkin2015-08-141-8/+4
* nv30: add depth bounds test support for hw that has itIlia Mirkin2015-08-143-2/+14
* nv50: add depth bounds test supportIlia Mirkin2015-08-143-2/+12
* nvc0: add depth bounds test supportIlia Mirkin2015-08-143-2/+9
* docs/relnotes: document amdgpu, GL 4.1 and other new featuresMarek Olšák2015-08-141-0/+6
* radeonsi: add all new VI PCI IDs including FijiMarek Olšák2015-08-141-0/+24
* radeonsi: revert a wrong DB bug workaround for VIMarek Olšák2015-08-141-4/+0
* radeon/uvd: implement HEVC supportBoyuan Zhang2015-08-143-17/+298
* radeon/vce: disable VCE dual instance for harvest partLeo Liu2015-08-143-1/+5
* radeon/vce: implement VCE dual instance supportLeo Liu2015-08-143-5/+30
* radeon/video: config encode stacked frame number based on HWLeo Liu2015-08-141-0/+2
* radeon/vce: make reloc offset signedChristian König2015-08-144-6/+6
* radeon/vce: add config task and put task info into encoder v2Leo Liu2015-08-144-33/+47
* radeon/vce: fix VCE fail after rebaseLeo Liu2015-08-141-8/+6
* radeon/vce: add dual pipe support for VILeo Liu2015-08-144-22/+21
* radeon/vce: add new firmware support for VI and CILeo Liu2015-08-141-1/+7
* radeon/vce: implement VCE two pipe supportLeo Liu2015-08-143-0/+26
* radeon/uvd: make 30M as minimum for MPEG4 dpb buffer sizeLeo Liu2015-08-141-0/+2
* radeon/uvd: recalculate dbp buffer sizeLeo Liu2015-08-141-22/+59
* radeon/video: add 4K support for decode/encode parametersLeo Liu2015-08-141-4/+4
* gallium/radeon: add h264 performance HW decoder supportLeo Liu2015-08-142-22/+43
* gallium/radeon: use VM for VCEChristian König2015-08-144-20/+44
* gallium/radeon: use VM for UVDChristian König2015-08-141-2/+14
* radeonsi: add support for FIJI (v4)Alex Deucher2015-08-144-0/+12
* winsys/amdgpu: add addrlib support for Fiji (v2)Alex Deucher2015-08-143-1/+11
* radeonsi: add harvest support for CI/VI parts (v3)Alex Deucher2015-08-141-92/+116
* gallium/radeon: enable the GPU load query for amdgpuMarek Olšák2015-08-141-2/+4
* radeonsi: properly handler raster_config setup on CZAlex Deucher2015-08-141-1/+1
* radeonsi: properly set the raster_config for KVAlex Deucher2015-08-141-5/+9
* radeonsi: add amdgpu support for querying the GPU reset stateMarek Olšák2015-08-141-1/+14
* radeonsi: add VI hardware supportMarek Olšák2015-08-148-25/+121
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