summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* r300g: remove unused RADEON_PB_USAGE_CACHEMarek Olšák2011-04-032-6/+0
|
* r300g: tell the GLSL compiler to lower the continue opcodeMarek Olšák2011-04-031-2/+2
| | | | NOTE: This is a candidate for the stable branches.
* r300g: avoid mapping the same buffer twiceMarek Olšák2011-04-031-0/+5
| | | | Shouldn't happen, but you never know.
* r300g: handle DISCARD_WHOLE_RESOURCE for buffersMarek Olšák2011-04-031-10/+25
|
* r300g: remove the redundant reference counter in radeon_boMarek Olšák2011-04-033-36/+21
| | | | We already have pb_buffer::reference::count.
* Revert "r300/compiler: Remove obsolete compiler passes"Tom Stellard2011-04-027-0/+415
| | | | | | | This reverts commit 9f013a8233197d4a0482661cb37cfeac1a61b804. These passes are still need for non-GLSL paths like g3dvl and ARB programs.
* i965/fs: Switch W and 1/W in Sandybridge interpolation setup.Kenneth Graunke2011-04-021-4/+4
| | | | | | | | | | | | Various documentation mentions that "W" is handed to the WM stage, but further digging seems to indicate that they really mean 1/W. The code here is still unclear, but changing this fixes piglit test "fragcoord_w" on Sandybridge as well as a Khronos ES2 conformance test. I also tested 3DMarkMobile ES2.0's taiji and hoverjet demos, as well as Nexuiz, just to be safe. NOTE: This is a candidate for the 7.10 branch.
* i965: Fix null register use in Sandybridge implied move resolution.Kenneth Graunke2011-04-031-9/+8
| | | | | | | | | | | Fixes regressions caused by commit 9a21bc6401, namely GPU hangs when running gnome-shell or compiz (Mesa bugs #35820 and #35853). I incorrectly refactored the case that dealt with ARF_NULL; even in that case, the source register needs to be changed to the MRF. NOTE: This is a candidate for the 7.10 branch (if 9a21bc6401 is cherry-picked, take this one too).
* i965: Fix the VS thread limits for GT1, and clarify the WM limits on both.Eric Anholt2011-04-013-4/+13
|
* tests: Use elts in translate_test.José Fonseca2011-04-011-8/+14
|
* scons: Add aliases for unit tests.José Fonseca2011-04-011-4/+4
|
* translate: Respect translate_buffer::max_index.José Fonseca2011-04-013-2/+28
|
* draw: Prevent out-of-bounds vertex buffer access.José Fonseca2011-04-0111-7/+157
| | | | Based on some code and ideas from Keith Whitwell.
* gallium: set PIPE_CAP_MIXED_COLORBUFFER_FORMATS in some driversMarek Olšák2011-04-018-0/+11
|
* gallium: add a CAP for mixed colorbuffer format supportMarek Olšák2011-04-012-1/+25
| | | | | Some GPUs can't do it (I think most of DX9 ones), so they should have the option not to allow it.
* r300/compiler: Remove obsolete compiler passesTom Stellard2011-03-317-415/+0
| | | | | | Branch emulation and loop unrolling are done in the GLSL frontend. Transforming loops is no longer needed for fragment shaders, but it is still necessary for vertex shaders.
* prog_optimize: Fix reallocating registers for shaders with loopsTom Stellard2011-03-311-3/+14
| | | | | | | | | | | Registers that are used inside of loops need to be considered live starting with the first instruction of the outermost loop. https://bugs.freedesktop.org/show_bug.cgi?id=34370 NOTE: This is a candidate for the 7.9 and 7.10 branches. Reviewed-by: Eric Anholt <[email protected]>
* nv50: fix for GPR allocation granularity being 16 bitChristoph Bumiller2011-03-311-3/+9
|
* nv50: copy regalloc fixes from nvc0Christoph Bumiller2011-03-312-80/+216
| | | | | | | Should fix gnome-shell's fade shader. Unification of the shader backend which is supposed to remove the code duplication is still WIP.
* draw: Revert code reorg in previous change.José Fonseca2011-03-311-4/+4
| | | | | | | | | | Because fetch_count = max_index - min_index + 1 overflows for min_index = 0 and max_index = 0xffffffff. Fixes fdo 35815.
* intel: Fix regression in clear_with_blit from 7bae1c3dChris Wilson2011-03-311-11/+12
| | | | | | | | | | Oops, the mask was being used in the loop to determine whether to use include the stencil || depth values. This began to fail when mask was cleared at the beginning of the loop. So reorder the tests and do the work up-front along with determining the depth_stencil value to use. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35822 Signed-off-by: Chris Wilson <[email protected]>
* draw: implement vertex color clamping, and disable SSE and PPC pathsLuca Barbieri2011-03-314-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (some little changes by Marek Olšák) Squashed commit of the following: commit 737c0c6b7d591ac0fc969a7590e1691eeef0ce5e Author: Luca Barbieri <[email protected]> Date: Fri Aug 27 02:13:57 2010 +0200 draw: disable SSE and PPC paths (use LLVM instead) These paths don't support vertex clamping, and are anyway obsoleted by LLVM. If you want to re-enable them, add vertex clamping and test that it works with the ARB_color_buffer_float piglit tests. commit fed3486a7ca0683b403913604a26ee49a3ef48c7 Author: Luca Barbieri <[email protected]> Date: Thu Aug 26 18:27:38 2010 +0200 draw_llvm: respect vertex color clamp commit ef0efe9f3d1d0f9b40ebab78940491d2154277a9 Author: Luca Barbieri <[email protected]> Date: Thu Aug 26 18:26:43 2010 +0200 draw: respect vertex clamping in interpreter path
* gallium: list use inline function to avoid macro shot comingJerome Glisse2011-03-301-43/+67
| | | | | | | | | | | | | | | | | | | Macro can lead to hard to debug list bugs. For instance consider the following : LIST_ADD(item, list->prev) 3 instruction of the macro became : (list->prev)->next->prev = item which is equivalent to : list->prev = item Thus list prev field changes and next instruction in the macro (list->prev)->next = item became : item->next = item And you endup with list corruption, other case lead to similar list corruption. Inline function are not affected by this short coming Signed-off-by: Jerome Glisse <[email protected]>
* draw: Forgot to remove one istart usage.José Fonseca2011-03-301-1/+1
|
* draw: Fix bug when drawing ushort indices.José Fonseca2011-03-301-6/+8
| | | | | | | | | | When the condition min_index == 0 && sizeof(ib[0]) == sizeof(draw_elts[0]) was true, we were wrongly ignoring istart and processing indices 0. Reorder some statements to make the code easier to understand.
* intel: Remove the unrelaxed relocation assertionChris Wilson2011-03-301-4/+0
| | | | | | | Now that we purposefully generate delta that point outside of the target buffer, the assertion has outlived its usefulness. Signed-off-by: Chris Wilson <[email protected]>
* egl_dri2 x11: Fix a typoFeng, Haitao2011-03-301-1/+1
| | | | Signed-off-by: Haitao Feng <[email protected]>
* intel: Add some defense against buffer allocation failure for subimage blitsChris Wilson2011-03-301-1/+9
| | | | | | | Once more! This time without the unwarranted conversion from drm_intel_bo_alloc_tiled. Signed-off-by: [a very embarrassed] Chris Wilson <[email protected]>
* Revert "intel: Add some defense against buffer allocation failure for ↵Chris Wilson2011-03-301-11/+11
| | | | | | | | | | | | | | subimage blits" This reverts commit de7678ef521f4fb34459e407a66ab8bf8be733e1. The conversion from using drm_intel_bo_alloc_tiled to a plain drm_intel_bo_alloc forgot that the tiled variant adjusts the allocation height even for TILING_NONE. Reported-by: Dave Airlie <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35786 Signed-off-by: Chris Wilson <[email protected]>
* gallium: Use explicit values in caps enums.Michel Dänzer2011-03-301-63/+63
| | | | Simplifies mapping between numbers and identifiers for these.
* Use row stride instead of width when getting colour index texels.Michel Dänzer2011-03-301-2/+3
| | | | Untested, noticed while working on the depth/stencil fix.
* Use proper source row stride when getting depth/stencil texels.Michel Dänzer2011-03-301-1/+2
|
* intel: Add IS_GT2 macro for recognizing Sandybridge GT2 systems.Kenneth Graunke2011-03-291-8/+7
| | | | Also, refactor IS_GEN6 to use the IS_GT1 and IS_GT2 macros.
* nv50,nvc0: implement colour clamping controlsChristoph Bumiller2011-03-2912-11/+59
|
* r600g: implement texture barrierFredrik Höglund2011-03-295-0/+29
|
* r600g: implement the pipe_screen fence functionsFredrik Höglund2011-03-294-0/+197
| | | | | | v2: Allocate the fences from a single shared buffer object. v3: Allocate the r600_fence structs in blocks of 16. Spin a few times before calling sched_yield in r600_fence_finish().
* mesa: Fix ugly indentation left from previous commitIan Romanick2011-03-292-39/+36
| | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* glsl: Calcluate Mesa state slots in front-end instead of back-endIan Romanick2011-03-296-73/+117
| | | | | | | | | | | | This should be the last bit of infrastructure changes before generating GLSL IR for assembly shaders. This commit leaves some odd code formatting in ir_to_mesa and brw_fs. This was done to minimize whitespace changes / reindentation in some loops. The following commit will restore formatting sanity. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* glsl: Move _mesa_builtin_uniform_desc from uniforms.c to ir_variable.cppIan Romanick2011-03-292-248/+253
| | | | | | | | This array is going to be used in the main compiler soon. Leaving them uniforms.c caused problems for building the stand-alone compiler. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* r300g: add support for all render targets with one and two channelsMarek Olšák2011-03-291-30/+130
| | | | | | | | | | | | | | | The hardware should be set according to this table: FORMAT -> R300 COLORFORMAT ------------------------- X16 -> UV88 X16Y16 -> ARGB8888 X32 -> ARGB8888 X32Y32 -> ARGB16161616 US_OUT_FMT must contain the real format. I wasn't able to make B3G3R2 and L4A4 work, but those aren't important.
* intel: fix buildMarek Olšák2011-03-292-2/+2
| | | | | broken with e5c6a92a12b5cd7db205d72039f58d302b0be9d5 (mesa: implement clamping controls (ARB_color_buffer_float))
* intel: Protect intel_clear_with_blit from failed buffer allocationsChris Wilson2011-03-291-10/+11
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34419 Signed-off-by: Chris Wilson <[email protected]>
* i965: Avoid name clash of loop counter and memberChris Wilson2011-03-291-5/+5
| | | | | | src/mesa/drivers/dri/i965/brw_fs.cpp:565 warning: name lookup of ‘c’ changed Signed-off-by: Chris Wilson <[email protected]>
* i915: Detect allocation failure of batch bufferChris Wilson2011-03-291-0/+4
| | | | Signed-off-by: Chris Wilson <[email protected]>
* docs: update GL3 statusMarek Olšák2011-03-291-2/+2
|
* r300g: finish up signed normalized textures and render targetsMarek Olšák2011-03-292-28/+46
|
* r300g: enable clamping controlsMarek Olšák2011-03-294-6/+14
|
* gallium: remove PIPE_CAP_VERTEX_COLOR_CLAMP_CONTROLMarek Olšák2011-03-292-5/+26
| | | | | | | | | | | | | | The vertex color clamp control is a property of an API, a lot like gl_rasterization_rules. The state should be set according to the API being implemented, for example: OpenGL Compatibility: enabled by default OpenGL Core: disabled by default D3D11: always disabled This patch also changes the way ARB_color_buffer_float is advertised. If no SNORM or FLOAT render target is supported, fragment color clamping is not required.
* mesa: clamp texture border color if ARB_texture_float is unsupportedMarek Olšák2011-03-291-4/+12
| | | | | ARB_texture_float disables clamping of the texture border color, ARB_color_buffer_float only modifies clamping of the glGet query.
* st/mesa: choose an appropriate texture format for DrawPixelsMarek Olšák2011-03-291-3/+49
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 08:12:11 +0000