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* i965/nir: Add OPT() and OPT_V() macros for invoking NIR passes.Kenneth Graunke2015-11-181-72/+59
* nir: add array length fieldRob Clark2015-11-182-0/+10
* nir: remove nir_variable::max_ifc_array_accessRob Clark2015-11-182-22/+0
* freedreno/a4xx: add fake RGTC support (required for GL3)Rob Clark2015-11-184-2/+23
* freedreno/a4xx: add compressed texture formatsRob Clark2015-11-182-2/+26
* freedreno: update generated headersRob Clark2015-11-185-11/+37
* freedreno: expose GLSL 140 and fake MSAA for GL3.0/3.1 supportIlia Mirkin2015-11-181-2/+2
* freedreno/a3xx: fix texture buffers, enable offsetsIlia Mirkin2015-11-183-14/+32
* freedreno: add support for conditional rendering, required for GL3.0Ilia Mirkin2015-11-187-6/+57
* freedreno/a3xx: add fake RGTC support (required for GL3)Ilia Mirkin2015-11-186-27/+176
* freedreno/a3xx: add missing formats to enable ARB_vertex_type_2_10_10_10_revIlia Mirkin2015-11-183-4/+9
* freedreno/a3xx+a4xx: fix for stk binning pass hangRob Clark2015-11-183-19/+76
* freedreno/a3xx+a4xx: fix GL_POINTS lockup w/ GLESRob Clark2015-11-183-6/+11
* nir: fix typo in idiv lowering, causing large-udiv-udiv failuresIlia Mirkin2015-11-181-1/+1
* llvmpipe: disable VSX in ppc due to LLVM PPC bugOded Gabbay2015-11-181-0/+9
* nvc0/ir: actually emit AFETCH on keplerIlia Mirkin2015-11-181-0/+3
* nir: Store the size of the TCS output patch in nir_shader_info.Kenneth Graunke2015-11-182-0/+9
* i965: Add enums for 3DSTATE_TE field values.Kenneth Graunke2015-11-181-0/+28
* meta/generate_mipmap: Don't leak the framebuffer objectIan Romanick2015-11-181-0/+5
* svga: use more VGPU10 formatsBrian Paul2015-11-181-30/+67
* svga: add/use new svga_sampler_format() functionBrian Paul2015-11-183-0/+30
* radeon: count cs dwords separately for query begin and endNicolai Hähnle2015-11-182-15/+21
* radeon: expose r600_query_hw functions for reuseNicolai Hähnle2015-11-182-14/+27
* radeon: implement r600_query_hw_get_result via function pointersNicolai Hähnle2015-11-182-99/+94
* radeon: split hw query buffer handling from cs emitNicolai Hähnle2015-11-182-81/+133
* radeon: convert hardware queries to the new styleNicolai Hähnle2015-11-182-148/+172
* radeon: convert software queries to the new styleNicolai Hähnle2015-11-181-172/+194
* radeon: add query handler function pointersNicolai Hähnle2015-11-182-7/+62
* radeon: move R600_QUERY_* constants into a new query header fileNicolai Hähnle2015-11-184-15/+51
* radeon: cleanup driver query listNicolai Hähnle2015-11-181-29/+55
* radeon: move get_driver_query_info to r600_query.cNicolai Hähnle2015-11-183-45/+51
* i965: Prevent fast clears for MSRTs on SKLNeil Roberts2015-11-181-0/+7
* vc4: Don't bother lowering uniforms when the same value is used twice.Eric Anholt2015-11-171-13/+33
* vc4: Fix uniform reordering to support reading the same uniform twice.Eric Anholt2015-11-171-8/+18
* vc4: Fix documentation on vc4_qir_lower_uniforms.c.Eric Anholt2015-11-171-7/+3
* vc4: Add support for nir_op_uge, using the carry bit on QPU_A_SUB.Eric Anholt2015-11-175-0/+26
* i965: Fix PIPE_CONTOL typo.Kenneth Graunke2015-11-171-1/+1
* i965: Add assertion for src_stencil payload sizeBen Widawsky2015-11-171-0/+6
* i965: Implement ARB_pipeline_statistics_query tessellation counters.Kenneth Graunke2015-11-171-8/+8
* glsl: rename location layout helperTimothy Arceri2015-11-181-5/+5
* glsl: don't validate binding when its not neededTimothy Arceri2015-11-181-2/+5
* glsl: remove temp variable to make code easier to readTimothy Arceri2015-11-181-10/+7
* glsl: cleanup and fix validate matrix function for arraysTimothy Arceri2015-11-181-10/+1
* glsl: use better location in struct and block error messagesTimothy Arceri2015-11-181-7/+3
* glsl: only do type and qualifier validation once per declarationTimothy Arceri2015-11-181-99/+97
* glsl: rename function that processes struct and iface membersTimothy Arceri2015-11-181-30/+30
* glsl: move block validation outside function that validates membersTimothy Arceri2015-11-181-8/+8
* glsl: move ast layout qualifier handling code into its own functionTimothy Arceri2015-11-181-202/+212
* i965: Add INTEL_DEBUG=shader_time support for tessellation shaders.Kenneth Graunke2015-11-172-0/+14
* i965: Add INTEL_DEBUG=tcs,tes and hs,ds flags for tessellation shaders.Kenneth Graunke2015-11-172-2/+8
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