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* glx: Use _Xglobal_lock for protecting extension display listKristian Høgsberg2010-07-223-126/+86
| | | | Avoids double locking glXLock in the X wire to event handlers.
* glsl: remove invalid _mesa_problem() callBrian Paul2010-07-221-0/+2
| | | | Fixes fd.o bug 29206.
* draw: re-order optimization passes depending on LLVM version, 32/64-bitBrian Paul2010-07-221-2/+15
| | | | | This is a work-around for an apparent bug in LLVM seen with piglit's glsl-vs-sqrt-zero test.
* draw: added new assertions to clipping codeBrian Paul2010-07-221-1/+10
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* i965: Respect VS/VP point size result when enabled.Eric Anholt2010-07-221-3/+4
| | | | Fixes glsl-vs-point-size.
* i965: Fix the disasm output for da16 src widths.Eric Anholt2010-07-221-1/+1
| | | | | | This has confused me twice now. It's a fixed width of 4 (usually a region description of <4,4,1>), not 1. If it was 1, we'd have been skipping all over register space.
* i965: Avoid extra MOV in VS indirect register reads.Eric Anholt2010-07-221-15/+16
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* i965: Fix up VS temporary array access for fixed index offset != 0.Eric Anholt2010-07-221-1/+1
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* r600: Flip point sprite coordinates when rendering to an FBO.Henri Verbeet2010-07-221-1/+3
| | | | This supersedes http://lists.freedesktop.org/archives/mesa-dev/2010-July/001442.html.
* i965: In the VS, multiply the address reg by the appropriate register size.Eric Anholt2010-07-211-27/+14
| | | | | | | | | | | | The ARL value is increments of vec4 in the register file. But PROGRAM_TEMPORARY or PROGRAM_INPUT are stored as vec4s interleaved between the two verts being executed (thus a vec8 each), compared to PROGRAM_STATE_VAR being packed vec4s. Fixes: glsl-vs-arrays-2 glsl-vs-mov-after-deref (without regressing glsl-vs-arrays-3)
* i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.Eric Anholt2010-07-213-52/+31
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* i965: Support relative addressed VS constant reads using the appropriate msg.Eric Anholt2010-07-213-31/+66
| | | | | The previous support was overly complicated by trying to use the same 1-OWORD message for both offsets.
* i965: Fix the DP read msg_control definitions other than plain OWORD.Eric Anholt2010-07-211-6/+16
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* i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.Eric Anholt2010-07-211-3/+1
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* i956: Set the execution size correctly for scratch space writes.Eric Anholt2010-07-211-2/+2
| | | | | | | | Otherwise, the second half isn't written, and we end up reading back black. Fixes the remaining junk drawn in glsl-max-varyings, and will likely help with a number of large real-world shaders.
* i965: Set the GEM domain flags for the scratch space.Eric Anholt2010-07-211-1/+1
| | | | | | They go into the render cache, so while we don't care about their contents after execution, failing to note them could cause the writes to be flushed over important buffer contents later.
* i965: Use the pretty define for 4-oword DP reads.Eric Anholt2010-07-211-1/+1
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* i965: Set the send commit bit on register spills as required pre-gen6.Eric Anholt2010-07-211-9/+32
| | | | Otherwise, the subsequent read may not get the written value.
* i965: Add disasm for dataport reads (register unspilling).Eric Anholt2010-07-211-1/+22
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* glx: Move last few dri_interface.h types out of glxclient.h and drop includeKristian Høgsberg2010-07-214-12/+19
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* glx: Move __driContext field out of __GLXcontextRecKristian Høgsberg2010-07-212-4/+3
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* softpipe: add missing support for PIPE_FORMAT_S8_USCALED surfacesBrian Paul2010-07-211-20/+20
| | | | | | And remove checks of surface depth bits. The state tracker should not turn on depth/stencil testing if the framebuffer doesn't have depth/stencil.
* softpipe: fix sp_tile_cache_flush_clear() regressionBrian Paul2010-07-211-5/+11
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* Revert "dri2: Remove an unused variable."Jerome Glisse2010-07-211-0/+1
| | | | | glx_info is used if X_DRI2SwapBuffers is defined This reverts commit c0ca2bfb2ad8cf7fb9d756b5ae52cb77236ff605.
* r600g: add support for all R6XX/R7XX asicJerome Glisse2010-07-214-87/+316
| | | | | | | This configure some of the value properly based on asic so others asic than RV710 works too. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add r600 compile mode to compiler.Dave Airlie2010-07-214-13/+106
| | | | | | some of the ALU instructions are different on r6xx vs r7xx, separate the alu translation to separate files, and use family to pick which compile stage to use.
* r600g: add family retrivalDave Airlie2010-07-213-1/+14
| | | | allow pipe driver to get the family of the gpu.
* llvmpipe: say no to depth clampMarek Olšák2010-07-211-0/+2
| | | | The other drivers just return 0 without the assert.
* r300g: implement depth clampMarek Olšák2010-07-212-1/+3
| | | | | | | Depth clamping seems to be implicit if clipping is disabled. It's not perfect, but it's good enough for wine and passes the corresponding piglit tests.
* r300g: cleanup clip state emissionMarek Olšák2010-07-211-6/+10
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* draw: disable depth clipping if depth clamp is enabledMarek Olšák2010-07-213-4/+11
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* st/mesa: implement depth clampMarek Olšák2010-07-212-0/+6
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* cso: handle depth clampMarek Olšák2010-07-211-0/+4
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* gallium: add depth clamp to the interfaceMarek Olšák2010-07-212-1/+3
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* Add missing initialization of inOutFlags pointer.Carl Worth2010-07-211-1/+1
| | | | | | This quiets a compiler warning, (and ensures a segmentation fault rather than memory corruption if this variable is written through before being initialized elsewhere).
* Makefiles: Don't complain if depend file to be included doesn't exist.Carl Worth2010-07-212-2/+2
| | | | | | | | While bootstrapping the dependencies, make will see the "include depend" directive before the depend file has been created. To avoid a spurious warning in this case we use "-include" instead, (which differs precisely in the fact that it will not emit a diagnostic if the named file does not exist).
* i965: Remove an unused variable.Carl Worth2010-07-211-1/+0
| | | | To quiet a compiler warning.
* dri2: Remove an unused variable.Carl Worth2010-07-211-1/+0
| | | | To quiet a compiler warning.
* Regenerate program/lex.yy.cCarl Worth2010-07-211-179/+206
| | | | Based on the two recent changes to program_lexer.l.
* Avoid more warnings in flex-generated code.Carl Worth2010-07-211-0/+7
| | | | | | | | | | This avoids two "function defined but not used" warnings. For the yyinput function we define YY_NO_INPUT which tells flex to simply not generate this function. For unput, we add a call to this function, but inside a while(0) so that it will quiet the warning without actually changing any functionality.
* Avoid warnings in flex-generated code.Carl Worth2010-07-211-0/+6
| | | | | | Add declarations for two functions generated in the flex ouput. It would be nicer if flex simply declared these generated functions as static, but for now we can at least avoid the warning this way.
* draw: tweak aa line width threshold and samplingBrian Paul2010-07-211-4/+6
| | | | | | Set sampler max_lod to avoid sampling the 1x1 and 2x2 mipmap levels. Fixes piglit line-aa-width test, fd.o bug 29160.
* nouveau/nvfx: Add new PIPE_CAP valuesPatrice Mandin2010-07-211-0/+4
| | | | Signed-off-by: Patrice Mandin <[email protected]>
* gallivm: replace has_indirect_addressing field with indirect_files fieldBrian Paul2010-07-211-8/+17
| | | | | | | | | | Instead of one big boolean indicating indirect addressing, use a bitfield indicating which register files are accessed with indirect addressing. Most shaders that use indirect addressing only use it to access the constant buffer. So no need to use an array for temporary registers in this case.
* tgsi: added tgsi_shader_info::indirect_files fieldBrian Paul2010-07-212-0/+19
| | | | Indicates which register files are accessed with indirect addressing.
* gallivm: refactor code into get_indirect_offsets() functionBrian Paul2010-07-211-23/+34
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* gallivm: added commentBrian Paul2010-07-211-0/+6
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* gallivm: remove extraneous bracesBrian Paul2010-07-211-20/+18
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* gallivm: no longer do indirect addressing in get_temp_ptr()Brian Paul2010-07-211-20/+15
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* gallivm: implement correct indirect addressing of temp registersBrian Paul2010-07-211-11/+29
| | | | | As with indexing the const buffer, the ADDR reg may have totally different values for each element. Need to use a gather operation.
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