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* winsys/radeon: remove redundant member radeon_bo::sizeMarek Olšák2011-09-293-8/+5
| | | | It's part of pb_buffer already.
* winsys/radeon: simplify updating GEM domains for relocationsMarek Olšák2011-09-291-10/+2
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* winsys/radeon: simplify passing GEM domains through to GEM_CREATEMarek Olšák2011-09-292-25/+13
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* r300g: remove useless variables in some structuresMarek Olšák2011-09-294-29/+12
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* r300g: simplify the immd_is_good_idea functionMarek Olšák2011-09-291-26/+2
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* configure.ac: unduplicate gallium directoriesMarek Olšák2011-09-291-4/+4
| | | | It may happen when two drivers share one winsys.
* r600g: convert if (query->type) into switch statementsMarek Olšák2011-09-291-26/+54
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* gallium/docs: update d3d11ddi.txtMarek Olšák2011-09-291-22/+11
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* st/mesa: don't compute index buffer bounds for per-instance dataMarek Olšák2011-09-291-3/+5
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* glsl 1.30: Fix numerical instabilities in asinhPaul Berry2011-09-281-4/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The formula we were previously using for asinh: asinh x = ln(x + sqrt(x * x + 1)) is numerically unstable: when x is a large negative value, the quantity x + sqrt(x * x + 1) is a small positive value (on the order of 1/(2|x|)). Since the logarithm function is very sensitive in this range, any error in the computation of the square root manifests as a large error in the result. This patch changes to the equivalent formula: asinh x = sign(x) * ln(abs(x) + sqrt(x * x + 1)) which is only slightly more expensive to compute, and is numerically stable for all x. Fixes piglit tests spec/glsl-1.30/execution/built-in-functions/[fv]s-asinh-*. Reviewed-by: Chad Versace <[email protected]> Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: fix signed/unsigned sscanf() warning in _mesa_override_glsl_version()Brian Paul2011-09-281-1/+1
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* st/mesa: include version.h and fix _mesa_override_glsl_version() callBrian Paul2011-09-281-1/+2
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* glsl: Add support for constant expression evaluation on trunc().Eric Anholt2011-09-281-0/+2
| | | | | | | Fixes the glsl-1.30/compiler/built-in-functions/trunc-* tests under 1.30. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Add support for bit-shift operations.Eric Anholt2011-09-281-1/+7
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Add missing _mesa_sizeof_glsl_type() for UNSIGNED_INT.Eric Anholt2011-09-281-0/+1
| | | | | | | | Somehow we managed to get the unsigned int vectors, but not scalar. Fixes _mesa_problem complaints in piglit's uint tests. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add support for bit-shift operations.Eric Anholt2011-09-281-1/+7
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Fix assertion checking types of constant bitshift expressions.Eric Anholt2011-09-281-1/+3
| | | | | | | | Bitshifts are one of the rare places that GLSL allows mixed base types without an implicit conversion occurring. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ir_to_mesa: Don't assertion fail on remaining GLSL 1.30 ops.Eric Anholt2011-09-281-2/+10
| | | | | | | | | | For hardware drivers, we only have ir_to_mesa called for the purposes of potential swrast fallbacks (basically never on a 1.30 driver), which we don't really care about. This will allow 1.30 to be implemented without rewriting swrast for it. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: don't intepolate clip distances on pre-GEN6.Paul Berry2011-09-281-2/+8
| | | | | | | | | | | | | On pre-GEN6 chips, the VUE slots set aside for clip distance aren't actually used, so there is no reason for the clipper to waste time interpolating them. When commit 62bad54727690bff5ed42a74272e7822fd36cdb6 changed the enum value used to represent these VUE slots, that caused the clipper to start interpolating them as an accidental side effect. This patch reverts to the old clipper behavior. Reviewed-by: Kenneth Graunke <[email protected]>
* i965 new VS: Fix bugs in pre-GEN6 psiz/flags computationPaul Berry2011-09-281-5/+5
| | | | | | | | | | | | | | | | | | This patch corrects two errors in the computation of the psiz/flags VUE slot on pre-GEN5 when using the new VS backend: - The clip flags (which should be stored in the w component of the first VUE slot) were being accidentally duplicated in all other components of that VUE slot, causing partially clipped triangles to sometimes disappear completely. - The OR instruction wasn't being stored in "inst", causing the BRW_PREDICATE_NORMAL flag to be applied to the wrong instruction. This patch fixes regressions in clipping behavior when using shaders on GEN4-5. Reviewed-by: Kenneth Graunke <[email protected]>
* i965 new VS: Fix src_reg(uint32_t) constructor.Paul Berry2011-09-281-1/+1
| | | | | | | | | This constructor was storing its argument in the wrong field of the "imm" enum, resulting in it being converted to a float when it should have remained an unsigned integer. This was preventing clipping from working properly on pre-GEN6. Reviewed-by: Kenneth Graunke <[email protected]>
* i965 new VS: don't share clip plane constants in pre-GEN6Paul Berry2011-09-286-43/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | In pre-GEN6, when using clip planes, both the vertex shader and the clipper need access to the client-supplied clip planes, since the vertex shader needs them to set the clip flags, and the clipper needs them to determine where to insert new vertices. With the old VS backend, we used a clever optimization to avoid placing duplicate copies of these planes in the CURBE: we used the same block of memory for both the clipper and vertex shader constants, with the clip planes at the front of it, and then we instructed the clipper to read just the initial part of this block containing the clip planes. This optimization was tricky, of dubious value, and not completely working in the new VS backend, so I've removed it. Now, when using the new VS backend, separate parts of the CURBE are used for the clipper and the vertex shader. Note that this doesn't affect the number of push constants available to the vertex shader, it simply causes the CURBE to occupy a few more bytes of URB memory. The old VS backend is unaffected. GEN6+, which does clipping entirely in hardware, is also unaffected. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix a hardcoded user clip plane count.Paul Berry2011-09-281-1/+1
| | | | | | | | | Now that i965 supports 8 clip planes instead of 6, the size of the brw_vs_compile::userplane array needs to be increased to 8. Changed the array size to MAX_CLIP_PLANES so that if the number changes again in the future, this array size won't be missed. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: allow for nonconsecutive elements of gl_ClipDistance to be enabled.Paul Berry2011-09-283-4/+38
| | | | | | | | | | | | | | | | | | | | | | When using user-defined clipping planes, the i965 driver compacts the array of clipping planes so that disabled clipping planes do not appear in it--this saves precious push constant space and makes it easier to generate the pre-GEN6 clip program. As a result, when enabling clipping planes in GEN6+ hardware, we always enable clipping planes 0 through n-1 (where n is the number of clipping planes enabled), regardless of which clipping planes the user actually requested. However, we can't do this when using gl_ClipDistance, because it would be prohibitively complex to compact the gl_ClipDistance array inside the user-supplied vertex shader. So, when enabling clipping planes in GEN6+ hardware, if gl_ClipDistance is in use, we need to pass the user-supplied enable flags directly through to the hardware rather than just enabling the first n planes. Fixes Piglit test vs-clip-distance-enables. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use 4 bits to store nr_userclip in brw_clip.h.Paul Berry2011-09-281-2/+1
| | | | | | | | | | | | | | | Since the i965 driver supports 8 clipping planes now, we need 4 bits to store the number of user clipping planes, not 3. In theory this isn't strictly necessary, since brw_clip.h is only used on pre-GEN6, and pre-GEN6 only advertises support for 6 clipping planes, but it seems wise to err on the safe side. In the process I removed the pad0 element of struct brw_clip_prog_key--it doesn't seem necessary because the compiler automatically inserts padding if needed. Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Remove unused function get_glsl_version()Chad Versace2011-09-281-16/+0
| | | | | | | | It was replaced by _mesa_override_glsl_version(). Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* mesa: Allow overriding GLSL version with environment variableChad Versace2011-09-287-1/+35
| | | | | | | | | | | | | | Override the context's GLSL version if the environment variable MESA_GLSL_VERSION_OVERRIDE is set. Valid values for MESA_GLSL_VERSION_OVERRIDE are integers, such as "130". MESA_GLSL_VERSION_OVERRIDE has the same behavior as INTEL_GLSL_VERSION, except that it applies to all drivers, not just Intel's. Since the former supercedes the latter, this patch disables the latter. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* st/mesa: substitute argument to guess_base_level_size() callBrian Paul2011-09-281-1/+1
| | | | | stObj->base.BaseLevel and firstImage->base.Level have the same value but the later looks more consistent in the function call.
* mesa: fix signed/unsigned warning in sscanf()Brian Paul2011-09-281-1/+1
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* scons: insert 'git-' into MESA_GIT_SHA1 stringBrian Paul2011-09-281-1/+1
| | | | To match makefile build.
* scons: fix write_git_sha1_h_file() issue on WindowsBrian Paul2011-09-281-0/+2
| | | | | Unlike on Unix, os.rename(src, dst) will fail on Windows if the dst file already exists. Remove it first.
* d3d1x: propagate DepthBiasClamp to rasterizer csoChristoph Bumiller2011-09-281-2/+1
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* d3d1x: fix uninitialized const color union blackChristoph Bumiller2011-09-281-1/+1
| | | | Broken by 6dd284f7c8fac22f64c13fdf9909094f5ec59086.
* nv50,nvc0: support polygon offset clamp stateChristoph Bumiller2011-09-286-3/+9
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* r600: support polygon offset clamp stateChristoph Bumiller2011-09-282-2/+2
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* gallium: add polygon offset clamp stateChristoph Bumiller2011-09-285-0/+11
| | | | This is required for D3D1x and supported by hardware.
* scons: generate git_sha1.h file as with Makefile buildBrian Paul2011-09-281-6/+35
| | | | | | So that GL_VERSION includes the git head hash id when building with scons. Reviewed-by: José Fonseca <[email protected]>
* i965: Allow SIMD16 color writes on Ivybridge.Kenneth Graunke2011-09-281-1/+1
| | | | | | | Again, the check was needlessly specific: this works fine on Gen7. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Allow SIMD16 with control flow on Ivybridge.Kenneth Graunke2011-09-281-1/+1
| | | | | | | | The check was designed to forbid it on old generations (Gen5/Ironlake), not on new ones. It just works on Gen7/Ivybridge. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* intel: Fix compiler warnings from the depth stall flush commit.Eric Anholt2011-09-271-0/+1
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* radeon: Drop mapping we were doing around glGetTexImage().Eric Anholt2011-09-277-86/+0
| | | | It's handled by MapTextureImage() now.
* nouveau: Drop mapping we were doing around glGetTexImage().Eric Anholt2011-09-271-14/+0
| | | | It's handled by MapTextureImage() now.
* intel: Drop our custom glGetTexImage() code.Eric Anholt2011-09-272-63/+7
| | | | | | | | | The mesa core code uses MapTextureImage() like we need now. v2: Drop mapping around _mesa_generate_mipmap for compressed, since the whole path ends up going through MapTextureImage(), and the meta decompression code ended up causing us to lose track of the region that was originally mapped and assertion fail.
* mesa: Finally, convert RGBA glGetTexImage() to using MapTextureImage().Brian Paul2011-09-272-44/+38
| | | | | | | v2: Changes by Brian to MapTexImage in the decompression path. v3: Changes by anholt to fix srcRowStride for decompression of NPOT. Tested-by: Brian Paul <[email protected]> (v2)
* mesa: Convert depth glGetTexImage() to using MapTextureImage().Brian Paul2011-09-272-8/+14
| | | | Tested-by: Brian Paul <[email protected]>
* mesa: Convert depth/stencil glGetTexImage() to using MapTextureImage().Brian Paul2011-09-272-8/+21
| | | | | | | Note that the implementation before and after appears to be broken in its handling of Z24_S8 vs S8_Z24. Tested-by: Brian Paul <[email protected]>
* mesa: Switch ycbcr glGetTexImage() to using MapTextureImage().Brian Paul2011-09-271-5/+12
| | | | Tested-by: Brian Paul <[email protected]>
* mesa: Switch memcpy fast-path of glGetTexImage() to using MapTextureImage().Brian Paul2011-09-271-9/+15
| | | | Tested-by: Brian Paul <[email protected]>
* mesa: Update comments/assertions about buffer mapping for glGetTexImage().Brian Paul2011-09-271-4/+3
| | | | | | This code is about to stop needing ->Data and using MapTextureImage(). Tested-by: Brian Paul <[email protected]>
* mesa: Convert GetCompressedTexImage to using MapTextureImage().Brian Paul2011-09-276-129/+37
| | | | | | | This changes drivers to not map the texture on their own before calling _mesa_get_compressed_teximage(). Tested-by: Brian Paul <[email protected]>