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* scons: Fix SCons build infrastructure for FreeBSD.Vinson Lee2012-05-244-4/+4
| | | | | | | | This patch gets the FreeBSD SCons build working again. The build still fails though. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeon/llvm: Lower UDIV using the Selection DAGTom Stellard2012-05-248-212/+126
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* radeon/llvm: Remove auto-generated AMDIL->ISA conversion codeTom Stellard2012-05-2414-280/+28
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* radeon/llvm: Remove AMDIL instructions MULHI, SMULTom Stellard2012-05-243-10/+5
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* radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR)Tom Stellard2012-05-248-693/+6
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* radeon/llvm: Remove AMDIL FTOI and ITOF instructionsTom Stellard2012-05-247-316/+7
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* radeon/llvm: Remove AMDIL EXP* instructionsTom Stellard2012-05-245-15/+7
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* radeon/llvm: Remove AMDIL ADD instructionsTom Stellard2012-05-246-179/+4
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* radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT)Tom Stellard2012-05-248-422/+8
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* radeon/llvm: Remove AMDILMachinePeephole passTom Stellard2012-05-244-177/+0
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* radeon/llvm: Remove AMDIL CMP instructions and associated lowering codeTom Stellard2012-05-243-661/+22
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* radeon/llvm: Remove AMDIL ROUND_NEAREST instructionTom Stellard2012-05-244-6/+6
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* radeon/llvm: Remove AMDIL ROUND_POSINF instructionTom Stellard2012-05-244-6/+10
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* radeon/llvm: Add custom SDNode for FRACTTom Stellard2012-05-246-6/+10
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* radeon/llvm: Use -1 as true value for SET* integer instructionsTom Stellard2012-05-243-32/+28
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* radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodesTom Stellard2012-05-241-0/+6
| | | | | Support for these was inadvertently dropped in commit cee23ab246f22210b3063cdc47bdb45b3d943526
* radeon/llvm: Avoid error with SI in EmitInstrWithCustomInserter()Tom Stellard2012-05-241-0/+1
| | | | | | We need to return immediately after inserting instructions that require S_WAITCNT so that the parent class' custom inserter won't try to insert them again.
* tgsi: Initialize Padding struct fields.Vinson Lee2012-05-231-0/+4
| | | | | | | Fix uninitialized scalar variable defects report by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Gut the separate OpenGL ES extension enabling.Kenneth Graunke2012-05-237-148/+4
| | | | | | | | | | | | | | | | | | | | | | | | We should just set the bits of functionality that we support; the GL/ES1/ES2 flags in extensions.c will take care of advertising the appropriate extensions for the current API. This enables the GL_EXT_texture_compression_dxt1 extension on ES1/ES2 when libtxc_dxtn is installed or the force_s3tc driconf option is set. The main extension code set this up properly, but the ES-specific code failed to do so. Otherwise, the extension strings reported by es1_info, es2_info, and glxinfo all remain the same. This patch manually disables the ARB_framebuffer_object bit on ES to preserve the behavior of 1c0f5d8324c4db2720247989ddc4a45315b55a85. v2: Rebase, fix the i915 Makefile, and unconditionally set the OES_draw_texture bit as core Mesa will only apply it to ES1 now. Tested-by: Daniel Charles <[email protected]> [v1] Reviewed-by: Chad Versace <[email protected]> [v1] Signed-off-by: Kenneth Graunke <[email protected]>
* mesa: Remove the OES_draw_texture extension from ES2.Kenneth Graunke2012-05-231-1/+1
| | | | | | | | | This extension appears to be written against ES 1.0. In ES 2.0, you really want to be using FBOs instead. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: use cut index to handle primitive restart when possibleJordan Justen2012-05-231-1/+80
| | | | | | | | | | | | | If the primitive restart index and the primitive type can be handled by the cut index feature, then use the hardware to handle the primitive restart feature. The VBO module's software handling of primitive restart is used as a fall back. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: add flag to enable cut_indexJordan Justen2012-05-234-1/+12
| | | | | | | | | When brw->prim_restart.enable_cut_index is set, the cut index will be enabled when uploading index_buffer commands. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: create code path to handle primitive restart in hardwareJordan Justen2012-05-238-1/+113
| | | | | | | | | | | | | | For newer hardware we disable the VBO module's software handling of primitive restart. We now handle primitive restarts in brw_handle_primitive_restart. The initial version of brw_handle_primitive_restart simply calls vbo_sw_primitive_restart, and therefore still uses the VBO module software primitive restart support. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl/tests: Add .gitignore for uniform initialization unit test.Paul Berry2012-05-231-0/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* glsl/constant propagation: kill whole var if LHS involves array indexing.Paul Berry2012-05-231-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | When considering which components of a variable were killed by an assignment, constant propagation would previously just use the write mask of the assignment. This worked if the LHS of the assignment was simple, e.g.: v.xy = ...; // (assign (xy) (var_ref v) ...) But it did the wrong thing if the LHS of the assignment involved an array indexing operator, since in this case the write mask is always (x): v[i] = ...; // (assign (x) (deref_array (var_ref v) (var_ref i)) ...) In general, we can't predict which vector component will be selected by array indexing, so the only safe thing to do in this case is to kill the entire variable. Fixes piglit tests {fs,vs}-vector-indexing-kills-all-channels.shader_test. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl/tests: Add test for uniform initialization by the linkerIan Romanick2012-05-235-1/+1186
| | | | | | | | v2: Put unit tests in src/glsl/tests rather than tests/glsl. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* mesa: Use initializers to configure samplersIan Romanick2012-05-231-32/+9
| | | | | | | | | Now that the linker handles initializers of samplers just like any other uniform, a bunch of this annoying code is unnecessary. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ir_to_mesa: Don't set initial uniform values againIan Romanick2012-05-231-104/+0
| | | | | | | | | This work is now done by the linker, so we don't need to keep doing it here. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ir_to_mesa: Propagate initial values in _mesa_associate_uniform_storageIan Romanick2012-05-231-0/+9
| | | | | | | | | The linker may have set initial values for uniforms. Propagate these values to the driver's backing storage when it is first associated. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Propagate sampler uniform initializers to gl_shader_program::SamplerUnitsIan Romanick2012-05-231-0/+9
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Initialize samplers to 0, propagate sampler values to the gl_programIan Romanick2012-05-232-3/+11
| | | | | | | | | | | | | The spec requires that samplers be initialized to 0. Since this differs from the 1-to-1 mapping of samplers to texture units assumed by ARB assembly shaders (and the gl_program structure), be sure to propagate this date from the gl_shader_program to the gl_program. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> CC: Vadim Girlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49088
* glsl: Set initial values for uniforms in the linkerIan Romanick2012-05-234-0/+178
| | | | | | | | | | | | | | v2: Fix handling of arrays-of-structure. Thanks to Eric Anholt for pointing this out. v3: Minor comment change based on feedback from Ken. Fixes piglit glsl-1.20/execution/uniform-initializer/fs-structure-array and glsl-1.20/execution/uniform-initializer/vs-structure-array. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6+: Add support for GL_ARB_blend_func_extended.Eric Anholt2012-05-2314-9/+113
| | | | | | | v2: Add support for gen6, and don't turn it on if blending is disabled. (fixes GPU hang), and note it in docs/GL3.txt Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Keep a computed value for dual source blend func with each buffer.Eric Anholt2012-05-233-17/+32
| | | | | | | | | The i965 driver needed this as well for hardware setup, so instead of duplicating the logic, just save it off. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* i965/gen6+: Add support for fast depth clears.Eric Anholt2012-05-238-12/+150
| | | | | | | | | | Improves citybench high-res performance 3.0% +- 0.4%, n=10. Improves Lightsmark 1024x768 performance 0.74% +/- 0.20% (n=78). No significant difference on openarena (n=5, didn't fast clear) or nexuiz (n=3). Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/gen6: Add CC viewport state setup to blorp code.Eric Anholt2012-05-231-0/+26
| | | | | | | | While it doesn't have the same warning in the simulator as in gen7, let's emit it out of paranoia. We wouldn't want our resolves of some previous clear to get clamped to some current clamping value. Suggested-by: pretty much everyone
* i965/gen7: Add CC viewport setup to blorp code.Eric Anholt2012-05-231-0/+21
| | | | | | | | | | | | | | | When doing fast clears, a fulsim warning said that the batch was being emitted without the viewport set up. While the fast clear pass I was looking at doesn't use the clear value, the later resolves which also didn't set up the vieport would trigger the same. It's not obvious from the error message whether it meant "fast clear value gets clamped to something you haven't defined" or "fast clear value doesn't get clamped, and I saw it was out of the current (uninitialized) range, and you probably wanted it clamped to that (uninitialized) range". Be paranoid and assume the first case. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Drop a layer of indirection in doing HiZ resolves.Eric Anholt2012-05-237-120/+9
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Replace intel_need_resolve with the hiz ops it maps to.Eric Anholt2012-05-233-17/+21
| | | | | | | | Having this enum separate caused us to need a bunch of helper functions to translate to the op to be executed. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Add an interface for doing hiz ops from C code.Eric Anholt2012-05-234-15/+44
| | | | | | | | This required moving gen6_hiz_op, and I put it in intel_resolve_map.h for the next commit. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Rename the clear function for this driver.Eric Anholt2012-05-231-2/+2
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Simplify the remaining clear logic by relying on the meta clear.Eric Anholt2012-05-231-47/+11
| | | | | | | | The GLSL clear path doesn't need any buffer presence checks, since those are already handled in the normal drawing path code. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Switch blit color clears to tri clears on gen4/5.Eric Anholt2012-05-231-28/+2
| | | | | | | | | | | | | | Our understanding is that the 3D engine is supposed to be faster anyway. We used to have more overhead in our tri clear path than we do today, which would have led to this choice. But given that we almost always see a depth clear along with a color clear, the path was hardly exercised anyway. Also, the color mask logic was broken in the presence of GL_EXT_draw_buffers2's per-buffer colormask. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Remove dead logic for non-tri depth/stencil clears.Eric Anholt2012-05-231-26/+2
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: We always have GLSL, so always use it for tri clears.Eric Anholt2012-05-231-4/+1
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i915: Drop gen4+ code from the forked clear code.Eric Anholt2012-05-231-10/+1
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel: Fork the intel_clear.c file between i915 and i965.Eric Anholt2012-05-234-8/+209
| | | | | | | | This logic is wasted on i965 when we want to just always do GLSL tri clears. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* st/mesa: set stObj->lastLevel in guess_and_alloc_textureVadim Girlin2012-05-231-0/+2
| | | | | | | | | | Fixes lockups/asserts with depthstencil-render-miplevels tests and r600g. Should also fix https://bugs.freedesktop.org/show_bug.cgi?id=50033 NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Completely annotate the batch bo when aub dumping.Paul Berry2012-05-227-28/+118
| | | | | | | | | | | | | | | | | | | Previously, when the environment variable INTEL_DEBUG=aub was set, mesa would simply instruct DRM to start dumping data to an .aub file, but we would not provide DRM with any information about the format of the data in various buffers. As a result, a lot of the data in the generate .aub file would be unannotated, making further data analysis difficult. This patch causes the entire contents of each batch buffer to be annotated using the data in brw->state_batch_list (which was previously used only to annotate the output of INTEL_DEBUG=bat). This includes data that was allocated by brw_state_batch, such as binding tables, surface and sampler states, depth/stencil state, and so on. The new annotation mechanism requires DRM version 2.4.34. Reviewed-by: Eric Anholt <[email protected]>
* intel: When AUB dumping, flush before emitting final bitmap command.Paul Berry2012-05-221-1/+3
| | | | | | | | | | | | | When we are generating an AUB dump, we make a final call to aub_dump_bmp() as the context is being destroyed, to ensure that any rendering performed before the application exits can be seen during a simulation run. However, we were doing this before flushing the batch buffer; as a result simulation runs would not always see the effect of all rendering commands. This patch flushes the batch buffer just before making the final call to aub_dump_bmp(), to ensure that all rendering is properly captured in the final bitmap.
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