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* freedreno/ir3: fix small memory leakRob Clark2016-04-241-0/+2
* freedreno/ir3: fix small RA bugRob Clark2016-04-241-1/+2
* freedreno/a4xx: better workaround for astc+srgbRob Clark2016-04-2410-22/+195
* Revert "freedreno/a4xx: lower srgb in shader for astc textures"Rob Clark2016-04-247-62/+6
* freedreno/a4xx: blend state no longer depends on fb stateRob Clark2016-04-241-4/+1
* Revert "st/dri: add 32-bit RGBX/RGBA formats"Marek Olšák2016-04-242-10/+0
* genxml: use PYTHON3Jonathan Gray2016-04-232-1/+3
* i965/tex_image: Flush certain subnormal ASTC channel valuesNanley Chery2016-04-231-0/+87
* configure.ac: search for and set PYTHON3Jonathan Gray2016-04-231-0/+2
* i965/blorp: Enable for buffer resolvesTopi Pohjolainen2016-04-231-1/+1
* i965/blorp: Enable for normal color clearsTopi Pohjolainen2016-04-231-0/+9
* i965/blorp: Fix clear code for ignoring colormask for XRGB formats on Gen9+Topi Pohjolainen2016-04-231-7/+26
* mesa/formats: Take luminance into account in component countTopi Pohjolainen2016-04-231-0/+1
* i965/blorp: Do not trigger re-emission of base state addressTopi Pohjolainen2016-04-232-2/+0
* i965/blorp: Reconfigure base state address only if neededTopi Pohjolainen2016-04-233-3/+7
* i965/blorp: Use BRW_NEW_BLORP instead of trashing all state bitsTopi Pohjolainen2016-04-232-5/+2
* i965: Make all atoms to track BRW_NEW_BLORP by defaultKenneth Graunke2016-04-2362-46/+179
* i965: Introduce state flag for blorpTopi Pohjolainen2016-04-232-0/+3
* i965/blorp/gen6: Use normal base state address setupTopi Pohjolainen2016-04-233-54/+5
* i965: Remove pointers to non-existing atomsTopi Pohjolainen2016-04-231-8/+0
* radeonsi: Implement ddx/ddy on VI using ds_bpermuteTom Stellard2016-04-221-12/+30
* radeonsi: Use llvm.amdgcn.mbcnt.* intrinsics instead of llvm.SI.tidTom Stellard2016-04-221-1/+16
* radeonsi: Set range metadata on calls to llvm.SI.tidTom Stellard2016-04-221-3/+26
* radeonsi: Create a helper function for computing the thread idTom Stellard2016-04-221-6/+11
* i965: Disable KHR_texture_compression_astc_hdr on Gen9Nanley Chery2016-04-222-4/+3
* swr: [rasterizer memory] Constify load tilesTim Rowley2016-04-222-6/+8
* swr: [rasterizer core] CompleteDrawContext changes for gccTim Rowley2016-04-221-4/+11
* swr: [rasterizer] Small cleanupsTim Rowley2016-04-227-20/+29
* swr: [rasterizer scripts] Knob scripts tweaksTim Rowley2016-04-222-2/+27
* swr: [rasterizer] Interpolation utility functionsTim Rowley2016-04-223-6/+55
* swr: [rasterizer core] TemplateArgUnrollerTim Rowley2016-04-225-109/+101
* swr: [rasterizer core] Arena: make most allocated blocks the same sizeTim Rowley2016-04-221-16/+52
* swr: [rasterizer core] Fix global arena allocator bugTim Rowley2016-04-222-42/+51
* swr: [rasterizer core] Fix thread binding for 32-bit windowsTim Rowley2016-04-221-1/+15
* swr: [rasterizer fetch] Add support for fetching non-uniform component formatsTim Rowley2016-04-221-1/+189
* swr: [rasterizer core] Use CS spill/fill size in coreTim Rowley2016-04-224-5/+9
* swr: fix memory leaks from vs/fs compilationTim Rowley2016-04-223-23/+41
* swr: fix clang warningsTim Rowley2016-04-222-5/+5
* freedreno/a4xx: fix encoding of blend color stateRob Clark2016-04-221-35/+14
* freedreno: update generated headersRob Clark2016-04-225-9/+33
* vc4: Make sure we recompile when sample_mask changes.Eric Anholt2016-04-221-0/+1
* vc4: Fix validation of full res tile offset if used for non-MSAA.Eric Anholt2016-04-223-2/+14
* vc4: Only do MSAA FB operations if the FB is MSAA.Eric Anholt2016-04-221-5/+8
* vc4: Fix tests for format supported with nr_samples == 1.Eric Anholt2016-04-221-3/+4
* vc4: Don't try to blit from MSAA surfaces with mismatched width to dst.Eric Anholt2016-04-221-11/+14
* i965: Disable channel expressions for scalar GS, TCS, TES.Kenneth Graunke2016-04-221-1/+3
* i965/blorp: Add support for 2x msaaTopi Pohjolainen2016-04-222-10/+9
* i965/blorp: Add support for encoding/decoding interleaved 2x msaaTopi Pohjolainen2016-04-221-8/+36
* i965: don't lower mod() in glsl irSamuel Iglesias Gonsálvez2016-04-221-1/+0
* glsl: fix cross validation for explicit locations on structs and arraysTimothy Arceri2016-04-221-13/+30
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