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* vc4: Fix accidental dropping of the low bits of the store tilebuffer packet.Eric Anholt2014-10-171-3/+5
* vc4: Set the primitive list format at the start of rendering.Eric Anholt2014-10-172-0/+15
* vc4: Replace the FLUSH_ALL with FLUSH.Eric Anholt2014-10-171-1/+3
* vc4: Add some comments about state management.Eric Anholt2014-10-172-0/+11
* vc4: Make sure there's exactly 1 tile store per tile coords packet.Eric Anholt2014-10-171-15/+64
* winsys/radeon: Use a single buffer cache manager againMichel Dänzer2014-10-173-37/+21
* clover: Add environment variables for dumping kernel code v2Tom Stellard2014-10-161-11/+75
* clover: Register an llvm diagnostic handler v3Tom Stellard2014-10-161-0/+25
* clover: Add support for compiling to native object code v3Tom Stellard2014-10-162-9/+204
* gallium: Add PIPE_SHADER_IR_NATIVE to enum pipe_shader_irTom Stellard2014-10-162-3/+4
* clover: Factor kernel argument parsing into its own function v2Tom Stellard2014-10-161-81/+92
* st/mesa: use pipe_sampler_view_release for releasing sampler viewsMarek Olšák2014-10-166-13/+18
* mesa: Drop the "target" parameter from NewBufferObject().Kenneth Graunke2014-10-1611-26/+21
* glsl: Update and fix typos in README.Andres Gomez2014-10-161-8/+8
* i965: Flag BRW_ATOMIC_COUNTER_BUFFER when a possible ABO is respecifiedChris Forbes2014-10-161-0/+2
* mesa: Mark buffer objects that are used as atomic counter buffersChris Forbes2014-10-162-0/+2
* i965/disasm: Add missing message type for Gen7 DP untyped surface readChris Forbes2014-10-161-0/+1
* i965: Correctly use ABO count to trigger flagging of new surfaces.Chris Forbes2014-10-161-1/+1
* i965: No longer reemit textures on BRW_NEW_UNIFORM_BUFFERChris Forbes2014-10-161-2/+1
* i965: Dirty state in BO reallocation based on usage historyChris Forbes2014-10-161-1/+4
* i965: Have mesa flag BRW_NEW_TEXTURE_BUFFER when a TexBO binding changesChris Forbes2014-10-161-0/+1
* i965: Add new dirty flag for new TexBOs.Chris Forbes2014-10-163-0/+4
* mesa: Mark buffer objects that are used as TexBOsChris Forbes2014-10-162-0/+9
* mesa: Mark buffer objects which are bound as UBOsChris Forbes2014-10-161-0/+6
* mesa: Add usage history bitfield to buffer objectsChris Forbes2014-10-161-0/+9
* vc4: correctly include the source filesEmil Velikov2014-10-162-3/+1
* i965/fs: don't make a fake ir_texture in the Mesa IR frontendConnor Abbott2014-10-151-14/+5
* i965/fs: Refactor the texture emission logic into a single function.Kenneth Graunke2014-10-153-104/+144
* i965/fs: Make gather_channel() not use ir_texture.Connor Abbott2014-10-152-5/+4
* i965/fs: Make swizzle_result() not use ir_texture.Connor Abbott2014-10-153-8/+9
* i965/fs: fix integer textures with swizzlesConnor Abbott2014-10-151-0/+1
* i965/fs: don't pass in ir_texture to emit_texture_*Connor Abbott2014-10-153-24/+23
* i965/fs: don't use ir->type in emit_texture_gen4()Connor Abbott2014-10-151-4/+1
* i965/fs: Don't use ir->lod_info.grad.dPd<x,y> in emit_texture_*.Connor Abbott2014-10-153-18/+31
* i965/fs: Don't use ir->coordinate in emit_texture_*.Connor Abbott2014-10-153-31/+39
* i965/fs: make rescale_texcoord() not use ir_texture.Connor Abbott2014-10-153-8/+8
* i965/fs: Make emit_mcs_fetch() not use ir_texture.Connor Abbott2014-10-152-4/+4
* i965/fs: Rename "length" to "components" in emit_mcs_fetch().Kenneth Graunke2014-10-151-6/+6
* i965: Make brw_texture_offset() not use ir_texture.Connor Abbott2014-10-154-12/+15
* i965/fs: don't use ir->offset in emit_texture_gen5.Connor Abbott2014-10-153-5/+8
* i965/fs: Move texel offset handling to visit(ir_texture *).Kenneth Graunke2014-10-153-11/+29
* i965: Drop ir->op != ir_txf condition in offset checking.Kenneth Graunke2014-10-152-4/+3
* i965: Restore a lost comment about TXF offset bugs.Kenneth Graunke2014-10-151-0/+5
* freedreno/ir3: large const supportRob Clark2014-10-155-13/+33
* freedreno: update generated headersRob Clark2014-10-154-5/+10
* freedreno: fix layer_strideRob Clark2014-10-151-1/+1
* freedreno: inline fd_draw_emit()Rob Clark2014-10-152-49/+47
* freedreno/ir3: optimize shader key comparisionRob Clark2014-10-155-40/+79
* freedreno/a3xx: refactor/optimize emitRob Clark2014-10-157-83/+125
* freedreno/a3xx: refactor vertex state emitRob Clark2014-10-1511-79/+83
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