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* egl: Use pkg-config for Android NDK buildGurchetan Singh2016-11-152-0/+3
| | | | | | | | | | | | | | | | | It's possible to build Mesa for Android using the traditional autotools workflow [1]. ChromiumOS fetches Android prebuilts and puts them in a sysroot. We now want to use pkg-config to specify the location of system headers and libraries [2]. To enable this, let's add the required pkg-config checks and link against them. [1] https://developer.android.com/ndk/guides/standalone_toolchain.html [2] https://chromium-review.googlesource.com/#/c/403237/ v2: Bundle pkg-config checks together (Emil) v3: Provide further context on standalone NDK Mesa build (Emil) Reviewed-by: Emil Velikov <[email protected]>
* configure.ac: Don't look for pthreads in Android platformGurchetan Singh2016-11-151-2/+5
| | | | | | | | | | | | In Android, the pthreads libs are in bionic. When building Mesa for Android with the autotools workflow, we shouldn't set -lpthread or -pthread. [Emil Velikov] Other platforms could use a similar fix, although that is left as separate exercise. Reviewed-by: Emil Velikov <[email protected]>
* meta/GetTexSubImage: Account for GL_PACK_SKIP_IMAGES on compressed texturesEduardo Lima Mitev2016-11-151-3/+17
| | | | | | | | | | | | This option was being ignored when packing compressed 3D and cube textures. Fixes CTS test (on gen8+): * GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore v2: Drop API checks. v3 (Ken): Just apply the existing code in more cases. Reviewed-by: Kenneth Graunke <[email protected]>
* anv/format: handle unsupported formats earlierIago Toral Quiroga2016-11-151-3/+3
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* main: return error if asking for GL_TEXTURE_BORDER_COLOR in ↵Samuel Iglesias Gonsálvez2016-11-151-0/+12
| | | | | | | | | | | | | | | | | | | | | TEXTURE_2D_MULTISAMPLE{_ARRAY} through TexParameter{i,Ii,Iui}v() OpenGL ES 3.2 says in section 8.10. "TEXTURE PARAMETERS", at the end of the section: "An INVALID_ENUM error is generated if target is TEXTURE_2D_- MULTISAMPLE or TEXTURE_2D_MULTISAMPLE_ARRAY , and pname is any sampler state from table 21.12." GL_TEXTURE_BORDER_COLOR is present in that table. v2: - Add check to _mesa_texture_parameteriv() (Kenneth) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98250 Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv: fix multi level clears with VK_REMAINING_MIP_LEVELSLionel Landwerlin2016-11-141-2/+2
| | | | | | | | | | | | A commit from the CTS suite on the 1.0-dev branch started using VK_REMAINING_MIP_LEVELS, we're not dealing with it properly for clears. Fixes: dEQP-VK.api.image_clearing.clear_color_image.* Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "13.0" <[email protected]>
* dir-locals.el: Adds White Space supportAndres Gomez2016-11-141-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Trailing white spaces will be now always highlighted, not just in prog-mode. Also, the White Space package, which is available since GNU Emacs 22, is loaded and activated locally in prog-mode. Additionally, using White Space variables, we set highlighting through faces on wrong indentation and the maximum length of a coding line. Notice that: - The highlighting for the characters beyond the set length of a coding line is not activated by default, only for wrong indentations. - If the White Space package is not available, errors on loading or activation are ignored. - If the White Space mode is not activated the set variables would not have any effect. v2: Removed too long lines trail highlighting, as suggested by Ilia Mirkin. Signed-off-by: Andres Gomez <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* anv/format: support VK_FORMAT_R8G8B8_SRGBIago Toral Quiroga2016-11-141-1/+1
| | | | | | Fixes dEQP-VK.api.image_clearing.clear_color_image.1d_r8g8b8_srgb Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/format: handle unsupported formats properlyIago Toral Quiroga2016-11-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the spec for vkGetPhysicalDeviceImageFormatProperties: "If format is not a supported image format, or if the combination of format, type, tiling, usage, and flags is not supported for images, then vkGetPhysicalDeviceImageFormatProperties returns VK_ERROR_FORMAT_NOT_SUPPORTED." Makes the following Vulkan CTS tests report 'Not Supported' instead of crashing: dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_unorm dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_snorm dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_uscaled dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_sscaled dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_uint dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_sint dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8_srgb dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_unorm dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_snorm dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_uscaled dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_sscaled dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_uint dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_sint dEQP-VK.api.image_clearing.clear_color_image.1d_b8g8r8a8_srgb dEQP-VK.api.image_clearing.clear_color_image.1d_r4g4_unorm_pack8 dEQP-VK.api.image_clearing.clear_color_image.1d_r8_srgb dEQP-VK.api.image_clearing.clear_color_image.1d_r8g8_srgb dEQP-VK.api.image_clearing.clear_color_image.1d_r8g8b8_srgb dEQP-VK.api.image_clearing.clear_color_image.1d_b5g5r5a1_unorm_pack16 Reviewed-by: Lionel Landwerlin <[email protected]>
* clover: adapt to new error API since LLVM r286752Vedran Miletić2016-11-141-2/+8
| | | | Tested-by: Dieter Nützel <[email protected]>
* swr: [rasterizer core] remove driverTypeTim Rowley2016-11-145-49/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] move to pass by valueTim Rowley2016-11-142-2/+2
| | | | | | | | | Move to pass by value since most events are very small in size. We can look at pass by reference but will need to create multiple versions to handle temp objects. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] add mode for aux buffer in the SWR_SURFACE_STATETim Rowley2016-11-141-0/+16
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] don't bleed NOMINMAX definition after <windows.h>Tim Rowley2016-11-141-1/+4
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] add eventsTim Rowley2016-11-146-6/+541
| | | | | | | Added events for tracking early/late Depth and stencil events, TE patch info, GS prim info, and FrontEnd/BackEnd DrawEnd events. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] fix culling issuesTim Rowley2016-11-141-66/+119
| | | | | | | | | - Do proper culling of wireframe triangles (including non-culling of degenerates) - Fix degenerate culling of CCW front-facing triangles in wireframe and conservative rast Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core/jitter] fix alpha test bugTim Rowley2016-11-143-3/+15
| | | | | | | | Alpha from render target 0 should always be used for alpha test for all render targets, according to GL and DX9 specs. Previously we were using alpha from the current render target. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] various code style changesTim Rowley2016-11-146-5/+26
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] don't generate empty filesTim Rowley2016-11-144-8/+39
| | | | | | | Don't generate files when no events have been generated outside the header events. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] fix open file handle limit issueTim Rowley2016-11-141-6/+44
| | | | | | | | Buffer events ourselves and then when that's full or we're destroying the context then write the contents to file. Previously, we're relying ofstream to buffer for us. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer archrast] fix double free issueTim Rowley2016-11-149-24/+41
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] separate frontend/backend stats enablesTim Rowley2016-11-146-26/+51
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] 16-wide tile store nearly completedTim Rowley2016-11-145-314/+917
| | | | | | | | | | * All format combinations coded * Fully emulated on AVX2 and AVX * Known issue: the MSAA sample locations need to be adjusted for 8x2 Set ENABLE_AVX512_SIMD16 and USD_8x2_TILE_BACKEND to 1 in knobs.h to enable Reviewed-by: Bruce Cherniak <[email protected]>
* docs: add news item and link release notes for 13.0.1Emil Velikov2016-11-142-0/+7
| | | | Signed-off-by: Emil Velikov <[email protected]>
* docs: add sha256 checksums for 13.0.1Emil Velikov2016-11-141-1/+2
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit b47ce6ddb8be51d72d40ea0abc3d77b667c8552f)
* docs: add release notes for 13.0.1Emil Velikov2016-11-141-0/+187
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit f2f487ebbb808010528edd69000694bfe525f87b)
* i965/vec4: skip registers already marked as no_spillJuan A. Suarez Romero2016-11-141-2/+2
| | | | | | | Do not evaluate spill costs for registers that were already marked as no_spill. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Don't crash on function names with invalid identifiers.Kenneth Graunke2016-11-121-2/+4
| | | | | | | | | | | | | | | | Karol Herbst's fuzzing efforts noticed that we would segfault on: void bug() { 2(0); } We just need to bail if the function name isn't an identifier. Based on a bug fix by Karol Herbst. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97422 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: Fix assert fails when assignment expressions are in array sizes.Kenneth Graunke2016-11-121-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Karol Herbst's fuzzing efforts discovered that we would hit the following assert: assert(dummy_instructions.is_empty()); when processing an illegal array size expression of float[(1=1)?1:1] t; In do_assignment, we realized we needed an rvalue for (1 = 1), and generated a temporary variable and assignment from the RHS. We've already flagged an error (non-lvalue in assignment), and return a bogus value as the rvalue. But process_array_size sees the bogus value, which happened to be a constant expression, and rightly assumes that processing a constant expression shouldn't have generated any code. instructions. To handle this, make do_assignment not generate any temps or assignments when it's already raised an error - just return an error value directly. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98694 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* vc4: Add simulator kernel validation for multithreaded fragment shaders.Jonas Pfeil2016-11-123-5/+76
| | | | | This is Jonas Pfeil's code from the kernel, brought back to Mesa by anholt.
* vc4: Mark threaded FSes as non-singlethread in the CL.Eric Anholt2016-11-123-1/+6
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* vc4: Flag the last thread switch in the program as the last.Eric Anholt2016-11-123-0/+34
| | | | | | We don't allow the last thread switch to be inside control flow, to be sure that we hit the last state exactly once. If the last texturing was in control flow, fall back to single threaded.
* vc4: Add THRSW nodes after each tex sample setup in multithreaded mode.Eric Anholt2016-11-122-0/+49
| | | | | This is a suboptimal implementation, but Jonas Pfeil found that it was still a massive performance gain.
* vc4: Add some spec citations about texture fifo management.Eric Anholt2016-11-121-5/+37
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* vc4: Use ra14/rb14 as the spilling registers.Eric Anholt2016-11-122-8/+8
| | | | This makes the raddr fixups compatible with FS threading.
* vc4: Add support for register allocation for threaded shaders.Eric Anholt2016-11-123-20/+85
| | | | | | We have two major requirements: Make sure that only the bottom half of the physical reg space is used, and make sure that none of our values are live in an accumulator across a switch.
* vc4: Split register class setup for physical files from accumulators.Eric Anholt2016-11-121-17/+19
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* vc4: Use register allocator CLASS_BIT_R0_R3 to clean up CLASS_B.Eric Anholt2016-11-121-4/+4
| | | | | | We have had no reason to separate ability to store in an accumulator from ability to store in B, but with FS threading, we need to be able to force values to be stored only in the physical regfiles.
* vc4: Add support for QPU scheduling of thread switch instructions.Eric Anholt2016-11-121-2/+27
| | | | This is vaguely based off of Jonas Pfeil's thread switch support branch.
* vc4: Add a thread switch QIR instruction.Eric Anholt2016-11-123-0/+18
| | | | | | | This will eventually be generated at the QIR level, so that vc4_qir_schedule.c can arrange the separation of tex_strb from tex_result correctly. It will also be important so that register allocation set the register classes appropriately for values that are live across the switch.
* vc4: Add a bit of QPU validation for threaded shaders.Eric Anholt2016-11-121-1/+102
| | | | | These are both bugs we've run into along the way writing multithreaded FS support.
* vc4: Fix register class handling of DDX/DDY arguments.Eric Anholt2016-11-121-1/+1
| | | | | | | I had this exactly backwards, but apparently the piglit tests were all landing in r0-r3 anyway. Cc: "13.0" <[email protected]>
* radv/pipeline: Don't dereference NULL dynamic state pointersDarren Salt2016-11-121-20/+47
| | | | | | | | | | | | | | | | | This is a port of commit a4a59172482d50318a5ae7f99021bcf0125e0f53: Add guards to prevent dereferencing NULL dynamic pipeline state. Asserts of pCreateInfo members are moved to the earliest points at which they should not be NULL. This fixes a segfault, related to pColorBlendState, seen in Talos Principle which I've observed after startup is completed and when exiting the menus, depending on when Vulkan rendering is selected. v2: moved the NULL check in radv_pipeline_init_blend_state to after the declarations. Acked-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* freedreno/ir3: fixup ralloc falloutRob Clark2016-11-122-2/+2
| | | | | | | Fixes fallout from acc23b04 ("ralloc: remove memset from ralloc_size"). We were still depending on zero'd allocations in a couple of places. Signed-off-by: Rob Clark <[email protected]>
* Fix races during _mesa_HashWalk().Steinar H. Gunderson2016-11-121-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is currently no protection against walking a hash (using _mesa_HashWalk()) and modifying it at the same time, for instance by inserting or deleting elements. This leads to segfaults in multithreaded code if e.g. someone calls glTexImage2D (which may have to walk the list of FBOs) while another thread is calling glDeleteFramebuffers on another thread with the two contexts sharing lists. The reason for this is that _mesa_HashWalk() doesn't actually take the mutex that normally protects the hash; it takes an entirely different mutex. Thus, walks are only protected against other walks, and there is also no outer lock taking this. There is an old comment saying that this is to fix problems with deadlock if the callback needs to take a mutex; we solve this by changing the mutex to be recursive. A demonstration Helgrind hit from a real application: ==13412== Possible data race during write of size 8 at 0x3498C6A8 by thread #1 ==13412== Locks held: 2, at addresses 0x1AF09530 0x2B3DF400 ==13412== at 0x1F040C99: _mesa_hash_table_remove (hash_table.c:395) ==13412== by 0x1EE98174: _mesa_HashRemove_unlocked (hash.c:350) ==13412== by 0x1EE98174: _mesa_HashRemove (hash.c:365) ==13412== by 0x1EE2372D: _mesa_DeleteFramebuffers (fbobject.c:2669) ==13412== by 0x6105AA4: movit::ResourcePool::cleanup_unlinked_fbos(void*) (resource_pool.cpp:473) ==13412== by 0x610615B: movit::ResourcePool::release_fbo(unsigned int) (resource_pool.cpp:442) [...] ==13412== This conflicts with a previous read of size 8 by thread #20 ==13412== Locks held: 2, at addresses 0x1AF09558 0x1AF73318 ==13412== at 0x1F040CD9: _mesa_hash_table_next_entry (hash_table.c:415) ==13412== by 0x1EE982A8: _mesa_HashWalk (hash.c:426) ==13412== by 0x1EED6DFD: _mesa_update_fbo_texture.part.33 (teximage.c:2683) ==13412== by 0x1EED9410: _mesa_update_fbo_texture (teximage.c:3043) ==13412== by 0x1EED9410: teximage (teximage.c:3073) ==13412== by 0x1EEDA28F: _mesa_TexImage2D (teximage.c:3105) ==13412== by 0x166A68: operator() (mixer.cpp:454) There are many more interactions than just these two possible. Cc: 11.2 12.0 13.0 <[email protected]> Signed-off-by: Steinar H. Gunderson <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Drop tabs in brw_state.h.Kenneth Graunke2016-11-111-13/+13
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* ac/nir/llvm: Fix setting function attributes for intrinsicsDaniel Scharrer2016-11-111-1/+5
| | | | | | | | This fixes a NULL pointer dereference for intrinsics with more than one function attribute introduced in commit 2fdaf38. The fix is ported from the lp_build_intrinsic changes in commit 8bdd52c. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* i965: Update a comment: s/brw_state_cache/brw_program_cache/gKenneth Graunke2016-11-111-2/+2
| | | | | | Tim renamed this recently - stop referring to it by the old name. Signed-off-by: Kenneth Graunke <[email protected]>
* clover: fix building since llvm r286566Laurent Carlier2016-11-111-0/+5
| | | | pretty trivial fix
* egl/wayland: fix return value in dri2_wl_swrast_commit_backbufferEmil Velikov2016-11-111-1/+1
| | | | | | | | | | The function returns "void" rather than int. We could rework that, yet again there will be no benefit since all the callers have no use of it. Fixes: 9ca6711faa0 ("Revert "wayland: Block for the frame callback in get_back_bo not dri2_swap_buffers"") Reviewed-by: Daniel Stone <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
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