aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* i965: Add a "write" parameter to intel_bufferobj_buffer.Kenneth Graunke2017-07-139-19/+26
| | | | | | | This doesn't do anything yet, but soon we'll want to know whether an access to a buffer section may write that data, or simply reads it. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Convert GS_STATE to genxml.Rafael Antognolli2017-07-135-172/+54
| | | | | | | | Merge the code with gen6+ 3DSTATE_GS, and delete brw_gs_state.c, together with brw_gs_unit_state. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Prepare gs_state emitting code to include gen4-5.Rafael Antognolli2017-07-131-13/+11
| | | | | | | | | | | | Since we always call brw_batch_emit anyways, we can hopefully make things simpler by calling it only once, and then branching inside its body. This can be helpful when bringing the gen4-5 code into this function. Additionally, check for GEN_GEN == 6 instead of < 7 in cases that won't apply to lower gens. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove upload_gs_state_for_tf.Rafael Antognolli2017-07-134-60/+16
| | | | | | | | | | | | This function only emits a particular case of 3DSTATE_GS. Instead, we can do that inside genX(upload_gs_state), and later reuse part of that code for emitting gen4-5 state. There's the additional benefit of allowing us to remove gen6_gs_state.c, which was only left because of this function. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert BLEND_CONSTANT_COLOR state to genxml.Rafael Antognolli2017-07-133-64/+27
| | | | | | | It's a very simple conversion, and it allows us to delete brw_cc.c. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert CC state on gen4-5 to genxml.Rafael Antognolli2017-07-135-284/+68
| | | | | | | | | | | | | Use set_blend_entry_bits and set_depth_stencil_bits to fill most of the color calc struct, and then manually update the rest. v2: - Always check for depth_irb (Ken) - Always set Backface Stencil Ref (Ken) - Always set alpha reference value (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move color calc code around a bit.Rafael Antognolli2017-07-131-8/+8
| | | | | | | This makes the code more consistent accross generations. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Check for alpha channel just like in gen6+.Rafael Antognolli2017-07-131-1/+4
| | | | | | | | | | | | | | gen6+ uses _mesa_base_format_has_channel() to check for the alpha channel, while gen4-5 use ctx->DrawBuffer->Visual.alphaBits. By using _mesa_base_format_has_channel() here we keep the same behavior accross all gen. While initially both ways of checking the alpha channel seemed correct to me, this change also seems to fix fbo-blending-formats piglit test on gen4. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make a helper function for blend entry related state.Rafael Antognolli2017-07-131-81/+101
| | | | | | | | | Add a helper function to reuse code that fills blend entry related state, and make genX(upload_blend_state) use it. This function can later be used by gen4-5 color calc state to set the blend related bits. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make a helper function for depth/stencil related state.Kenneth Graunke2017-07-131-48/+65
| | | | | | | | | | | | Gen4-5 basically glue DEPTH_STENCIL_STATE, COLOR_CALC_STATE, and BLEND_STATE together into a single COLOR_CALC_STATE structure. By making a helper function, we'll be able to reuse it when filling out Gen4-5 COLOR_CALC_STATE without replicating any actual logic. We use generation-defined typedef to handle the polymorphism. Reviewed-by: Rafael Antognolli <[email protected]>
* aubinator: don't leak fd of opened aubfileLionel Landwerlin2017-07-131-0/+2
| | | | | | CID: 1373563 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* anv: don't use strcpy for copying stringsLionel Landwerlin2017-07-131-1/+2
| | | | | | CID: 1358935 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/compiler: no need to check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
| | | | | | CID: 1338342 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: fix missing NULL return if allocation failsLionel Landwerlin2017-07-131-0/+1
| | | | | | CID: 1250585 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/compiler: don't check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
| | | | | | CID: 1224468 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: check pointer before dereferencing itLionel Landwerlin2017-07-131-7/+7
| | | | | | | | Check that irb isn't NULL before accessing irb->Base.Base.NumSamples. CID: 1026046 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: map_gtt: check mapping address before adding offsetLionel Landwerlin2017-07-131-1/+3
| | | | | | | | The NULL check might fail if offset isn't 0. CID: 971379 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/compiler: remove check unsigned is >= 0Lionel Landwerlin2017-07-131-1/+1
| | | | | | | | By definition unsigned are always >= 0. CID: 742212 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* isl: use 64bit arithmetic to compute sizeLionel Landwerlin2017-07-131-2/+2
| | | | | | | | | If we allow the size to be more than 2^32, then we should compute it in 64bit arithmetic otherwise we might run into overflow issues. CID: 1412892, 1412891 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* nir/lower_io_to_temporaries: don't set compact on shadow varsConnor Abbott2017-07-131-0/+1
| | | | | | | | | The compact flag doesn't make sense on local variables, since the packing on them is up to the driver. This fixes nir_validate assertions in some cases, particularly when lower_io_to_temporaries is used on per-vertex inputs/outputs. Reviewed-by: Jason Ekstrand <[email protected]>
* nir: don't segfault when printing variables with no nameConnor Abbott2017-07-131-1/+1
| | | | | | | | | | | | While normally we give variables whose name field is NULL a temporary name when called from nir_print_shader(), when we were calling from nir_print_instr() we never bothered, meaning that we just segfaulted when trying to print out instructions with such a variable. Since nir_print_instr() is meant to be called while debugging, we don't need to bother too much about giving a consistent name, but we don't want to crash in the middle of debugging. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* i965/urb: Trigger upload_urb on NEW_BLORPJason Ekstrand2017-07-132-3/+2
| | | | | | | | | | | | | | | It's a bit rare, but blorp can trigger a urb reconfiguration. When that happens, we need to re-upload the URB config. Previoulsy blorp would set BRW_NEW_URB_SIZE, but this is a pretty big hammer as it would cause back-to-black blorp operations to reconfigure both times. Using BRW_NEW_BLORP is a small, more accurate hammer. v2 (idr): Sort BRW_NEW_ tokens to match brw_recalculate_urb_fence and gen6_urb. v3 (idr): Don't whack BRW_NEW_URB_SIZE in blorp. Suggested by Jason. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Return GL_INVALID_ENUM for bogus TEXTURE_SRGB_DECODE_EXT params.Kenneth Graunke2017-07-131-1/+12
| | | | | | | Fixes dEQP-GLES31.functional.debug.negative_coverage.get_error.shader.srgb_decode_samplerparameter{f,fv,i,Iiv,Iuiv,iv}. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* st/dri: add 32-bit RGBX/RGBA formatsMarek Olšák2017-07-132-12/+65
| | | | | | | | | | | | | | | | | | Add support for 32-bit RGBX/RGBA formats which are required for Android. The original patch (commit ccdcf91104a5) was reverted (commit c0c6ca40a25e) in mesa as it broke GLX resulting in swapped colors. Based on further investigation by Chad Versace, moving the RGBX/RGBA configs to the end is enough to prevent breaking GLX. The handling of RGBA/RGBX in dri_fill_st_visual is a fix from Marek Olšák. Cc: Eric Anholt <[email protected]> Cc: Mauro Rossi <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* broadcom/vc4: Add more packets to the v2.1 XML.Eric Anholt2017-07-131-0/+106
| | | | These will be used to replace vc4_cl_dump.c's hand-written dumping.
* broadcom: Introduce a header for talking about chip revisions.Eric Anholt2017-07-132-0/+40
| | | | | This will be used by the VC5 driver and various shared VC4/VC5 tooling, like the XML decoder.
* broadcom/genxml: Use the same "gen" attr for HW version as Intel does.Eric Anholt2017-07-132-3/+3
| | | | This will let us reuse their tools more easily.
* broadcom/genxml: Support unpacking fixed-point fractional values.Eric Anholt2017-07-132-4/+25
| | | | | This was an oversight in the original XML support, because unpacking wasn't used much. The new XML-based CL dumper will want it, though.
* st/mesa: Handle st_framebuffer_create returning NULLMichel Dänzer2017-07-131-3/+5
| | | | | | | | | | | | | st_framebuffer_create returns NULL if stfbi == NULL or st_framebuffer_add_renderbuffer returns false for the colour buffer. Fixes Xorg crashing on startup using glamor on radeonsi. Fixes: 147d7fb772a7 ("st/mesa: add a winsys buffers list in st_context") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101775 Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* swr/rast: Fix use of KNL-only intrinsics in SKX buildTim Rowley2017-07-133-6/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix build warnings when using the Intel compilerTim Rowley2017-07-131-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: SIMD16 Frontend - Fix USE_SIMD16_FRONTEND buildTim Rowley2017-07-134-12/+25
| | | | | | | Previous check-ins without testing with USE_SIMD16_FRONTEND have introduced regressions. This fixes the build, not the regressions. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Removing unneeded MSVC warning pragmaTim Rowley2017-07-131-3/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add support for read-only render targetsTim Rowley2017-07-132-4/+10
| | | | | | | Core will ensure hot tiles are loaded for read and write render targets, and will skip all output merger for read-only render targets. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Support render target mask instead of render target countTim Rowley2017-07-137-49/+85
| | | | | | WIP to support read-only render targets. Reviewed-by: Bruce Cherniak <[email protected]>
* egl: remove unused err variableAlejandro Piñeiro2017-07-131-1/+1
| | | | | | Fixes: 81e95924ea1 ("egl: call _eglError within _eglParseImageAttribList") Reviewed-by: Daniel Stone <[email protected]>
* radeonsi/gfx9: fix crash building monolithic merged ES-GS shaderNicolai Hähnle2017-07-131-3/+6
| | | | | | | | | | | Forwarding from the ES prolog to the ES just barely exceeds the current maximum array size when 16 vertex attributes are used. Give it a decent bump to account for merged shaders having up to 32 user SGPRs. Fixes a crash in GL45-CTS.multi_bind.draw_bind_vertex_buffers. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* loader/dri3: Use dri3_find_back in loader_dri3_swap_buffers_mscThomas Hellstrom2017-07-131-1/+1
| | | | | | | | | | | | | | | | If the application hasn't done any drawing since the last call, we would reuse the same back buffer which was used for the previous swap, which may not have completed yet. This could result in various issues such as tearing or application hangs. In the normal case, the behaviour is unchanged. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97957 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101683 Cc: [email protected] [Michel Dänzer: Make Thomas' fix from bugzilla actually work as intended, write commit log]
* i965/screen: Drop get_tiled_heightJason Ekstrand2017-07-121-17/+3
| | | | | | | It's no longer used. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Use ISL for doing image import checksJason Ekstrand2017-07-121-4/+28
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Use ISL for allocating image BOsJason Ekstrand2017-07-121-22/+29
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel/isl: Add a helper to convert tilings from ISL to i915Jason Ekstrand2017-07-122-0/+28
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel/isl: Add basic modifier introspectionJason Ekstrand2017-07-124-0/+83
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Add an isl_device to intel_screenJason Ekstrand2017-07-123-1/+8
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Move CCS allocation into create_for_dri_imageJason Ekstrand2017-07-121-13/+12
| | | | | | | | Any form of CCS on gen9+ only works on Y-tiled images. The only caller of create_for_bo which uses Y-tiled BOs is create_for_dri_image. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Use create_for_dri_image in intel_update_image_bufferJason Ekstrand2017-07-121-9/+14
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add support for window system images to create_for_dri_imageJason Ekstrand2017-07-124-6/+17
| | | | | | | | | | We want to start using create_for_dri_image for all miptrees created from __DRIimage, including those which come from a window system. In order to allow for fast clears to still work on window system buffers, we need to allow for creating aux surfaces. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add a colorspace parameter to create_for_dri_imageJason Ekstrand2017-07-124-5/+28
| | | | | | | The __DRI_FORMAT enums are all UNORM but we will frequently want sRGB when creating miptrees for renderbuffers. This lets us specify. Reviewed-by: Chad Versace <[email protected]>
* main/formats: Add a get_linear_format_srgb helperJason Ekstrand2017-07-122-0/+25
| | | | Reviewed-by: Chad Versace <[email protected]>
* main/formats: Autogenerate _mesa_get_srgb_format_linearJason Ekstrand2017-07-122-117/+46
| | | | | | | | | | | | | | | | | | Due to the wonders of autogeneration, this new version covers a few formats that the old version was missing: MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3 MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3 MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3 MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4 MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4 MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4 MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5 MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5 MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5 MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6 Reviewed-by: Chad Versace <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 04:53:26 +0000