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* freedreno/a6xx: fix border-color swizzlesRob Clark2019-03-071-2/+9
* freedreno/a6xx: refactor fd6_tex_swiz()Rob Clark2019-03-074-34/+61
* freedreno/a6xx: remove astc_srgb workaroundRob Clark2019-03-074-45/+2
* freedreno: fix ir3_cmdline buildRob Clark2019-03-072-0/+3
* iris: Drop PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLYKenneth Graunke2019-03-071-1/+0
* iris: Properly support alpha and luminance-alpha formatsKenneth Graunke2019-03-074-85/+117
* iris: Defer uploading sampler state tables until draw timeKenneth Graunke2019-03-073-20/+44
* iris: Plumb through ISL_SWIZZLE_IDENTITY in buffer surface emittersKenneth Graunke2019-03-071-6/+8
* isl: Add a swizzle parameter to isl_buffer_fill_state()Kenneth Graunke2019-03-076-4/+15
* iris: fix decode_get_bo callbackLionel Landwerlin2019-03-071-1/+3
* virgl: remove unused variableErik Faye-Lund2019-03-071-1/+0
* virgl: remove unused variableErik Faye-Lund2019-03-071-1/+0
* virgl: remove unused variableErik Faye-Lund2019-03-071-1/+0
* virgl: remove unused variablesErik Faye-Lund2019-03-071-3/+0
* iris: fix decoder callLionel Landwerlin2019-03-071-1/+1
* intel/aub_write: factorize context image/pphwsp/ring creationLionel Landwerlin2019-03-075-178/+161
* intel/aub_write: turn context images arrays into functionsLionel Landwerlin2019-03-074-242/+306
* intel/aub_write: store the physical page allocator in structLionel Landwerlin2019-03-072-15/+33
* intel/aub_write: log mmio writesLionel Landwerlin2019-03-071-0/+5
* intel/aub_write: switch to use i915_drm engine classesLionel Landwerlin2019-03-074-44/+59
* intel/aub_write: break execlist write in 2Lionel Landwerlin2019-03-071-41/+67
* intel/aub_write: write header in initLionel Landwerlin2019-03-074-82/+84
* intel/aub_write: split comment section from HW setupLionel Landwerlin2019-03-074-26/+52
* intel/aub_read: reuse defines from gen_contextLionel Landwerlin2019-03-071-12/+13
* intel/decoders: limit number of decoded batchbuffersLionel Landwerlin2019-03-074-2/+27
* intel/decoders: handle decoding MI_BBS from ringLionel Landwerlin2019-03-0711-17/+19
* intel/decoders: add address space indicator to get BOsLionel Landwerlin2019-03-078-42/+65
* vulkan/overlay: fix missing var rename in previous commitEric Engestrom2019-03-071-1/+1
* vulkan/util: use the platform defines in vk.xml instead of hard-coding themEric Engestrom2019-03-071-9/+10
* iris: add support for tgsi_to_nirAndre Heider2019-03-071-3/+8
* nir: free dead_ctx in case of no progressTapani Pälli2019-03-071-1/+3
* anv: call blob_finish when done with itTapani Pälli2019-03-071-0/+3
* anv: use anv_gem_munmap in block pool cleanupTapani Pälli2019-03-071-1/+5
* iris: Fix MOCS for blits and clearsKenneth Graunke2019-03-065-20/+27
* st/glsl: start spilling out common st glsl conversion codeTimothy Arceri2019-03-067-122/+222
* radeonsi/nir: stop calling nir_lower_returns()Timothy Arceri2019-03-061-1/+0
* i965: stop calling nir_lower_returns()Timothy Arceri2019-03-061-3/+1
* glsl: use NIR function inlining for drivers that use glsl_to_nir()Timothy Arceri2019-03-066-8/+89
* glsl/freedreno/panfrost: pass gl_context to the standalone compilerTimothy Arceri2019-03-065-8/+15
* vulkan/overlay: drop dependency on validation layer headersLionel Landwerlin2019-03-064-213/+40
* vulkan/util: generate instance/device dispatch tablesLionel Landwerlin2019-03-065-24/+148
* vulkan/util: make header available from c++Lionel Landwerlin2019-03-061-1/+9
* iris: setup EdgeFlag Vertex Element when needed.Jose Maria Casanova Crespo2019-03-063-15/+86
* v3d: Include a count of register pressure in the RA failure dumps.Eric Anholt2019-03-061-1/+13
* radv: enable lower_mul_2x32_64Samuel Pitoiset2019-03-061-0/+1
* st/nir: Move 64-bit lowering laterJason Ekstrand2019-03-061-2/+5
* intel/nir: Move 64-bit lowering laterJason Ekstrand2019-03-061-21/+13
* nir/lower_doubles: Inline functions directly in lower_doublesJason Ekstrand2019-03-069-63/+53
* nir/deref: Expose nir_opt_deref_implJason Ekstrand2019-03-062-1/+2
* nir/inline_functions: Break inlining into a builder helperJason Ekstrand2019-03-063-40/+60
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