| Commit message (Collapse) | Author | Age | Files | Lines |
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Currently swrastGetDrawableInfo always initializes w and h, patch
refactors function as x11_get_drawable_info that returns success and
sets the values only if no error happened. Add swrastGetDrawableInfo
wrapper function as expected by DRI extension.
v2: init w,y,w,h in swrastGetDrawableInfo (Eric)
Signed-off-by: Tapani Pälli <[email protected]>
Reported-by: Emil Velikov <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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After a successful wait, we know the buffer ought to be idle.
Chris points out that: "The only caveat here is that bo is global, and
we have a very unlikely (and probably unnoticeable) race condition with
multiple contexts."
Reviewed-by: Chris Wilson <[email protected]>
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RELOC_NEEDS_GGTT is only meaningful on Sandybridge - it's skipped on
other generations - so this has no purpose. Just use rw_bo().
Reviewed-by: Chris Wilson <[email protected]>
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With the reloc domains gone, most of these are basically the same,
and the names don't make much sense anymore. Simplify them to ro_bo(),
rw_bo(), and ggtt_bo().
Reviewed-by: Chris Wilson <[email protected]>
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The GPU reads the shader kernel from the program cache BO. It never
writes it, so using a read-write BO reference makes no sense.
Just make KSP read-only, and drop KSP_ro.
Reviewed-by: Chris Wilson <[email protected]>
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The .f32 was already getting added by emit_intrin_2f_param(). Noticed
when enabling LLVM module verification.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Before, we ended up always calling miptree_create_for_planar_image in
almost all cases because most images have image->planar_format != NULL.
This commit makes us only take that path if we have a multi-planar
format.
Reviewed-by: Daniel Stone <[email protected]>
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An allocation check is already done when the buffer is created at
context creation.
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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This will allow us to call this function from
_mesa_alloc_shared_state() in the case that we run out of memory
part way through allocating the state.
Reviewed-by: Samuel Pitoiset <[email protected]>
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We already expose glMultiDrawElementsBaseVertexEXT as part of the
EXT_draw_elements_base_vertex chunk, so this one can just be removed.
Signed-off-by: Ilia Mirkin <[email protected]>
Acked-by: Samuel Pitoiset <[email protected]>
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There was a previous error in the gl.xml and generated files that
referenced glMultiDrawElementsBaseVertexOES. This function should not
exist, only the EXT-suffixed version should.
Leaving the other headers alone to avoid conflicts with GL 4.6 work.
Signed-off-by: Ilia Mirkin <[email protected]>
Acked-by: Samuel Pitoiset <[email protected]>
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Trivial.
Fixes: a6a6146aa91 "radv: Don't allow fmask swizzling for shareable images."
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Need to take the sample count into account in the depth decompress and
resummarize pipelines and render pass.
Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Signed-off-by: Alex Smith <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Cc: "17.2" <[email protected]>
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Also adds an assert because you never know how the winsys changes, and
multiprocess format differences are annoying.
Fixes: 1e696b962b7 "radv: add separate fmask tile swizzle counter."
Reviewed-by: Dave Airlie <[email protected]>
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Process most new SET packets in parallel with previous draw calls, then
flush caches and wait, start the draw, and do L2 prefetches last.
This decreases the [CP busy / SPI busy] ratio (verified with GRBM perf
counters). In other words, the time window when shaders are idle (between
(the wait and the draw) is much shorter now.
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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so that we don't rely on si_pm4_state_enabled_and_changed, allowing us
to move prefetches after draw calls.
v2: ckear the dirty mask after unbinding shaders
Tested-by: Dieter Nützel <[email protected]> (v1)
Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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I'd like to be able to move the prefetch call site around.
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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also set max_alignment on amdgpu.
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Other ones are either unsupported or don't have any helper
function checks.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
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Otherwise, this extension is not visible to the EGL users who
use the swrast driver.
This will allow the swrast driver to use eglCreateImageKHR,
provided the target is EGL_GL_TEXTURE_2D_KHR or
EGL_GL_RENDERBUFFER_KHR. Note we still have to implement the
create from render buffer path.
v2: add it to optional_core_extensions instead of swrast_core_extensions,
so it's not a requirement (Emil)
v3: Merge egl/dri2 changes together, also add support for
platform_wayland (Emil)
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Marek Olšák <[email protected]> (v2)
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Since the revelant functions have been moved to dri_helpers,
drisw.c can make use of the extension. Note we have version 6
of the extension, since we want to support createImageFromTexture.
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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These functions will be used both by drisw.c and
dri2.c. This patch also moves some headers that can
be shared.
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Although it doesn't seem like a strict requirement of the
code base, we do it when possible and it looks nice.
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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These files provide helper structs and functions for dri2.c and drisw.c,
and name change better conveys that.
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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The make_shareable function deletes the aux buffer and then whacks
aux_usage to ISL_AUX_USAGE_NONE but not unsetting supports_fast_clear.
Since we only look at supports_fast_clear to decide whether or not to do
fast clears, this was causing assertion failures.
Reported-by: Tapani Pälli <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101925
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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The only one of the three remaining flags that has anything whatsoever
to do with layout is TILING_NONE. This commit renames them to
MIPTREE_CREATE_*, documents the meaning of each flag, and makes the
create functions take an actual enum type so GDB will print them nicely.
Reviewed-by: Jordan Justen <[email protected]>
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The only force tiling flag we really care about is LAYOUT_TILING_NONE.
The others don't actually do anything but add confusion.
Reviewed-by: Jordan Justen <[email protected]>
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The implementation of brw_miptree_layout was removed in bf24c3539e4b69.
Reviewed-by: Jordan Justen <[email protected]>
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Originally, I had moved it to the caller to make some things easier when
adding the CCS modifier. However, this broke DRI2 because
intel_process_dri2_buffer calls intel_miptree_create_for_bo but never
calls intel_miptree_alloc_aux. Also, in hindsight, it should be pretty
easy to make the CCS modifier stuff work even if create_for_bo allocates
the CCS when DISABLE_AUX is not set.
Reviewed-by: Jordan Justen <[email protected]>
Cc: "17.2" <[email protected]>
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The flag hasn't affected actual surface layout for some time. The only
purpose it served was to set bo->cache_coherent = false on the BO used
to create the miptree. This is fairly silly because we can just set
that directly from the caller where it makes much more sense.
Reviewed-by: Jordan Justen <[email protected]>
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Reviewed-by: Jordan Justen <[email protected]>
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We rename it to intel_miptree_supports_mcs and make the function
signature match intel_miptree_supports_ccs/hiz. We also move the sample
count check into the function so it returns false for single-sampled
surfaces.
Reviewed-by: Jordan Justen <[email protected]>
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The one caller of is_mcs_supported passes 0 in as the layout_flags
unconditionally.
Reviewed-by: Jordan Justen <[email protected]>
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We were calculating the total height of 2D surfaces by multiplying the
row pitch by the number of slices. This means that we actually request
slightly more space than actually needed since the padding on the last
slice is unnecessary. For tiled surfaces this is not likely to make a
difference. For linear surfaces, on the other hand, this means we may
require additional memory. In particular, this makes the i965 driver
reject EGL imports of buffers which do not have this extra padding.
Reviewed-by: Jordan Justen <[email protected]>
Cc: "17.2" <[email protected]>
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The docs contain a bunch of commentary about the need to pad various
surfaces out to multiples of something or other. However, all of those
requirements are about avoiding GTT errors due to missing pages when the
data port or sampler accesses slightly out-of-bounds. However, because
the kernel already fills all the empty space in our GTT with the scratch
page, we never have to worry about faulting due to OOB reads. There are
two caveats to this:
1) There is some potential for issues with caches here if extra data
ends up in a cache we don't expect due to OOB reads. However,
because we always trash the entire cache whenever we need to move
anything between cache domains, this shouldn't be an issue.
2) There is a potential issue if a surface gets placed at the very top
of the GTT by the kernel. In this case, the hardware could
potentially end up trying to read past the top of the GTT. If it
nicely wraps around at the 48-bit (or 32-bit) boundary, then this
shouldn't be an issue thanks to the scratch page. If it doesn't,
then we need to come up with something to handle it.
Up until some of the GL move to ISL, having the padding code in there
just caused us to harmlessly use a bit more memory in Vulkan. However,
now that we're using ISL sizes to validate external dma-buf images,
these padding requirements are causing us to reject otherwise valid
images due to the size of the BO being too small.
Acked-by: Kenneth Graunke <[email protected]>
Tested-by: Tapani Pälli <[email protected]>
Tested-by: Tomasz Figa <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Cc: "17.2" <[email protected]>
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We can't sample from depth-stencil formats but on gen7 but we can sample
from depth-only formats.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102024
Reviewed-by: Juan A. Suarez Romero <[email protected]>
Cc: [email protected]
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Signed-off-by: Emil Velikov <[email protected]>
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Signed-off-by: Emil Velikov <[email protected]>
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Signed-off-by: Emil Velikov <[email protected]>
(cherry picked from commit 2766ed0d45b2c3397de5cbdfa9cf7e03a0fdfb5d)
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Signed-off-by: Emil Velikov <[email protected]>
(cherry picked from commit 3d48433078cb9501c506d2a15834e8dda1a3caef)
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This ports the workaround from radeonsi, that was missing in radv.
This fixes Talos rendering when MSAA is enabled on my Tahiti card.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Signed-off-by: Dave Airlie <[email protected]>
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