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* Enable throttling in SwapBuffersAxel Davy2013-12-041-1/+13
| | | | | | | | | flush_with_flags, when available, allows the driver to throttle. Using this suppress input lag issues that can be observed in heavy rendering situations on non-intel cards. Signed-off-by: Axel Davy <[email protected]> Cc: "10.0" [email protected]
* egl/wayland: Send commit after flushing the driver contextKristian Høgsberg2013-12-041-2/+1
| | | | | | | | | | This typically won't make a difference, since we only send the requests at wl_display_flush() time. There might be a small race with another thread calling wl_display_flush() after our commit request, but before we flush the DRI driver. Moving the commit below the DRI driver flush call looks more natural and eliminates the small race. Cc: "10.0" [email protected]
* egl/wayland: Flush the wl_display at the end of SwapBuffersAxel Davy2013-12-041-0/+2
| | | | | | | | | | We would like the compositor to receive the commited buffer as soon as possible, so it has the time to treat it, and release old ones. We shouldn't rely on the client to flush the queue for us. Signed-off-by: Axel Davy <[email protected]> Cc: "10.0" [email protected]
* mesa: reduce memory used for short display listsBrian Paul2013-12-041-0/+35
| | | | | | | | | | | | | Display lists allocate memory in chunks of 256 tokens (1KB) at a time. If an app creates many short display lists or uses glXUseXFont() this can waste quite a bit of memory. This patch uses realloc() to trim short lists and reduce the memory used. Also, null/zero-out some list construction fields in _mesa_EndList(). Reviewed-by: Ian Romanick <[email protected]>
* mesa: update/remove display list commentsBrian Paul2013-12-041-16/+5
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: remove gl_dlist_node::next pointer to reduce dlist memory useBrian Paul2013-12-041-8/+10
| | | | | | | Now, sizeof(gl_dlist_node)==4 even on 64-bit systems. This can halve the memory used by some display lists on 64-bit systems. Reviewed-by: Ian Romanick <[email protected]>
* mesa: begin reducing memory used by display listsBrian Paul2013-12-041-172/+252
| | | | | | | | | | | | | | | | | This is a first step in reducing memory used by display lists on 64-bit systems. On 64-bit systems, the gl_dlist_node union type is 8 bytes because of the 'data' and 'next' fields. This causes every display list node/token to occupy 8 bytes instead of 4 as originally designed. This basically doubles the memory used by some display lists on 64-bit systems. The fix is to remove the 64-bit 'data' and 'next' pointer fields from the union and instead store them as a pair of 32-bit values. Easily done with a few helper functions. The next patch will take care of the 'next' field. Reviewed-by: Ian Romanick <[email protected]>
* nouveau: Add lots of comments to the buffer transfer logicIlia Mirkin2013-12-042-4/+71
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: wait on the buf's fence before sticking it into pushbufIlia Mirkin2013-12-042-0/+12
| | | | | | | | This resolves some rendering issues in source games. See https://bugs.freedesktop.org/show_bug.cgi?id=64323 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "9.2 10.0" <[email protected]>
* nouveau: avoid leaking fences while waitingIlia Mirkin2013-12-041-6/+5
| | | | | | | | | This fixes a memory leak in some situations. Also avoids emitting an extra fence if the kick handler does the call to nouveau_fence_next itself. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "9.2 10.0" <[email protected]>
* nv50: fix a small leak on context destroyIlia Mirkin2013-12-041-0/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* docs: put MD5 sums in 9.2.4 relnotes fileBrian Paul2013-12-041-0/+3
| | | | Signed-off-by: Brian Paul <[email protected]>
* docs: use --disable-dri3 for VMware guest driver buildBrian Paul2013-12-041-1/+1
| | | | | | For the time being at least. Suggested by Adrian Rangel. Signed-off-by: Brian Paul <[email protected]>
* mesa: modified _mesa_align_free() to accept NULL pointerSiavash Eliasi2013-12-047-32/+26
| | | | | | | | | | | So that it acts like ordinary free(). This lets us remove a bunch of if statements where the function is called. v2: - Avoiding compile error on MSVC and possible warnings on other compilers. - Added comment regards passing NULL pointer being safe. Reviewed-by: Brian Paul <[email protected]>
* mesa: don't leak performance monitors on context destroyIlia Mirkin2013-12-043-0/+23
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "10.0" <[email protected]>
* nv50: Fix GPU_READING/WRITING bit removalIlia Mirkin2013-12-042-3/+3
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> CC: "9.1, 9.2, 10.0" <[email protected]>
* pipe-loader: Fix llvmpipe.la pathMichel Dänzer2013-12-041-1/+1
| | | | | | Fixes make[3]: *** No rule to make target `.../src/gallium/drivers/softpipe/libllvmpipe.la', needed by `pipe_swrast.la'. Stop.
* i965: Fix BRW_BATCH_STRUCT to specify RENDER_RING, not UNKNOWN_RING.Kenneth Graunke2013-12-031-2/+2
| | | | | | | | | | | | | | | | I missed this in the boolean -> enum conversion. C cheerfully casts false -> 0 -> UNKNOWN_RING. On Gen4-5, this causes the render ring prelude hook to get called in the middle of the batch, which is crazy. BRW_BATCH_STRUCT is not used on Gen6+. Fixes regressions since 395a32717df494353703f3581edcd3ba380f16d6 ("i965: Introduce an UNKNOWN_RING state."). Fixes "fips -v glxgears" on Ironlake. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* Revert "i965: Move brw_emit_query_begin() to the render ring prelude."Kenneth Graunke2013-12-032-7/+3
| | | | | | | | | | | | This reverts commit a4bf7f6b6e612626c4e4fc21507ac213a7ba4b00. It breaks occlusion queries on Gen4-5. Doing this right will likely require larger changes, which should be done at a future date. Some Piglit tests still passed due to other bugs; fixing those revealed this problem. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix OACONTROL assertion failures on Ironlake.Kenneth Graunke2013-12-031-4/+8
| | | | | | | | | | | | | | | I guarded half of the callers to start/stop_oa_counters with generation checks, but missed the other half (which were added later). OACONTROL doesn't exist on Ironlake, so we better not write it. Also, there's no need---Ironlake's performance counters are always running. This patch moves the generation checks into start/stop_oa_counters, rather than requiring the caller to do them. Fixes assertion failures in Piglit's AMD_performance_monitor/measure. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/radeon: use PRIu64 macro for printing uint64_tEmil Velikov2013-12-032-4/+6
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* pipe-loader: build llvmpipe on top of softpipeEmil Velikov2013-12-031-10/+7
| | | | | | | | One can select if they want to fallback to softpipe. Current approach makes this not possible, whereas other targets (dri-swrast) handle this approapriately. Signed-off-by: Emil Velikov <[email protected]>
* mesa: resolve typo DTXn/DXTnEmil Velikov2013-12-031-1/+1
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* automake: include only one copy VERSION in tarballEmil Velikov2013-12-031-1/+0
| | | | | | | | | | | | | The VERSION file is tracked by git (git ls-files), thus adding it to EXTRA_FILES will result in a duplicate copy within the final tarball. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72230 Cc: "10.0" <[email protected]> Reported-by: Patrick Steinhardt <[email protected]> Tested-by: Patrick Steinhardt <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* glx: Add missing null check in gxl/dri2_glx.cJuha-Pekka Heikkila2013-12-031-0/+4
| | | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glx: Check malloc return value before accessing memory in glx/clientattrib.cJuha-Pekka Heikkila2013-12-031-0/+4
| | | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Add extra-alignment for non-msrt fast color clear for all hw (v2)Chad Versace2013-12-031-24/+11
| | | | | | | | | | | | | | | | | | | | | | The BSpec states that the aligment for the non-msrt clear rectangle must be doubled; the BSpec does not restricit the workaround to specific hardware. Commit 9a1a67b applied the workaround to Haswell GT3. Commit 8b659ce expanded the workaround to all Haswell variants. This commit expands it to all hardware. No Piglit regressions on Ivybridge 0x0166. No fixes either. I know no Ivybridge nor Baytrail bug related to this workaround. However, the BSpec says the extra alignment is required, so let's do it. v2: Apply to all hardware, not just gen7. CC: "9.2, 10.0" <[email protected]> CC: Anuj Phogat <[email protected]> Reviewed-by: Paul Berry <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* configure.ac: require libdrm_radeon 2.4.50Marek Olšák2013-12-031-1/+1
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* st/mesa: implement layered framebuffer clear for the clear_with_quad fallbackMarek Olšák2013-12-034-16/+68
| | | | Same approach as in u_blitter.
* gallium/util: implement layered framebuffer clear in u_blitterMarek Olšák2013-12-0310-30/+110
| | | | | | | | | | | | | All bound layers (from first_layer to last_layer) should be cleared. This uses a vertex shader which outputs gl_Layer = gl_InstanceID, so each instance goes to a different layer. By rendering a quad and setting the instance count to the number of layers, it will trivially clear all layers. This requires AMD_vertex_shader_layer (or PIPE_CAP_TGSI_VS_LAYER), which only radeonsi supports at the moment. r600 could do this too. Standard DX11 hardware will have to use a geometry shader though, which has higher overhead.
* gallium: add support for AMD_vertex_shader_layerMarek Olšák2013-12-0316-1/+32
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* radeonsi: add driver support for layered rendering and AMD_vertex_shader_layerMarek Olšák2013-12-034-12/+27
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement OpenGL edge flagsMarek Olšák2013-12-033-6/+48
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* st/mesa: add support for layered framebuffers and consolidate codeMarek Olšák2013-12-036-93/+99
| | | | | | | | | This is a subset of geometry shaders. It's all about setting first_layer and last_layer correctly. Also some code between st_render_texture and update_framebuffer_state is consolidated. It doesn't use rtt_level and derives the level from dimensions instead as the code in st_atom_framebuffer.c did.
* mesa: expose AMD_vertex_shader_layer in the core profile onlyMarek Olšák2013-12-031-1/+1
| | | | | | | It needs glFramebufferTexture, which isn't available in the compatibility profile. Reviewed-by: Ian Romanick <[email protected]>
* egl: add HAVE_LIBDRM define, fix EGL X11 platformTapani Pälli2013-12-032-6/+8
| | | | | | | | | | | | | | | | | | | | Commit a594cec broke EGL X11 backend by adding dependency between X11 and DRM backends requiring HAVE_EGL_PLATFORM_DRM defined for X11. This patch fixes the issue by adding additional define for libdrm detection independent of which backend is being compiled. Tested by compiling Mesa with '--with-egl-platforms=x11' and running es2gears_x11 + glbenchmark2.7 successfully. v2: return true for dri2_auth if running without libdrm (Samuel) v3: check libdrm when building EGL drm platform + AM_CFLAGS fix (Emil) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72062 Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Chad Versace <[email protected]> Cc: Samuel Thibault <[email protected]> Cc: [email protected]
* freedreno: Add a few texture formatsAndreas Heider2013-12-021-0/+3
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* i965: Skip the register write check on Broadwell.Kenneth Graunke2013-12-021-1/+5
| | | | | | | | | MI_STORE_REGISTER_MEM has to take a 48-bit address, so the existing code doesn't work. But supposedly Broadwell has a register whitelist and just works out of the box anyway, so there's no need to check. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix texture border color on Broadwell.Kenneth Graunke2013-12-021-1/+11
| | | | | | | | | | | | The Gen7 sampler state code still works. Increasing the alignment to 64 bytes makes bit 5 zero, which is good because it's now reserved. Since we don't use the new filter bits, we can leave those as zero too, which means we don't need to update the code to update the pointer. (We probably should anyway, for clarity, but alas, another day.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't use MACH for integer multiplies on Gen8+.Kenneth Graunke2013-12-022-2/+2
| | | | | | | | | | | The documentation is really hard to follow, but apparently a 32-bit x 32-bit multiply just works without the MACH macro. The macro apparently is only necessary to get the full 64-bit value. Fixes Piglit tests [vf]s-op-mult-int-int.shader_test. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix texture swizzling on Broadwell.Kenneth Graunke2013-12-021-1/+1
| | | | | | | | Like Haswell, we do this in SURFACE_STATE rather than shader workarounds. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Set vertical alignment unit to 4 on Broadwell.Kenneth Graunke2013-12-021-0/+6
| | | | | | | | | | | | Broadwell doesn't support a surface vertical alignment of 2. It only supports VALIGN_4, VALIGN_8, or VALIGN_16. I chose 4 since it's the least wasteful. v2: Replace my comment with a better one from Eric. Move Broadwell checks earlier so it's more obvious that "return 2" won't be hit. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/vs: Always store pull constant offsets in GRFs on Gen8.Kenneth Graunke2013-12-021-1/+15
| | | | | | | | | | | | We need to SEND from a GRF, and we can only obtain those prior to register allocation. This allows us to do pull constant loads without the MRF hack. v2: Reword comments (suggested by Paul). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/vs: Don't copy propagate into SEND-from-GRF messages.Kenneth Graunke2013-12-021-0/+3
| | | | | | | | SEND can't deal with swizzles, source modifiers, and so on. This should avoid problems with VS pull constant loads on Broadwell. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* clover: Fix missing minus sign in 'iterator_adaptor::operator-='.Francisco Jerez2013-12-021-1/+1
| | | | | The method is currently unused, this probably doesn't fix anything at this point.
* i965/hsw: Apply non-msrt fast color clear w/a to all HSW GTsChad Versace2013-12-021-6/+12
| | | | | | | | | | | | | | | | | | | | | | Pre-patch, the workaround was applied to only HSW GT3. However, the workaround also fixes render corruption on the HSW GT1 Chromebook, codenamed Falco. Also, update the BSpec quote that discusses the workaround to reflect the latest BSpec. The BSpec states that the workaround is required for Ivybridge and Baytrail as well as Haswell. But, we apply the workaround to only Haswell because (a) we suspect that is the only hardware where it is actually required and (b) we haven't yet validated the workaround for the other hardware. CC: "9.2, 10.0" <[email protected]> CC: Anuj Phogat <[email protected]> OTC-Tracker: CHRMOS-812 Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* glsl: Simplify the built-in function linking code.Kenneth Graunke2013-12-017-36/+31
| | | | | | | | | | | | | | | | | | Previously, we stored an array of up to 16 additional shaders to link, as well as a count of how many each shader actually needed. Since the built-in functions rewrite, all the built-ins are stored in a single shader. So all we need is a boolean indicating whether a shader needs to link against built-ins or not. During linking, we can avoid creating the temporary array if none of the shaders being linked need built-ins. Otherwise, it's simply a copy of the array that has one additional element. This is much simpler. This patch saves approximately 128 bytes of memory per gl_shader object. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Create an accessor for the built-in function shader.Kenneth Graunke2013-12-012-2/+13
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Drop crazy looping from no_matching_function_error().Kenneth Graunke2013-12-011-16/+23
| | | | | | | | | | | | Since the built-in functions rewrite, num_builtins_to_link is always either 0 or 1, so we don't need tho crazy loop starting at -1 with a special case. All we need to do is print the prototypes from the current shader, and the single built-in function shader (if present). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Merge "candidates are: " message to the previous line.Kenneth Graunke2013-12-011-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Previously, when we hit a "no matching function" error, it looked like: 0:0(0): error: no matching function for call to `cos()' 0:0(0): error: candidates are: float cos(float) 0:0(0): error: vec2 cos(vec2) 0:0(0): error: vec3 cos(vec3) 0:0(0): error: vec4 cos(vec4) Now it looks like: 0:0(0): error: no matching function for call to `cos()'; candidates are: 0:0(0): error: float cos(float) 0:0(0): error: vec2 cos(vec2) 0:0(0): error: vec3 cos(vec3) 0:0(0): error: vec4 cos(vec4) This is not really any worse and removes the need for the prefix variable. It will also help with the next commit's refactoring. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
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