aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* intel/compiler: Clear accumulator register before EOTSagar Ghuge2020-01-271-0/+18
* pan/midgard: Remove float_bitcastAlyssa Rosenzweig2020-01-271-12/+0
* radv: do not allow sparse resources with multi-planar formatsSamuel Pitoiset2020-01-271-0/+6
* panfrost/midgard: Prettify embedded constant printsBoris Brezillon2020-01-273-68/+292
* panfrost/midgard: Add a condense_writemask() helperBoris Brezillon2020-01-271-0/+22
* aco: fix literal application with v_cndmask_b32/v_addc_co_u32/etcRhys Perry2020-01-271-0/+3
* aco: always add sgprs to sgpr_ids when choosing literalsRhys Perry2020-01-271-3/+5
* aco: fix operand to scc when selecting SGPR ufind_msb/ifind_msbRhys Perry2020-01-271-1/+1
* aco: fix WaR check for >64-bit FLAT/GLOBAL instructionsRhys Perry2020-01-271-2/+2
* pan/midgard: Handle tag 0x4 as textureAlyssa Rosenzweig2020-01-271-2/+2
* pan/midgard: Validate barriers use a barrier tagAlyssa Rosenzweig2020-01-271-1/+5
* pan/midgard: Disassemble barrier instructionsAlyssa Rosenzweig2020-01-272-3/+60
* pan/midgard: Record TEXTURE_OP_BARRIERAlyssa Rosenzweig2020-01-272-0/+4
* pan/decode: Drop MFBD compute shader stuffAlyssa Rosenzweig2020-01-271-4/+7
* panfrost: Don't copy uniforms when the size is zeroIcecream952020-01-271-1/+1
* radv/winsys: set IB flags prior to submit in the sysmem pathFlorian Will2020-01-271-0/+2
* docs: document AMD_DEBUG variablePierre-Eric Pelloux-Prayer2020-01-271-0/+122
* radeonsi: move AMD_DEBUG tests to AMD_TESTPierre-Eric Pelloux-Prayer2020-01-272-11/+23
* gallivm/nir: add missing break for isub.Dave Airlie2020-01-271-1/+1
* isl: add gen12 comment about CCS for linear tilingLionel Landwerlin2020-01-261-0/+10
* isl: drop CCS row pitch requirement for linear surfacesLionel Landwerlin2020-01-261-15/+21
* intel: Implement Gen12 workaround for array textures of size 1Lionel Landwerlin2020-01-266-1/+151
* intel/isl: Allow CCS_E on more formatsJason Ekstrand2020-01-251-23/+4
* intel/blorp: Add support for CCS_E copies with UNORM formatsJason Ekstrand2020-01-251-7/+38
* lima/ppir: fix src read mask swizzlingErico Nunes2020-01-252-11/+13
* lima/ppir: split ppir_op_undef into undef and dummy againErico Nunes2020-01-253-2/+9
* lima/ppir: fix ssa undef emitErico Nunes2020-01-252-8/+0
* lima/ppir: handle write to dead registers in ppirErico Nunes2020-01-252-6/+12
* radeonsi: fix a regression since the addition of si_shader_llvm_vs.cMarek Olšák2020-01-251-3/+4
* radeonsi: make screen available to shader part compilationMarek Olšák2020-01-251-0/+4
* anv: Rework CCS memory handling on TGL-LPJason Ekstrand2020-01-256-70/+232
* anv: Make anv_vma_alloc/free a lot dumberJason Ekstrand2020-01-253-69/+80
* anv: Make AUX table invalidate a PIPE_* bitJason Ekstrand2020-01-255-34/+41
* anv: Add another align_down helperJason Ekstrand2020-01-251-2/+8
* isl: Add a helper for calculating subimage memory rangesJason Ekstrand2020-01-252-0/+71
* anv: Delete a redundant calculationJason Ekstrand2020-01-251-3/+0
* intel/aux-map: Factor out some useful helpersJason Ekstrand2020-01-252-28/+91
* intel/aux-map: Add some #definesJason Ekstrand2020-01-252-14/+25
* radeonsi: expose shader cache stats to the HUDMarek Olšák2020-01-242-8/+46
* radeonsi: print shader cache stats with AMD_DEBUG=cache_statsMarek Olšák2020-01-246-6/+30
* radeonsi: restructure si_shader_cache_load_shaderMarek Olšák2020-01-241-39/+31
* radeonsi: use the live shader cacheMarek Olšák2020-01-247-25/+46
* gallium/util: add a cache of live shaders for shader CSO deduplicationMarek Olšák2020-01-244-0/+273
* util/simple_mtx: add a missing include to get ASSERTEDMarek Olšák2020-01-241-0/+1
* intel/compiler: Add names for SHADER_OPCODE_[IU]SUB_SATCaio Marcelo de Oliveira Filho2020-01-241-0/+4
* anv: Always initialize target_stencil_layoutCaio Marcelo de Oliveira Filho2020-01-241-2/+4
* anv: Replace aux_surface.isl.size_B checks with aux_usage checksJason Ekstrand2020-01-243-13/+11
* anv: Rework the meaning of anv_image::planes[]::aux_usageJason Ekstrand2020-01-244-27/+13
* radv: print NIR shaders after lowering FS inputs/outputsSamuel Pitoiset2020-01-241-3/+5
* intel/isl: Add a hack for the Gen12 A0 texture buffer bugJason Ekstrand2020-01-241-0/+19
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 09:53:50 +0000