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* radeonsi/nir: fix crash in test involving the sample maskNicolai Hähnle2018-04-201-1/+2
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi/nir: set FS properties only when scanning a fragment shaderNicolai Hähnle2018-04-201-1/+2
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* ac/nir: fix atomic compare-and-swapNicolai Hähnle2018-04-201-0/+1
| | | | | | | | | The LLVM instruction returns { i32, i1 }, where the i1 indicates success. We're only interested in the first part, which is the loaded value. Fixes dEQP-GLES31.functional.compute.shared_var.atomic.compswap.* Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: fix error paths of si_texture_transfer_mapNicolai Hähnle2018-04-201-13/+12
| | | | | | | trans is zero-initialized, but trans->resource is setup immediately so needs to be dereferenced. Reviewed-by: Timothy Arceri <[email protected]>
* glsl: prevent spurious Valgrind errors when serializing NIRNicolai Hähnle2018-04-201-2/+4
| | | | | | | | It looks as if the structure fields array is fully initialized below, but in fact at least gcc in debug builds will not actually overwrite the unused bits of bit fields. Reviewed-by: Timothy Arceri <[email protected]>
* clover: Fix host access validation for sub-buffer creationAaron Watry2018-04-191-2/+7
| | | | | | | | | | | | | | | | From CL 1.2 Section 5.2.1: CL_INVALID_VALUE if buffer was created with CL_MEM_HOST_WRITE_ONLY and flags specify CL_MEM_HOST_READ_ONLY , or if buffer was created with CL_MEM_HOST_READ_ONLY and flags specify CL_MEM_HOST_WRITE_ONLY , or if buffer was created with CL_MEM_HOST_NO_ACCESS and flags specify CL_MEM_HOST_READ_ONLY or CL_MEM_HOST_WRITE_ONLY . Fixes CL 1.2 CTS test/api get_buffer_info v2: Correct host_access_flags check (Francisco) Signed-off-by: Aaron Watry <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* nir: Offset vertex_id by first_vertex instead of base_vertexNeil Roberts2018-04-196-13/+6
| | | | | | | | | | | | | | | | | | base_vertex will be zero for non-indexed calls and in that case we need vertex_id to be offset by the ‘first’ parameter instead. That is what we get with first_vertex. This is true for both GL and Vulkan. The freedreno driver is also setting vertex_id_zero_based on nir_options. In order to avoid breakage this patch switches the relevant code to handle SYSTEM_VALUE_FIRST_VERTEX so that it can retain the same behavior. v2: change a3xx/fd3_emit.c and a4xx/fd4_emit.c from SYSTEM_VALUE_BASE_VERTEX to SYSTEM_VALUE_FIRST_VERTEX (Kenneth). Reviewed-by: Ian Romanick <[email protected]> Cc: Rob Clark <[email protected]> Acked-by: Marek Olšák <[email protected]>
* spirv: Lower BaseVertex to FIRST_VERTEX instead of BASE_VERTEXNeil Roberts2018-04-193-5/+18
| | | | | | | | | | | | | The base vertex in Vulkan is different from GL in that for non-indexed primitives the value is taken from the firstVertex parameter instead of being set to zero. This coincides with the new SYSTEM_VALUE_FIRST_VERTEX instead of BASE_VERTEX. v2 (idr): Add comment describing why SYSTEM_VALUE_FIRST_VERTEX is used for SpvBuiltInBaseVertex. Suggested by Jason. Reviewed-by: Ian Romanick <[email protected]> [v1] Reviewed-by: Jason Ekstrand <[email protected]>
* intel: Handle firstvertex in an identical way to BaseVertexAntia Puentes2018-04-197-13/+35
| | | | | | | | | | | | Until we set gl_BaseVertex to zero for non-indexed draw calls both have an identical value. The Vertex Elements are kept like that: * VE 1: <BaseVertex/firstvertex, BaseInstance, VertexID, InstanceID> * VE 2: <Draw ID, 0, 0, 0> v2 (idr): Mark nir_intrinsic_load_first_vertex as "unreachable" in emit_system_values_block and fs_visitor::nir_emit_vs_intrinsic.
* intel/compiler: Add a uses_firstvertex flagNeil Roberts2018-04-192-0/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* compiler: Add SYSTEM_VALUE_FIRST_VERTEX and instrinsicsAntia Puentes2018-04-195-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This VS system value will contain the value passed as <basevertex> for indexed draw calls or the value passed as <first> for non-indexed draw calls. It can be used to calculate the gl_VertexID as SYSTEM_VALUE_VERTEX_ID_ZERO_BASE plus SYSTEM_VALUE_FIRST_VERTEX. From the OpenGL 4.6 spec, 10.4 "Drawing Commands Using Vertex Arrays": - Page 352: "The index of any element transferred to the GL by DrawArraysOneInstance is referred to as its vertex ID, and may be read by a vertex shader as gl_VertexID. The vertex ID of the ith element transferred is first + i." - Page 355: "The index of any element transferred to the GL by DrawElementsOneInstance is referred to as its vertex ID, and may be read by a vertex shader as gl_VertexID. The vertex ID of the ith element transferred is the sum of basevertex and the value stored in the currently bound element array buffer at offset indices + i." Currently the gl_VertexID calculation uses SYSTEM_VALUE_BASE_VERTEX but this will have to change when the value of gl_BaseVertex is fixed. Currently its value is broken for non-indexed draw calls because it must be zero but we are setting it to <first>. v2: use SYSTEM_VALUE_FIRST_VERTEX as name for the value, instead of SYSTEM_VALUE_BASE_VERTEX_ID (Kenneth). v3 (idr): Rebase on Rob Clark converting nir_intrinsics.h to be generated. Reformat commit message to 72 columns. Reviewed-by: Neil Roberts <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* meson: Build st_tests_common with gtestMike Lothian2018-04-191-1/+1
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106131 Fixes: 34cb4d0ebc1 ("meson: build tests for gallium mesa state tracker") Signed-off-by: Mike Lothian <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* radv: Add Vega M support.Bas Nieuwenhuizen2018-04-194-2/+11
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add bound checking workaround for dynamic buffers.Bas Nieuwenhuizen2018-04-193-1/+5
| | | | | | | I have seen a few applications and games do the dynamic buffer bounds incorrectly, this make it easier to work around, e.g. for debugging. Reviewed-by: Samuel Pitoiset <[email protected]>
* svga: Fix incorrect advertizing of EGL_KHR_gl_colorspaceThomas Hellstrom2018-04-191-1/+1
| | | | | | | | | | | | | | | | | | | When advertizing this extension, egl_dri2 uses the DRI2_RENDERER_QUERY extension to query whether an sRGB format is supported. That extension will query our driver with the BIND flag PIPE_BIND_RENDER_TARGET rather than PIPE_BIND_DISPLAY_TARGET which is used when building the configs. We only return the correct value for PIPE_BIND_DISPLAY_TARGET. The inconsistency causes EGL to crash at surface initialization if sRGB is not supported. Fix this by supporting both bind flags. Testing done: piglit egl_gl_colorspace srgb Cc: <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* swr: Fix include for createPromoteMemoryToRegisterPassMike Lothian2018-04-191-0/+3
| | | | | | | | | | | | Include llvm/Transforms/Utils.h with the newest LLVM 7 v2: Include with " " rather than < > (Vinson Lee) v3: Use LLVM_VERSION_MAJOR rather than HAVE_LLVM (George Kyriazis) Signed-of-by: Mike Lothian <[email protected]> Tested-by: Vinson Lee <[email protected]> Reviewed-By: George Kyriazis <[email protected]>
* radv: enable DCC for MSAA 2x textures on VI under an optionSamuel Pitoiset2018-04-194-1/+13
| | | | | | | | | | | | | | | | This can be enabled with RADV_PERFTEST=dccmsaa. DCC for MSAA textures is actually not as easy to implement. It looks like there is some corner cases. I will improve support incrementally. Vega support, as well as Polaris improvements, will be added later. No CTS changes on Polaris using RADV_DEBUG=zerovram and RADV_PERFTEST=dccmsaa. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: decompress DCC for multisampled source images before resolvingSamuel Pitoiset2018-04-194-4/+18
| | | | | | | | | Multisampled source images (ie. color attachments) can be now DCC compressed, so the driver needs to perform a DCC decompression pass before resolving Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add a workaround for fast clears with DCC and MSAA texturesSamuel Pitoiset2018-04-191-0/+9
| | | | | | | | This should be fixed at some point in order to improve performance. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allocate CMASK for DCC fast clear with MSAASamuel Pitoiset2018-04-191-0/+7
| | | | | | | | CMASK is required because it should be cleared to 0xCCCCCCCC for MSAA textures. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: implement fast color clear for DCC with MSAASamuel Pitoiset2018-04-191-1/+16
| | | | | | | | When DCC is enabled with MSAA textures, CMASK should be cleared to 0xCCCCCCCC. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make sure to sync after resolving using the compute pathSamuel Pitoiset2018-04-191-0/+3
| | | | | | | | | | | | | | | This fixes some random CTS failures: dEQP-VK.renderpass.multisample.*. Performing a fast-clear eliminate is still useless, but it seems that we need to sync. Found while running CTS with RADV_DEBUG=zerovram. Fixes: 56a171a499c ("radv: don't fast-clear eliminate after resolving a subpass with compute") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: dump the SHA1 of SPIRV in the hang reportSamuel Pitoiset2018-04-191-1/+8
| | | | | | | | Might be useful for debugging purposes, especially when we want to replace a shader on the fly. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Enable VK_EXT_descriptor_indexing.Bas Nieuwenhuizen2018-04-183-0/+63
| | | | | | | This adds everything except non-uniform indexing, which needs a bit more work and testing. Reviewed-by: Samuel Pitoiset <[email protected]>
* spirv: Add support for runtime descriptor array cap.Bas Nieuwenhuizen2018-04-182-0/+5
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* spirv: Add support for VK_EXT_descriptor_indexing uniform indexing caps.Bas Nieuwenhuizen2018-04-182-0/+7
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Support allocating variable size descriptor sets.Bas Nieuwenhuizen2018-04-181-4/+17
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add support for variable descriptor set layouts.Bas Nieuwenhuizen2018-04-182-1/+30
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix GetDescriptorSetLayoutSupport.Bas Nieuwenhuizen2018-04-181-3/+0
| | | | | | | The continue means we do alignment differently than during creation, making the buffer smaller than expected. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Use sorted bindings for set layout creation.Bas Nieuwenhuizen2018-04-181-2/+41
| | | | | | | | Previously we did not care about havin the set storage in order, but for variable descriptor count we want the highest binding at the end of the storage. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Don't store buffer references in the descriptor set.Bas Nieuwenhuizen2018-04-185-82/+13
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Keep a global BO list for VkMemory.Bas Nieuwenhuizen2018-04-184-39/+146
| | | | | | | | | | | | | | With update after bind we can't attach bo's to the command buffer from the descriptor set anymore, so we have to have a global BO list. I am somewhat surprised this works really well even though we have implicit synchronization in the WSI based on the bo list associations and with the new behavior every command buffer is associated with every swapchain image. But I could not find slowdowns in games because of it. Reviewed-by: Samuel Pitoiset <[email protected]>
* spirv: Update spirv.h to 12f8de9f04327336b699b1b80aa390ae7f9ddbf4Bas Nieuwenhuizen2018-04-182-4/+183
| | | | Acked-by: Samuel Pitoiset <[email protected]>
* i965: Fix shadow batches to be the same size as the real BO.Kenneth Graunke2018-04-181-1/+4
| | | | | | | | | | | | | | brw_bo_alloc may round up our allocation size to the next bucket size. In this case, we would malloc a shadow buffer that was the original intended size, but use bo->size (the larger size) for all of our checks. This could cause us to run off the end of the shadow buffer. v2: Actually use the new BO size (caught by Lionel) Reported-by: James Xiong <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Fixes: c7dcee58b5fe183e1653c13bff6a212f0d157b29 (i965: Avoid problems from referencing orphaned BOs after growing.)
* glsl_to_tgsi: try harder to lower unsupported ir_binop_vector_extractMarek Olšák2018-04-181-0/+5
| | | | | | | This fixes some piglits. Cc: 18.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/vce: disable vce dual pipe on VegaMLeo Liu2018-04-181-1/+2
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: add support for VegaMMarek Olšák2018-04-189-2/+19
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* amd/addrlib: add support for VegaMMarek Olšák2018-04-184-0/+41
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix a hang with an empty first IBMarek Olšák2018-04-181-3/+4
| | | | | | | | This packet causes the no-op IB detection to fail, so the IB is always submitted. Also fix the no-op IB detection by moving the begin call. Cc: 18.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* meson: build graw testsDylan Baker2018-04-185-0/+108
| | | | | | | This only enables the null and xlib target, so no windows support yet. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* meson: build tests for gallium mesa state trackerDylan Baker2018-04-182-0/+43
| | | | | | | v2: - Fix typo Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* meson: build gallium unit testsDylan Baker2018-04-182-0/+34
| | | | | | | | v2: - gate unit tests on swrast being enabled (Eric A) v3: - rebase on libtrace being merged with gallium auxiliary Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (v2)
* meson: Build gallium trivial testsDylan Baker2018-04-184-4/+54
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* meson: Remove TODO about mesa/main testsDylan Baker2018-04-181-2/+0
| | | | | | | They're already done. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* meson: enable glcpp testDylan Baker2018-04-181-1/+17
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glcpp/tests: Convert shell scripts to a python scriptDylan Baker2018-04-183-267/+223
| | | | | | | | | | | This ports glcpp-test.sh and glcpp-test-cr-lf.sh to a python script that accepts arguments for each line ending type. This should allow for better reporting to users. v2: - Use $PYTHON2 to be consistent with other tests in mesa Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl/tests: Remove unused compare_ir.py scriptDylan Baker2018-04-181-58/+0
| | | | Signed-off-by: Dylan Baker <[email protected]>
* meson: enable optimization-testDylan Baker2018-04-181-0/+5
| | | | Signed-off-by: Dylan Baker <[email protected]>
* glsl/tests: Convert optimization-test.sh to pure pythonDylan Baker2018-04-184-238/+215
| | | | | | | | | | | This patch converts optimization-test.sh to python, in this process it removes external shell dependencies including diff. It replaces the python script that generates shell scripts with a python library that generates test cases and runs them using subprocess. v2: - use $PYTHON2 to be consistent with other tests in mesa Signed-off-by: Dylan Baker <[email protected]>
* meson: run glsl compiler warnings testDylan Baker2018-04-181-1/+9
| | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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