aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* glsl: add ARB_shader_ballot builtin functionsNicolai Hähnle2017-04-051-0/+77
* glsl: add ARB_shader_ballot operationsNicolai Hähnle2017-04-054-0/+38
* glsl: add ARB_shader_ballot enableNicolai Hähnle2017-04-052-0/+3
* mesa: add GL_ARB_shader_ballot boilerplateNicolai Hähnle2017-04-053-1/+3
* swr: automake: add gen_common.py to the tarballEmil Velikov2017-04-051-0/+1
* intel: genxml: automake: include gen_bits_header.py in the tarballEmil Velikov2017-04-051-0/+1
* intel: genxml: automake: polish automake rulesEmil Velikov2017-04-051-2/+2
* amd/addrlib: automake: add all headers to the tarballEmil Velikov2017-04-051-0/+2
* radeonsi: enable ARB_sparse_bufferNicolai Hähnle2017-04-053-2/+12
* radeonsi: disable SDMA clears and copies for sparse buffersNicolai Hähnle2017-04-053-4/+11
* gallium/radeon: implement pipe->resource_commitNicolai Hähnle2017-04-051-0/+35
* gallium/radeon: transfers and invalidation for sparse buffersNicolai Hähnle2017-04-051-10/+24
* gallium/radeon: implement sparse buffer creationNicolai Hähnle2017-04-051-0/+2
* winsys/amdgpu: sparse buffer debugging helpersNicolai Hähnle2017-04-051-0/+61
* winsys/amdgpu: take fences when freeing a backing bufferNicolai Hähnle2017-04-051-3/+11
* winsys/amdgpu: add sparse buffers to CSNicolai Hähnle2017-04-052-16/+140
* winsys/amdgpu: sparse buffer creation / destruction / commitmentNicolai Hähnle2017-04-051-1/+400
* winsys/amdgpu: add sparse buffer data structuresNicolai Hähnle2017-04-052-1/+46
* winsys/amdgpu: extend amdgpu_add_fence to allow adding multiple fencesNicolai Hähnle2017-04-052-11/+27
* winsys/amdgpu: build handles and flags list late on submit threadNicolai Hähnle2017-04-052-17/+28
* winsys/amdgpu: share common code in amdgpu_add_fence_dependenciesNicolai Hähnle2017-04-051-21/+17
* winsys/amdgpu: extract amdgpu_do_add_real_bufferNicolai Hähnle2017-04-051-8/+18
* winsys/radeon: sparse buffers will not be supportedNicolai Hähnle2017-04-051-0/+2
* radeon/winsys: add sparse buffer interfaceNicolai Hähnle2017-04-051-0/+17
* st/mesa: plumbing for sparse buffersNicolai Hähnle2017-04-051-0/+20
* st/mesa: enable ARB_sparse_buffer when supportedNicolai Hähnle2017-04-051-0/+4
* trace: add resource_commit pass-throughNicolai Hähnle2017-04-051-0/+20
* ddebug: add resource_commit pass-throughNicolai Hähnle2017-04-051-0/+11
* gallium: add sparse buffer interface and capabilityNicolai Hähnle2017-04-0519-0/+58
* mesa: implement sparse buffer commitmentNicolai Hähnle2017-04-052-0/+76
* mesa: implement sparse storage buffer allocationNicolai Hähnle2017-04-051-6/+23
* mesa: implement SPARSE_BUFFER_PAGE_SIZE_ARBNicolai Hähnle2017-04-053-0/+7
* mesa: Add GL_ARB_sparse_buffer boilerplateNicolai Hähnle2017-04-058-0/+59
* configure.ac: require libdrm_amdgpu 2.4.77Nicolai Hähnle2017-04-051-1/+1
* mesa: Replace program locks with atomic inc/dec.Matt Turner2017-04-053-15/+3
* anv: Advertise larger heap sizesJason Ekstrand2017-04-043-14/+75
* anv: Add support for 48-bit addressesJason Ekstrand2017-04-045-0/+54
* anv: Replace anv_bo::is_winsys_bo with a uint32_t flagsJason Ekstrand2017-04-043-9/+11
* i965/blorp: Align vertex buffers to 64BJason Ekstrand2017-04-041-1/+13
* anv/blorp: Align vertex buffers to 64BJason Ekstrand2017-04-041-1/+14
* anv: Query the kernel for reset statusJason Ekstrand2017-04-044-40/+107
* anv: Check for device loss at the end of WaitForFencesJason Ekstrand2017-04-041-5/+14
* anv/pipeline: Properly handle unset gl_Layer and gl_ViewportIndexJason Ekstrand2017-04-041-3/+24
* i965/fs: Always provide a default LOD of 0 for TXS and TXLJason Ekstrand2017-04-041-9/+9
* mesa: Require mipmap completeness for glCopyImageSubData(), sometimes.Kenneth Graunke2017-04-041-2/+23
* libgl-xlib: Link with libunwind.Vinson Lee2017-04-041-1/+2
* intel/isl: Refactor and clerify gen8 alignment calculationsJason Ekstrand2017-04-041-15/+49
* drirc: Set glsl_zero_init for Kerbal Space Program.Francisco Jerez2017-04-041-0/+8
* intel: tools: add aubinator_error_decode toolLionel Landwerlin2017-04-045-1/+766
* intel: genxml: add RING_BUFFER_CTL registersLionel Landwerlin2017-04-045-0/+272