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* anv: Add support for the SYNC_FD handle type for fencesJason Ekstrand2017-08-284-11/+87
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Implement VK_KHR_external_fenceJason Ekstrand2017-08-283-5/+161
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Use DRM sync objects to back fences whenever possibleJason Ekstrand2017-08-284-9/+139
| | | | | | | | | In order to implement VK_KHR_external_fence, we need to back our fences with something that's shareable. Since the kernel wait interface for sync objects already supports waiting for multiple fences in one go, it makes anv_WaitForFences much simpler if we only have one type of fence. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/gem: Add support for syncobj wait and resetJason Ekstrand2017-08-283-0/+87
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/gem: Add a flags parameter to syncobj_createJason Ekstrand2017-08-284-5/+5
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* drm-uapi: Update headers from drm-nextJason Ekstrand2017-08-285-9/+124
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* vulkan/util: Add a vk_zalloc helperJason Ekstrand2017-08-281-0/+14
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Rename anv_fence_state to anv_bo_fence_stateJason Ekstrand2017-08-283-18/+18
| | | | | | It only applies to legacy BO fences. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Pull the guts of anv_fence into anv_fence_implJason Ekstrand2017-08-283-49/+159
| | | | | | | This is just a refactor, similar to what we did for semaphores, in preparation for handling VK_KHR_external_fence. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/wsi: Use QueueSubmit to trigger the fence in AcquireNextImageJason Ekstrand2017-08-281-3/+6
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Rework fences to work more like BO semaphoresJason Ekstrand2017-08-283-68/+51
| | | | | | | | | | This commit changes fences to work a bit more like BO semaphores. Instead of the fence being a batch, it's simply a BO that gets added to the validation list for the last execbuf call in the QueueSubmit operation. It's a bit annoying finding the last submit in the execbuf but this allows us to avoid the dummy execbuf. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/queue: Allow temporary import of SYNC_FD semaphoresJason Ekstrand2017-08-281-3/+0
| | | | | | | | | | | | | | | | | | | | We didn't allow them before because it didn't look like the spec allowed it. It certainly doesn't make much sense. However, there are CTS tests that apparently hit this. What the spec actually says is: "Importing a payload using handle types with copy transference creates a duplicate copy of the payload at the time of import, but makes no further reference to it. Fence signaling, waiting, and resetting operations performed on the target of copy imports must not affect any other fence or payload." A SYNC_FD has copy transference but the import may be temporary or permanent. If you do a permanent import of something with copy transference, I guess it's supposed to work and end up resetting the permanent state. In any case, there seems to be no real harm in allowing it, so why not. Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Fix whitespace issues in intel_buffer_objects.c.Kenneth Graunke2017-08-281-31/+29
| | | | Convert tabs to spaces and rewrap one long line.
* radeonsi: stop leaking nirTimothy Arceri2017-08-291-0/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/nir: remove misleading conditionGrazvydas Ignotas2017-08-291-1/+1
| | | | | | | | | location is never set to INTERP_SAMPLE, and Nicolai comments: "... that part is misleading. location refers to the base location, not the final location of the sample, and it can never be INTERP_SAMPLE." Suggested-by: Nicolai Hähnle <[email protected]> Signed-off-by: Grazvydas Ignotas <[email protected]>
* ac/nir: silence maybe-uninitialized warningsGrazvydas Ignotas2017-08-291-6/+9
| | | | | | | | | | These are likely false positives, but are also annoying because they show up on every "make install", which causes ac_nir_to_llvm to be rebuilt here. Initializing those variables to NULL should be harmless even when unnecessary. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: clear dynamic_shader_stages on createGrazvydas Ignotas2017-08-291-0/+1
| | | | | | | | Valgrind reports it's being used uninitialized. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd: add .editorconfigGrazvydas Ignotas2017-08-292-0/+6
| | | | | | | | | amd/common/ and amd/vulkan/ are using tabs for indent, which doesn't match the settings in root .editorconfig, so let's override. Signed-off-by: Grazvydas Ignotas <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rewrite late alloc VS limit computationMarek Olšák2017-08-281-12/+25
| | | | | | This is still very simple, but it's better than before. Loosely ported from Vulkan.
* gallium/radeon: set EVENT_WRITE_EOP.INT_SEL = wait for write confirmationMarek Olšák2017-08-282-3/+12
| | | | | | | Ported from Vulkan. Not sure what this is good for.. maybe write confirmation from L2 flushes? Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_threaded: rename IGNORE_VALID_RANGE -> NO_INFER_UNSYNCHRONIZEDMarek Olšák2017-08-283-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_threaded: disallow discard_range if map_buffer is unsynchronizedMarek Olšák2017-08-281-1/+3
| | | | | | | The discard range codepath takes precedence, so if we get both unsynchronized and discard_range, choose unsynchronized. Reviewed-by: Nicolai Hähnle <[email protected]>
* nir: Fix system_value_from_intrinsic for subgroupsJason Ekstrand2017-08-281-4/+4
| | | | | | | A couple of the cases were backwards Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* nir: Fix some whatespaceJason Ekstrand2017-08-281-5/+5
| | | | | | Somehow tabs got in there... Reviewed-by: Matt Turner <[email protected]>
* radeonsi: correct maximum wave count per SIMDMarek Olšák2017-08-281-1/+12
| | | | | | v2: don't special-case Tonga and Iceland. Reviewed-by: Nicolai Hähnle <[email protected]>
* docs: update calendar, add news item and link release notes for 17.1.8Andres Gomez2017-08-283-7/+8
| | | | Signed-off-by: Andres Gomez <[email protected]>
* docs: add sha256 checksums for 17.1.8Andres Gomez2017-08-281-1/+2
| | | | | Signed-off-by: Andres Gomez <[email protected]> (cherry picked from commit 44e008e85efe141087d8ebe52e273e0020029481)
* docs: add release notes for 17.1.8Andres Gomez2017-08-281-0/+114
| | | | | Signed-off-by: Andres Gomez <[email protected]> (cherry picked from commit e644f9996b36598e4b24a359343096886b2333d0)
* st/mesa: fix handling of vertex array double inputsIlia Mirkin2017-08-281-1/+3
| | | | | | | | | | | | | The is_double_vertex_input needs to be set for arrays of doubles as well. Fixes KHR-GL45.enhanced_layouts.varying_array_locations Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected]
* glsl: fix counting of vertex shader output slots used by explicit varsIlia Mirkin2017-08-281-1/+2
| | | | | | | | | | | | The argument to count_attribute_slots should only be set to true for vertex inputs, not for all vertex shader varyings. Fixes KHR-GL45.enhanced_layouts.varying_locations Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Cc: [email protected]
* intel/compiler: Cast reg types explicitlyTopi Pohjolainen2017-08-281-2/+2
| | | | | | | | | | Makes coverity happier. CID: 1416799 Fixes: c1ac1a3d25 (i965: Add a brw_hw_type_to_reg_type() function) Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* gallium/docs: Fix an inequality sign of TGSI_SEMANTIC_SUBGROUP_LT_MASKGwan-gyeong Mun2017-08-281-1/+1
| | | | | | | | | | | | | | A previous expression presents same as TGSI_SEMANTIC_SUBGROUP_GT_MASK. It fixes a direction of an inequality for TGSI_SEMANTIC_SUBGROUP_LT_MASK. before: bit index > TGSI_SEMANTIC_SUBGROUP_INVOCATION after: bit index < TGSI_SEMANTIC_SUBGROUP_INVOCATION Signed-off-by: Mun Gwan-gyeong <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: propagate VK_ERROR_OUT_OF_HOST_MEMORY to vk{Begin,End}CommandBuffer()Samuel Pitoiset2017-08-281-7/+17
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rename record_fail to record_result and use VkResultSamuel Pitoiset2017-08-282-9/+9
| | | | | | | | This will allow to propagate VK_ERROR_OUT_OF_HOST_MEMORY to vkEndCommandBuffer() when necessary. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/docs: fix a typoGwan-gyeong Mun2017-08-281-1/+1
| | | | | Signed-off-by: Mun Gwan-gyeong <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* i915g: Remove a few unused variablesEduardo Lima Mitev2017-08-281-16/+0
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* disk_cache: assert if a cache entries keys don't match mesaTimothy Arceri2017-08-281-1/+3
| | | | | | | | | In ef42423e7be9 I enabled the check for release builds however we still want to assert in debug builds in case of collisions or just general bugs with the key building/compare code. Otherwise it will just fail silently effectively disabling the cache. Reviewed-by: Eduardo Lima Mitev <[email protected]>
* Revert "radeonsi: get the raster config from AMDGPU on SI"Marek Olšák2017-08-273-22/+0
| | | | | | | | | | | | This reverts commit fc99cb3c9edee3af773700cf7ebdc60dc02fcaba. "The performance went down from 64.7 to 51.4 fps in Valley and from 30.8 to 25.1 fps in Heaven on Radeon HD 7970. Other games seem to have also a 10-25% performance decrease." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102429 It looks like we can't use the raster config values from the kernel.
* radv/wsi: Compute correct row_pitch for GFX9.Dave Airlie2017-08-271-2/+6
| | | | | | | (commit split out by Bas Nieuwenhuizen) Fixes: 65477bae9cf "radv: enable GFX9 on radv" Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* etnaviv: use correct param for etna_compatible_rs_format(..)Christian Gmeiner2017-08-261-1/+1
| | | | | | | | | Found by code inspection. Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs") Cc: [email protected] Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* egl: don't NULL deref the .get_capabilities function pointerEmil Velikov2017-08-261-1/+2
| | | | | | | | | | | | | One could easily introduce version 3 of the DRI2fenceExtension, extending the struct, while not implementing the above function. Thus we'll end up with NULL pointer, and dereferencing it won't fare too well. Fixes: 0201f01dc4e ("egl: add EGL_ANDROID_native_fence_sync") Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mapi/gen: remove shebang from the marshal generator scriptsEmil Velikov2017-08-263-3/+0
| | | | | | | | | | | The scripts are invoked with the correct version of python and are missing the execute bit. Follow the rest of Mesa and drop the shebang line. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* dri_interface.h: add missing stdint.h includeEmil Velikov2017-08-261-0/+2
| | | | | | | | Required for uint32_t and friends. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* xmlconfig: use the portable __VA_ARGS__Emil Velikov2017-08-261-6/+6
| | | | | | | | | | | Follow the example used through mesa and use "..." + "__VA_ARGS__". The former tends to be more common and portable. v2: use ##__VA_ARGS__ (Eric) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/vbuf: fix buffer reference bugsBrian Paul2017-08-251-4/+3
| | | | | | | | | | | | | | | | | | In two places we called pipe_resource_reference() to remove a reference to a vertex buffer resource. But we neglected to check if the buffer was a user buffer and not a pipe_resource. This caused us to pass an invalid pipe_resource pointer to pipe_resource_reference(). Instead of calling pipe_resource_reference(&vbuf->resource, NULL), use pipe_vertex_buffer_unreference(&vbuf) which checks the is_user_buffer field and does the right thing. Also, explicity set the is_user_buffer field to false after setting the vbuf->resource pointer to out_buffer. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102377 Reviewed-by: Marek Olšák <[email protected]> Tested-by: Bruce Cherniak <[email protected]>
* docs: add an additional final cycle for 17.1Andres Gomez2017-08-261-1/+7
| | | | | | | | Cc: Emil Velikov <[email protected]> Cc: Juan A. Suarez Romero <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Juan A. Suarez Romero <[email protected]>
* docs: remove released and extend the calendar until the end of 2017Andres Gomez2017-08-261-4/+84
| | | | | | | | | | | | | Completed the 17.2 cycle and added the beginning of the 17.3 one. v2: Add 17.2-rc6 as tentative final version to be promoted to 17.2.0 final (Eric). Cc: Emil Velikov <[email protected]> Cc: Juan A. Suarez Romero <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Juan A. Suarez Romero <[email protected]>
* radv: Fix sparse BO mapping merging.Bas Nieuwenhuizen2017-08-251-0/+1
| | | | | | | | If we merge a mapping with the mapping before it, we also need to not only change the offset, but also the bo offset. Fixes: 715df30a4e2 "radv/amdgpu: Add winsys implementation of virtual buffers." Reviewed-by: Dave Airlie <[email protected]>
* radv: Fix off by one in MAX_VBS assert.Bas Nieuwenhuizen2017-08-251-1/+1
| | | | | | | | e.g. 0 + 32 <= 32 should be valid. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Tested-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't set a new subpass on compute resolve.Bas Nieuwenhuizen2017-08-251-8/+0
| | | | | | | We don't use the render path so totally unneeded. Fixes: 19be95f71e6 "radv: add subpass resolve compute path" Reviewed-by: Dave Airlie <[email protected]>
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