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* intel/fs: Allow multiple slots for positionCaio Marcelo de Oliveira Filho2020-04-0713-17/+46
| | | | | | | | | | | | | | | | | | | | | | Change brw_compute_vue_map() to also take the number of pos slots. If more than one slot is used, the VARYING_SLOT_POS is treated as an array. When using Primitive Replication, instead of a single position, the VUE must contain an array of positions. Padding might be necessary (after clip distance) to ensure rest of attributes start aligned. v2: Add note about array in the commit message and assert that pos_slots >= 1 to make clear 0 is invalid. (Jason) Move padding to be after the clip distance. v3: Apply the correct offset when gathering the sources from outputs. Reviewed-by: Jason Ekstrand <[email protected]> [v2] Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
* intel/gen12: Add XML description for 3DSTATE_PRIMITIVE_REPLICATIONCaio Marcelo de Oliveira Filho2020-04-071-0/+16
| | | | | | | | | v2: Use groups for the 16-element arrays "Viewport Offset" and "RTAI Offset". (Ken) Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
* nir: Add per_view attribute to nir_variableCaio Marcelo de Oliveira Filho2020-04-077-8/+42
| | | | | | | | | | | | | If a nir_variable is tagged with per_view, it must be an array with size corresponding to the number of views. For slot-tracking, it is considered to take just the slot for a single element -- drivers will take care of expanding this appropriately. This will be used to implement the ability of having per-view position in a vertex shader in Intel platforms. Acked-by: Rafael Antognolli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
* mesa: add support for NV_pixel_buffer_objectSimon Ser2020-04-072-5/+16
| | | | | | | | Signed-off-by: Simon Ser <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4422> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4422>
* turnip: implement timestamp queryJonathan Marek2020-04-072-55/+86
| | | | | | | | | Passes tests in: dEQP-VK.pipeline.timestamp.* Signed-off-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4027> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4027>
* turnip: Enable geometryShader device featureBrian Ho2020-04-071-1/+1
| | | | | Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Enable geometry shaders for CP_DRAWsBrian Ho2020-04-071-4/+12
| | | | | | | Enable geometry shading on draw if the pipeline has a geometry stage. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Populate tu_pipeline.active_stagesBrian Ho2020-04-071-0/+6
| | | | | | | This can be used to determine if the pipeline has a specific shader stage (e.g. geometry shader). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Update maxGeometryShaderInvocations to match blobBrian Ho2020-04-071-1/+1
| | | | | | | | | | | | Geometry shaders support an invocations parameter up to a limit defined by maxGeometryShaderInvocations. This was set to 127, but executing with invocations > 32 causes a crash. As it turns out, the blob only advertises a max of 32 invocations, so we set that in turnip as well. Fixes dEQP-VK.geometry.instanced.draw_*_instances_{127, 64}_geometry_invocations Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Selectively configure GRAS_LAYER_CNTLBrian Ho2020-04-072-2/+9
| | | | | | | | | | | | | One of the features of geometry shaders is the ability to render to different layers by assigning to the gl_Layer (Layer in SPIR-V) builtin. While have already plumbed the layer regid to the geometry shader, we also need to GRAS_LAYER_CNTL to actually use layered rendering. In addition, gmem does not support layered rendering, so we need to force sysmem. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Set up REG_A6XX_SP_GS_CONFIGBrian Ho2020-04-071-6/+8
| | | | | | | Updates GS_CONFIG and HLSQ_GS_CNTL registers to match those emitted by the blob and fd. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Configure VFD_CONTROL with gsheader and primitiveidBrian Ho2020-04-071-7/+16
| | | | | | | | This commit updates VFD_CONTROL to use the GS header and primitive ID sysvals if a geometry shader stage is present in the pipeline. Like in the case of VPC, the code here is adapted from fd6_program. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Configure VPC for geometry shadersBrian Ho2020-04-074-60/+181
| | | | | | | | | | This commit updates tu6_emit_vpc to selectively emit GS-specifc configuration. Most of this is repurposed from fd6_program.c. This also refactors `link_geometry_stages` to ir3_nir_lower_tess.c so it can be shared between fd and tu. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Emit geometry shader obj and related constsBrian Ho2020-04-071-1/+49
| | | | | | | | | | | | | | | | Like with other shader types, we need to emit the geometry shader object and the consts it uses. In addition, we need to emit additional geometry-specific consts that link primitive/vertex stride between the vs and gs. In conjunction with the gsheader, these are used by the vs to determine where to stlw outputs and used by the gs to determine where to ldlw those outputs from. FD emits these consts in the draw call because in GL, you can mix and match shaders in different programs. In Vulkan, however, we compile and link the shaders at pipeline creation, so we can emit these in the pipeline IB instead. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* turnip: Set has_gs in ir3_shader_keyBrian Ho2020-04-071-2/+12
| | | | | | | | | The ir3 compiler only lowers the VS and GS for geometry shading if the corresponding has_gs key is set in the shader key. Without it, GS-specific intrinsics like load_per_vertex_input won't get lowered and the GS header will be initialized with invalid values. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4436>
* radv: Print shader stage before disassembly.Timur Kristóf2020-04-071-1/+5
| | | | | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco: Print shader stage in aco_print_program.Timur Kristóf2020-04-071-0/+46
| | | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.Timur Kristóf2020-04-072-4/+13
| | | | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Run GS_ALLOC_REQ on priority 3 for NGG VS and TES.Timur Kristóf2020-04-071-0/+6
| | | | | | | | It is recommended to do this as quickly as possible. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Schedule position exports of NGG VS/TES.Timur Kristóf2020-04-071-1/+1
| | | | | | | | | Similarly to the HW VS stage, the HW NGG GS stage also benefits from executing these exports as early as possible. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Implement NGG VS and TES.Timur Kristóf2020-04-072-11/+270
| | | | | | | | | | | | | | | | | | | | | | | | | When NGG is used, vertex and tess eval shaders are executed on the hardware NGG geometry stage. There is a series of steps they must perform: * Request GS space using GS_ALLOC_REQ * Export the primitive * Finally, export the normal VS outputs In this commit, two modes are implemented: * "late" which matches what the RADV LLVM backend currently does * "early" which is an optimized version as seen in radeonsi Vulkan doesn't allow the shader to write the edge flags, so we can currently always use the "early" mode. Exporting the primitive ID is also supported by having the GS threads write that into LDS and reading them from LDS in the ES threads. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Setup NGG VS and TES stages.Timur Kristóf2020-04-071-6/+13
| | | | | | | | | ngg_vertex_gs and ngg_tess_eval_gs work very similarly to vertex_vs and tess_eval_vs, but they run on the HW NGG GS stage. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Fix exports for NGG VS and TES.Timur Kristóf2020-04-071-2/+2
| | | | | | | | | The exports in NGG VS and TES work just like VS exports, so the assembler needs to fix these too in the same manner. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Initialize exec mask for NGG VS and TES.Timur Kristóf2020-04-071-1/+1
| | | | | | | | | They behave like merged ESGS shaders, so the exec mask needs to be manually initialized for these NGG shaders too. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco/ngg: Add new stage for hw_ngg_gs.Timur Kristóf2020-04-071-11/+12
| | | | | | | | | | | | This is needed to distinguish between NGG and legacy. Otherwise, vertex_geometry_gs and ngg_vertex_geometry_gs have the same value, which we want to avoid. Also, there is no such thing as ngg_vertex_tess_control_hs. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco: Treat s_setprio as a scheduling barrier.Timur Kristóf2020-04-071-5/+7
| | | | | | | | | | | | | | We want to execute instructions after s_setprio in the given priority, so we must prevent the scheduler from scheduling beyond s_setprio, otherwise some instructions could be executed in a different priority. Rename hazard_fail_memtime to hazard_fail_unreorderable and include s_setprio in the list of unreorderable opcodes. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco: Extract merged_wave_info_to_mask to its own function.Timur Kristóf2020-04-071-19/+26
| | | | | | | | | Currently we only use this at the beginning of merged shader parts, but we are going to need to use it with some NGG code as well. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco: Print block_kind_export_end.Timur Kristóf2020-04-071-0/+2
| | | | | | | | Useful when debugging issues with exports. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco: Extract uniform if handling to separate functions.Timur Kristóf2020-04-071-64/+92
| | | | | | | | | Currently we only use this for uniform ifs that come from NIR, but we are going to need to use it with some NGG parts as well. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3576>
* aco: Fix crash in insert_wait_states.Timur Kristóf2020-04-071-9/+7
| | | | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4465> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4465>
* pan/bit: Wire up add/add op+testAlyssa Rosenzweig2020-04-062-1/+2
| | | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bit: Add fmin/max16 testsAlyssa Rosenzweig2020-04-061-2/+9
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bit: Enable more debug for `run`Alyssa Rosenzweig2020-04-061-1/+1
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bit: Add min/max support to interpreterAlyssa Rosenzweig2020-04-061-1/+10
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bit: Unify test frontendsAlyssa Rosenzweig2020-04-063-68/+23
| | | | | | | Random. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Force ADD scheduling for MINMAXAlyssa Rosenzweig2020-04-061-1/+1
| | | | | | | Might be GPU version specific. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Fix incorrect abs flip in fma/fadd16Alyssa Rosenzweig2020-04-061-2/+2
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Set BI_MODS for MINMAXAlyssa Rosenzweig2020-04-061-1/+1
| | | | | | | We support it. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Add ADD add/min/max fp32 packingAlyssa Rosenzweig2020-04-061-0/+36
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Structify ADD unit add/min/maxAlyssa Rosenzweig2020-04-061-0/+17
| | | | | | | ..since it's missing for FMA Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Implement min/max on FMAAlyssa Rosenzweig2020-04-062-7/+15
| | | | | | | | | Unfortunately, while this looks fine to the disasm, it's raising INSTR_INVALID_ENC on my g31 board here. Looks like it might be ADD only on newer Bifrost. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bit: Add special unit testAlyssa Rosenzweig2020-04-065-1/+38
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bit: Add special op interpretingAlyssa Rosenzweig2020-04-061-2/+36
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Add fp16 support for frcp/frsqAlyssa Rosenzweig2020-04-062-2/+15
| | | | | | | More ops. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Add 32-bit _FAST packingAlyssa Rosenzweig2020-04-062-0/+28
| | | | | | | For frcp/frsq on newer Bifrost. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* pan/bi: Remove nontrivial SPECIAL opsAlyssa Rosenzweig2020-04-063-20/+0
| | | | | | | | These require a lot more handholding in the IR than we can deal with at this stage; we need to restrict ourselves to frcp/sqrt. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4470>
* aco: zero-initialize TempRhys Perry2020-04-063-2/+3
| | | | | | | | | | | Fixes dEQP-VK.transform_feedback.* crashes from accesses garbage temporaries in emit_extract_vector(). Fixes: 85521061 ("aco: prepare helper functions for subdword handling") Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4463> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4463>
* aco: remove divergence check in sanitize_if()Rhys Perry2020-04-061-2/+1
| | | | | | | | | We also need to do this if a side ends in a divergent break. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4461> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4461>
* nir/lower_amul: fix slot calculationRob Clark2020-04-063-10/+34
| | | | | | | | | | Fixes incorrect indexing in dEQP-GLES31.functional.ssbo.layout.instance_array_basic_type.packed.mat2x3 Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
* nir: add some swizzle helpersRob Clark2020-04-061-0/+20
| | | | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4455>
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