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* radeonsi: move code for setting one shader image into separate functionMarek Olšák2016-06-011-71/+82
* radeonsi: set some image descriptor fields at bind timeMarek Olšák2016-06-014-71/+111
* gallium/radeon: strenghten some checking for DMA preparationMarek Olšák2016-06-011-1/+6
* gallium/util: add util_texrange_covers_whole_level from radeonMarek Olšák2016-06-012-17/+18
* nir: allow sat on all float destination typesIlia Mirkin2016-06-011-1/+3
* radeonsi: fix the raster config setup for 1 RB iceland chipsAlex Deucher2016-06-011-1/+4
* mesa/sampler: fix error codes for sampler parameters.Dave Airlie2016-06-011-27/+10
* glsl: define some GLES3 constants in GLSL 4.1Dave Airlie2016-06-011-1/+1
* i965: Add norbc debug optionTopi Pohjolainen2016-06-014-0/+5
* i965/gen9: Configure rbc buffers as plain for non-rbc tex viewsTopi Pohjolainen2016-06-012-3/+48
* i965: Fix the passthrough TCS for isolines.Kenneth Graunke2016-05-311-7/+12
* i965/xfb: skip components in correct buffer.Dave Airlie2016-06-011-4/+6
* glsl/linker: fix multiple streams transform feedback.Dave Airlie2016-06-011-15/+17
* mesa/bufferobj: use mapping range in BufferSubData.Dave Airlie2016-06-011-1/+1
* nv50/ir: fix error finding free element in bitset in some situationsIlia Mirkin2016-05-311-0/+6
* nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin2016-05-311-4/+4
* Revert "glsl: fix xfb_offset unsized array validation"Timothy Arceri2016-06-014-41/+31
* i965/fs: Allow scalar source regions on SNB math instructions.Francisco Jerez2016-05-313-17/+8
* i965/fs: Fix constant combining for instructions that cannot accept source mods.Francisco Jerez2016-05-311-4/+3
* i965/fs: Extend remove_duplicate_mrf_writes() to handle non-VGRF to MRF copies.Francisco Jerez2016-05-311-8/+8
* i965/fs: Fix compute_to_mrf() to coalesce VGRFs initialized by multiple singl...Francisco Jerez2016-05-311-10/+36
* i965/fs: Teach compute_to_mrf() about the COMPR4 address transformation.Francisco Jerez2016-05-311-1/+23
* i965/fs: Refactor compute_to_mrf() to split search and rewrite into separate ...Francisco Jerez2016-05-311-10/+25
* i965/fs: Fix compute-to-mrf VGRF region coverage condition.Francisco Jerez2016-05-311-3/+6
* i965/fs: Simplify and improve accuracy of compute_to_mrf() by using regions_o...Francisco Jerez2016-05-311-47/+13
* i965/fs: Teach regions_overlap() about COMPR4 MRF regions.Francisco Jerez2016-05-311-3/+17
* Don't use python 3Dylan Baker2016-05-312-10/+2
* genxml: change chbang to python 2Dylan Baker2016-05-311-1/+1
* genxml: use the isalpha method rather than str.isalpha.Dylan Baker2016-05-311-1/+1
* genxml: require future imports for python2 compatibility.Dylan Baker2016-05-311-0/+3
* genxml: mark re strings as rawDylan Baker2016-05-311-2/+2
* genxml: Make classes descendants of objectDylan Baker2016-05-311-4/+4
* genxml: mark gen_pack_header.py as encoded in utf-8Dylan Baker2016-05-311-0/+1
* radeonsi: Decompress DCC textures in a render feedback loop.Bas Nieuwenhuizen2016-05-314-0/+113
* radeonsi: Add counter to check if a texture is bound to a framebuffer.Bas Nieuwenhuizen2016-05-314-0/+26
* vc4: Fix compiler warnings in fail_instr path of QIR validate passRhys Kidd2016-05-311-10/+10
* anv: let anv_entrypoints_gen.py generate proper Wayland/Xcb guardsEmil Velikov2016-05-311-0/+28
* svga: change enum pipe_resource_usage back to unsignedBrian Paul2016-05-311-1/+1
* radeonsi: fix CP DMA hazard with index buffer fetchesMarek Olšák2016-05-311-2/+20
* r600g: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
* radeonsi: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
* gallium/u_blitter: do GL-compliant integer resolvesMarek Olšák2016-05-311-19/+7
* mesa: fix crash in driver_RenderTexture_is_safeMarek Olšák2016-05-311-1/+2
* radeonsi: don't flush TC at the end of IBs on DRM >= 3.2.0Marek Olšák2016-05-311-2/+3
* gallium/radeon: fixed division by zeroJakob Sinclair2016-05-311-0/+3
* st/glsl_to_tgsi: prevent infinite loopEric Engestrom2016-05-311-2/+3
* glsl/images: bounds check image unit assignmentDave Airlie2016-05-311-0/+2
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
* nvc0/ir: limit max number of regs based on availability in SMIlia Mirkin2016-05-302-2/+4
* nv50/ir: record number of threads in a compute shaderIlia Mirkin2016-05-305-2/+10
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