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* intel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.Francisco Jerez2019-01-096-47/+4
| | | | | | | | These are broken on a future platform, but it turns out we don't need to fix them, since they're just type-converting moves with strided source. Kill them. Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.Francisco Jerez2019-01-092-145/+12
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Remove existing lower_conversions pass.Francisco Jerez2019-01-095-139/+1
| | | | | | It's redundant with the functionality provided by lower_regioning now. Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Introduce regioning lowering pass.Francisco Jerez2019-01-096-19/+418
| | | | | | | | | | | | | | | | | This legalization pass is meant to handle situations where the source or destination regioning controls of an instruction are unsupported by the hardware and need to be lowered away into separate instructions. This should be more reliable and future-proof than the current approach of handling CHV/BXT restrictions manually all over the visitor. The same mechanism is leveraged to lower unsupported type conversions easily, which obsoletes the lower_conversions pass. v2: Give conditional modifiers the same treatment as predicates for SEL instructions in lower_dst_modifiers() (Iago). Special-case a couple of other instructions with inconsistent conditional mod semantics in lower_dst_modifiers() (Curro). Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Constify fs_inst::can_do_source_mods().Francisco Jerez2019-01-092-2/+2
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Respect CHV/BXT regioning restrictions in copy propagation pass.Francisco Jerez2019-01-092-0/+38
| | | | | | | | | | | | | Currently the visitor attempts to enforce the regioning restrictions that apply to double-precision instructions on CHV/BXT at NIR-to-i965 translation time. It is possible though for the copy propagation pass to violate this restriction if a strided move is propagated into one of the affected instructions. I've only reproduced this issue on a future platform but it could affect CHV/BXT too under the right conditions. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/eu/gen7: Fix brw_MOV() with DF destination and strided source.Francisco Jerez2019-01-091-7/+4
| | | | | | | | | I triggered this bug while prototyping code for a future platform on IVB. Could be a problem today though if a strided move is copy-propagated into a type-converting move with DF destination. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Fix bug in lower_simd_width while splitting an instruction which ↵Francisco Jerez2019-01-091-2/+5
| | | | | | | | | | | | | was already split. This seems to be a problem in combination with the lower_regioning pass introduced by a future commit, which can modify a SIMD-split instruction causing its execution size to become illegal again. A subsequent call to lower_simd_width() would hit this bug on a future platform. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Implement quad swizzles on ICL+.Francisco Jerez2019-01-093-18/+97
| | | | | | | | | | | | | Align16 is no longer a thing, so a new implementation is provided using Align1 instead. Not all possible swizzles can be represented as a single Align1 region, but some fast paths are provided for frequently used swizzles that can be represented efficiently in Align1 mode. Fixes ~90 subgroup quad swap Vulkan CTS tests. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]>
* intel/fs: Handle source modifiers in lower_integer_multiplication().Francisco Jerez2019-01-092-2/+37
| | | | | | | | | | | | lower_integer_multiplication() implements 32x32-bit multiplication on some platforms by bit-casting one of the 32-bit sources into two 16-bit unsigned integer portions. This can give incorrect results if the original instruction specified a source modifier. Fix it by emitting an additional MOV instruction implementing the source modifiers where necessary. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]>
* anv/pipeline: remove unnecessary null-pointer checkAndrii Simiklit2019-01-091-4/+2
| | | | | | | | | | | | Looks like it is impossible that 'last' variable is a null because at least the get_vs_prog_data shouldn't return a null pointer. So this check is unnecessary starts from commit: 99d497c5b691 "anv/pipeline: Replace get_fs_input_map with ..." This small issue is found by cppcheck. Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* st/va: Return correct status from vlVaQuerySurfaceStatusIndrajit Das2019-01-091-0/+31
| | | | | | | | | This ensures that during encoding, applications can get the correct status of the surface before submitting more operations on the same. Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Indrajit Das <[email protected]>
* Revert "llvmpipe: Always return some fence in flush (v2)"Roland Scheidegger2019-01-091-2/+0
| | | | | | | | | This reverts commit f6a6da8131383d8eeee07cd59326a70f4b15866b. With this commit we see massive amounts of asserts triggering in lp_fence_wait(), assert(f->issued), for instance with libgl_xlib state tracker and piglit. Not entirely sure if the assert could just be removed.
* st/mesa: don't leak pipe_surface if pipe_context is not currentMarek Olšák2019-01-092-1/+23
| | | | | | | | | | We have found some pipe_surface leaks internally. This is the same code as surface_destroy in radeonsi. Ideally, surface_destroy would be in pipe_screen. Cc: 18.3 <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: don't reference pipe_surface locally in PBO codeMarek Olšák2019-01-091-3/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* st/mesa: unify window-system renderbuffer initializationMarek Olšák2019-01-093-21/+28
| | | | Reviewed-by: Brian Paul <[email protected]>
* radeonsi: Fix use of 1- or 2- component GL_DOUBLE vbo's.Mario Kleiner2019-01-091-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With Mesa 18.1, commit be973ed21f6e, si_llvm_load_input_vs() changed the number of source 32-bit wide dword components used for fetching vertex attributes into the vertex shader from a constant 4 to a variable num_channels number, depending on input data format, with some special case handling for input data formats like 64-Bit doubles. In the case of a GL_DOUBLE input data format with one or two components though, e.g, submitted via ... a) glTexCoordPointer(1, GL_DOUBLE, 0, buffer); b) glTexCoordPointer(2, GL_DOUBLE, 0, buffer); ... the input format would be SI_FIX_FETCH_RG_64_FLOAT, but no special case handling was implemented for that case, so in the default path the number of 32-bit dwords would be set to the number of float input components derived from info->input_usage_mask. This ends with corrupted input to the vertex shader, because fetching a 64-bit double from the vbo requires fetching two 32-bit dwords instead of 1, and fetching a two double input requires 4 dword fetches instead of 2, so in these cases the vertex shader receives incomplete/truncated input data: a) float v = gl_MultiTexCoord0.x; -> v.x is corrupted. b) vec2 v = gl_MultiTexCoord0.xy; -> v.x is assigned correctly, but v.y is corrupted. This happens with the standard TGSI IR compiled shaders. Under NIR with R600_DEBUG=nir, we got correct behavior because the current radeonsi nir code always assigns info->input_usage_mask = TGSI_WRITEMASK_XYZW, thereby always fetches 4 dwords regardless of what the shader actually needs. Fix this by properly assigning 2 or 4 dword fetches for one or two component GL_DOUBLE input. Fixes: be973ed21f6e ("radeonsi: load the right number of components for VS inputs and TBOs") Signed-off-by: Mario Kleiner <[email protected]> Cc: [email protected] Cc: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* ac/nir,radv,radeonsi/nir: use correct indices for interpolation intrinsicsRhys Perry2019-01-094-1/+9
| | | | | | | | | | | | | | Fixes artifacts in World of Warcraft when Multi-sample Alpha-Test is enabled with DXVK. It also fixes artifacts with Fallout 4's god rays with DXVK. Various piglit interpolateAt*() tests under NIR are also fixed. v2: formatting fix update commit message to include Fallout 4 and the Fixes tag Fixes: f4e499ec791 ('radv: add initial non-conformant radv vulkan driver') Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106595 Signed-off-by: Rhys Perry <[email protected]>
* radv: skip draws with instance_count == 0Samuel Pitoiset2019-01-091-0/+13
| | | | | | | Loosely based on RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable variable pointersSamuel Pitoiset2019-01-091-1/+1
| | | | | | | | | | | | | | | | | | | The Vulkan spec 1.1.97 says: "variablePointers specifies whether the implementation supports the SPIR-V VariablePointers capability. When this feature is not enabled, shader modules must not declare the VariablePointers capability." As the SPIR-V feature is enabled, we should turn on the extension feature as well. All dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.* pass with the khronos internal repo. Note that a bunch of them fails with the public repo, but it's expected as they violate the specification. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: get rid of bunch of KHR suffixesSamuel Pitoiset2019-01-0910-164/+164
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]>
* radeon: fix printf format specifier.Maya Rashish2019-01-091-1/+1
| | | | | | | | | | | | From glibc printf(3): Z A nonstandard synonym for z that predates the appearance of z. Do not use in new code. Z may not exist on non-glibc systems. Prefer the standard symbol. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* llvmpipe: Always return some fence in flush (v2)Tomasz Figa2019-01-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If there is no last fence, due to no rendering happening yet, just create a new signaled fence and return it, to match the expectations of the EGL sync fence API. Fixes random "Could not create sync fence 0x3003" assertion failures from Skia on Android, coming from the following code: https://android.googlesource.com/platform/frameworks/base/+/master/libs/hwui/pipeline/skia/SkiaOpenGLPipeline.cpp#427 Reproducible especially with thread count >= 4. One could make the driver always keep the reference to the last fence, but: - the driver seems to explicitly destroy the fence whenever a rendering pass completes and changing that would require a significant functional change to the code. (Specifically, in lp_scene_end_rasterization().) - it still wouldn't solve the problem of an EGL sync fence being created and waited on without any rendering happening at all, which is also likely to happen with Android code pointed to in the commit. Therefore, the simple approach of always creating a fence is taken, similarly to other drivers, such as radeonsi. Tested with piglit llvmpipe suite with no regressions and following tests fixed: egl_khr_fence_sync conformance eglclientwaitsynckhr_flag_sync_flush eglclientwaitsynckhr_nonzero_timeout eglclientwaitsynckhr_zero_timeout eglcreatesynckhr_default_attributes eglgetsyncattribkhr_invalid_attrib eglgetsyncattribkhr_sync_status v2: - remove the useless lp_fence_reference() dance (Nicolai), - explain why creating the dummy fence is the right approach. Signed-off-by: Tomasz Figa <[email protected]>
* glsl: Fix buffer overflow with an atomic buffer binding out of range.Eric Anholt2019-01-081-1/+2
| | | | | | | | | | | | | | | | | | | The binding is checked against the limits later in the function, so we need to make sure we don't overflow before the check here. Fixes this valgrind warning (and sometimes segfault): ==1460== Invalid write of size 4 ==1460== at 0x74C98DD: ast_declarator_list::hir(exec_list*, _mesa_glsl_parse_state*) (ast_to_hir.cpp:4943) ==1460== by 0x74C054F: _mesa_ast_to_hir(exec_list*, _mesa_glsl_parse_state*) (ast_to_hir.cpp:159) ==1460== by 0x7435C12: _mesa_glsl_compile_shader (glsl_parser_extras.cpp:2130) in dEQP-GLES31.functional.debug.negative_coverage.get_error.compute. exceed_atomic_counters_limit Reviewed-by: Timothy Arceri <[email protected]>
* nir: Make nir_deref_instr_build/get_const_offset actually use size_align.Eric Anholt2019-01-081-3/+2
| | | | | | | | | | | | I think this was copy-and-paste mistake -- nir_opt_large_constants was passing in glsl_get_natural_size_align_bytes() given brw_nir.c's arguments to the opt pass. I wanted to reuse this function for handling constant offsets of arrays of images in V3D. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* glsl/linker: Fix unmatched TCS outputs being reduced to local variableDanylo Piliaiev2019-01-091-0/+6
| | | | | | | | | | | | Always match TCS outputs since they are shared by all invocations within the patch and should not be converted to local variables. This is one of the issues found in Downward. Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104297
* v3d: Enable GL_ARB_texture_gather on V3D 4.x.Eric Anholt2019-01-081-0/+5
| | | | | This is part of GLES 3.1, and with the NIR lowering we're now passing the GLES31 testcases.
* nir: Add nir_lower_tex support for Broadcom's swizzled TG4 results.Eric Anholt2019-01-083-0/+28
| | | | | | | | V3D returns the texels in a different order in the resulting vec4 from what GLSL wants, so we need to put in a swizzle. Fixes dEQP-GLES31.functional.texture.gather.basic.2d.rgba8.base_level.level_1 Reviewed-by: Jason Ekstrand <[email protected]>
* freedreno: Move register constant files to src/freedreno.Bas Nieuwenhuizen2019-01-0814-16/+12
| | | | | | | | This way they can be shared. Build tested with meson, but not too sure on the autotools stuff though. Reviewed-by: Dylan Baker <[email protected]> Acked-by: Rob Clark <[email protected]>
* nir: fix warning in nir_lower_io.cCaio Marcelo de Oliveira Filho2019-01-081-1/+1
| | | | | | | | | | | | | | | | | | Initialize the variable with NULL. Fixes the following In file included from ../src/compiler/nir/nir_lower_io.c:34: ../src/compiler/nir/nir_lower_io.c: In function ‘nir_lower_explicit_io’: ../src/compiler/nir/nir.h:668:11: warning: ‘addr’ may be used uninitialized in this function [-Wmaybe-uninitialized] return src; ^~~ ../src/compiler/nir/nir_lower_io.c:735:17: note: ‘addr’ was declared here nir_ssa_def *addr; ^~~~ v2: Avoid using a 'default' case so we get help from the compiler when new deref types are added. (Lionel) Acked-by: Jason Ekstrand <[email protected]>
* freedreno/drm: sync uapi againChia-I Wu2019-01-081-0/+1
| | | | | | | | | | | | | "pad" was missing in Mesa's msm_drm.h. sizeof(drm_msm_gem_info) remains the same, but now the compiler initializes the field to zero. Buffer allocation results in EINVAL without this for me. Cc: Rob Clark <[email protected]> Cc: Kristian Høgsberg <[email protected]> Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* meson: fix EGL/X11 build without GLXChia-I Wu2019-01-081-1/+1
| | | | | | | dep_xcb and others were not set under this configuration. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* wsi: drop unneeded KHR suffixEric Engestrom2019-01-081-15/+15
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* anv: drop unneeded KHR suffixEric Engestrom2019-01-0813-54/+54
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* nir: rename global/local to private/function memoryKarol Herbst2019-01-0833-108/+108
| | | | | | | | | | | | | | | | | | the naming is a bit confusing no matter how you look at it. Within SPIR-V "global" memory is memory accessible from all threads. glsl "global" memory normally refers to shader thread private memory declared at global scope. As we already use "shared" for memory shared across all thrads of a work group the solution where everybody could be happy with is to rename "global" to "private" and use "global" later for memory usually stored within system accessible memory (be it VRAM or system RAM if keeping SVM in mind). glsl "local" memory is memory only accessible within a function, while SPIR-V "local" memory is memory accessible within the same workgroup. v2: rename local to function as well v3: rename vtn_variable_mode_local as well Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* autotools: Remove tegra vdpau driverDylan Baker2019-01-081-2/+0
| | | | | | | | | | | This has never functioned and probably wont ever function, due to the way gallium media state trackers are architected and the tegra video decoder is architected. Cc: Thierry Reding <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Fixes: 1755f608f5201e0a23f00cc3ea1b01edd07eb6ef ("tegra: Initial support")
* clover/meson: Ignore 'svn' suffix when computing CLANG_RESOURCE_DIRPierre Moreau2019-01-081-1/+1
| | | | | | | | | | | | | | | The version exported by LLVM in its CMake configuration files can include the “svn” suffix when building a development version (for example “8.0.0svn”). However the exported clang headers are still found under “lib/clang/8.0.0/”, without the “svn” suffix. Meson takes care of removing the “svn” suffix from the version when using the dependency’s `version()` method. This processing is already performed in “configure.ac” when using autotools. Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* anv: flush fast clear colors into compressed surfacesLionel Landwerlin2019-01-081-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the following scenario : 1. Create image format R8G8B8A8_UNORM 2. Create image view format R8G8B8A8_SRGB 3. Clear the view through a sub pass to a particular color 4. Barrier on the image to from color attachment to source transfer 5. Copy the image into a linear buffer to check the content The step 4 resolving the clear color is unaware of the SRGB format of the view, because the blorp resolve operations operate on images the color associated with the resolve will not operate on SRGB format but UNORM. Leading to the wrong color being written into surfaces. This change forces a clear color resolve at the end of the render pass so following resolves won't have to deal with the clear color with a format that doesn't match the image's format. On gfxbench vulkan_5_normal 1280x720, this appear to cost us ~0.5fps, from 49.316 down to 48.949. v2: Only fast clear resolve when image & view have different formats (Lionel) v3: Update warning (Jason) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108911 Signed-off-by: Lionel Landwerlin <[email protected]> Suggested-by: Jason Ekstrand <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: [email protected]
* anv: explictly specify format for blorp ccs/mcs opLionel Landwerlin2019-01-083-16/+30
| | | | | | | | | | | | | | Resolve operations can happen when dealing with view (begin/end subpasses) in which case the view's format needs to apply, not the image's format. v2: Relayout arguments of a ccs_op() call (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Suggested-by: Jason Ekstrand <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108911 Cc: [email protected]
* dri3: initialize adaptive_sync as false before configQuerybTapani Pälli2019-01-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fixes following errors from valgrind output: ==23388== Conditional jump or move depends on uninitialised value(s) ==23388== at 0x48B4924: loader_dri3_drawable_init (loader_dri3_helper.c:381) ==23388== by 0x48A97D2: dri3_create_drawable (dri3_glx.c:386) ==23388== by 0x489E190: driFetchDrawable (dri_common.c:369) ==23388== by 0x48A9187: dri3_bind_context (dri3_glx.c:195) ==23388== by 0x488B75C: MakeContextCurrent (glxcurrent.c:220) ==23388== by 0x488B8DB: glXMakeCurrent (glxcurrent.c:267) ==23388== by 0x10A987: ??? (in /usr/bin/glxgears) ==23388== by 0x4BEB412: (below main) (in /usr/lib64/libc-2.28.so) ==23388== ==23388== Conditional jump or move depends on uninitialised value(s) ==23388== at 0x48B5A40: loader_dri3_swap_buffers_msc (loader_dri3_helper.c:923) ==23388== by 0x48A9B7E: dri3_swap_buffers (dri3_glx.c:587) ==23388== by 0x4887A81: glXSwapBuffers (glxcmds.c:857) ==23388== by 0x10ADED: ??? (in /usr/bin/glxgears) ==23388== by 0x4BEB412: (below main) (in /usr/lib64/libc-2.28.so) Fixes: 2e12fe425fe "loader/dri3: Enable adaptive_sync via _VARIABLE_REFRESH property" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]>
* virgl: use primconvert provoking vertex properlyDave Airlie2019-01-082-8/+24
| | | | | | | | This stores the raster state and calls the correct primconvert interface using the currently bound raster state. Reviewed-By: Gert Wollny <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* anv: Sort properties and features switch statementsJason Ekstrand2019-01-071-42/+42
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: Sort supported capabilitiesJason Ekstrand2019-01-074-43/+43
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* anv: Enable the new deref-based UBO/SSBO pathJason Ekstrand2019-01-082-1/+23
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: Add support for using derefs for UBO/SSBO accessJason Ekstrand2019-01-089-68/+273
| | | | | | | | | For now, it's hidden behind a cap. Hopefully, we can eventually drop that along with all the manual offset code in spirv_to_nir. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* spirv: Make better use of vtn_pointer_uses_ssa_offsetJason Ekstrand2019-01-081-15/+13
| | | | | | | | | | | The choice of whether or not we should use block_load/store isn't a choice between external and not so much as a choice between deref instructions and manually calculated offsets. In vtn_pointer_from_ssa, we guard the index+offset case behind vtn_pointer_uses_ssa_offset and then branch out from there. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: Add explicit pointer typesJason Ekstrand2019-01-084-20/+36
| | | | | | | | Instead of baking in uvec2 for UBO and SSBO pointers and uint for push constant and shared memory pointers, make it configurable. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: Choose atomic deref type with pointer_uses_ssa_offsetJason Ekstrand2019-01-083-40/+41
| | | | | | | | | Previously, we hard-coded the rule about workgroup variables and the builder lower_workgroup_access_to_offsets flag. Instead base it on the handy helper we have for exactly this sort of thing. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: Add error checking for Block and BufferBlock decorationsJason Ekstrand2019-01-083-0/+53
| | | | | | | | | | Variable pointers being well-defined across the block boundary requires a couple of very specific SPIR-V validation rules. Normally, we'd trust the validator to catch these but since CTS tests have been found in the wild which violate them, we'll carry our own checks. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir/vulkan: Add a descriptor type to vulkan resource intrinsicsJason Ekstrand2019-01-084-5/+56
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
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