| Commit message (Collapse) | Author | Age | Files | Lines |
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mapping ps input based on vs output;
fix bugs including constants updating for vs.
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We need to update VP_RESULT_MAP and/or COORD_REPLACE_MAP
when light_twoside and/or point_sprite are changed.
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For each FP input, don't assume that the VP output will be
at the same position, but scan the semantics instead, then
put the correct output reg indices into VP_RESULT_MAP.
Position is still assumed to be the first output/input.
See 07fafc7c9346aa260829603bf3188596481e9e62, which renders
previous assumptions incorrect.
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Uf. How embarrassing.
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Sorry for not pushing this before, it got lost in stashes.
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Simplifies things since the second to last one will then
be converted in the subsequent pass that ensures alignment
automatically.
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The hardware wants the pattern the same way it is
passed to glPolygonStipple.
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Conflicts:
src/gallium/drivers/r300/r300_texture.c
src/gallium/state_trackers/xorg/xorg_exa.c
src/mesa/state_tracker/st_cb_texture.c
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width/height/depth arrays
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We want to fallback to draw splitting when vertex element indices
might be too high for atomic draw path (currently limited to 4095).
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SSE3 != SSSE3 and so far we only use the later.
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There are no hard requirements at the moment.
We don't really emit any sse3 yet. Just some ssse3.
Thanks to Roland for spotting these incorrections.
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Conflicts:
src/mesa/state_tracker/st_atom_shader.c
src/mesa/state_tracker/st_program.c
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Translate vertex shaders independently of fragment shaders.
Previously tried to make fragment shader semantic indexes always start
at zero and exclude holes. This was unnecessary but meant that vertex
shader translation had to be adjusted to take this into account.
Now use a fixed scheme for labelling special FS input semantics
(color, etc), and another fixed scheme for the generics.
With this, vertex shaders can be translated independently of the bound
fragment shader, assuming mesa has done its own job and ensured that
the vertex shader provides at least the inputs the fragment shader is
looking for. The state-tracker didn't attempt to do anything about
this previously, so it shouldn't be needed now.
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One of several cases where we build mesa shaders and then translate
them to tgsi. Many of those cases it's because we're combining two
mesa programs and there are helpers for that, but in this case at
least can go straight to tgsi.
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LLVM 2.5 is no longer supported on windows.
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This makes the miptree rounds up to the near POT for each level for
all radeons, however since mipmaps aren't support with NPOT on previous
radeons this calculation shouldn't cause any problems. If it does
we can just make it r600 only.
I tested a few mipmap demos on r500 and they all seem to work.
Signed-off-by: Dave Airlie <[email protected]>
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This allows for z32f depth format to work correctly.
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We'll likely support much more formats, but doing this allows to run
more testsuites without immediately hit assertion failures.
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We don't need 16K+ to store a single pointer.
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Rename it to tgsi_instruction_predicate -- it's no longer an extended
token. Its presence is indicated by a new flag in tgsi_instruction that
indicates whether an instruction is predicated.
Also, change predicate index representation to match the other
tokens that specify register indices.
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We can get a lot of swtcl bo allocations - need to probably abstract
this a bit further.
Signed-off-by: Dave Airlie <[email protected]>
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This moves the bo mapping outside the DMA layer and makes it explicit,
this should in theory make it simpler to split the clean up the dma/cmdbuf
linkage that I created before that is broken.
Tested on: r600, rv380 (tcl/no-tcl), rv200 (tcl/no-tcl)
Signed-off-by: Dave Airlie <[email protected]>
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