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* st/mesa: consolidate quad drawing codeBrian Paul2016-02-165-238/+136
| | | | | | | The glClear, glBitmap and glDrawPixels code now use a new st_draw_quad() helper function. Reviewed-by: Jose Fonseca <[email protected]>
* st/mesa: overhaul vertex setup for clearing, glDrawPixels, glBitmapBrian Paul2016-02-165-161/+193
| | | | | | | | | | | | Define a new st_util_vertex structure which is a bit smaller (9 floats versus the previous 12 floats per vertex). Clean up the glClear, glDrawPixels and glBitmap code that sets up the vertex data and does the drawing so it's all very similar. This can lead to more consolidation. v2: add assertion that vertex buffer slot == 0 to catch possible future change in cso_get_aux_vertex_buffer_slot() behavior. Reviewed-by: Jose Fonseca <[email protected]>
* st/mesa: include u_draw.h, not u_draw_quad.h in st_draw.cBrian Paul2016-02-161-1/+1
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* configure: Bail out on llvm-config component errorJan Vesely2016-02-161-0/+3
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* Handle removal of LLVMAddTargetData in SVN revision 260919Matthew Dawson2016-02-162-0/+8
| | | | | | | | | | | | | | | | | | | LLVM removed LLVMAddTargetData for the 3.9 release in r260919. For the two places in mesa where this is called, only enable the lines when compiling for less then 3.9. For the radeon driver, I'm not sure how to check if any other LLVM calls need to be adjusted. I think since the target data used is extracted from the LLVMModule, it isn't necessary to pass it back to LLVM again. The code does compile, and at least for radeonsi does run OpenGL games. [ Michel Dänzer: Move #if closer to LLVMAddTargetData in lp_bld_init.c, and add HAVE_LLVM < 0x0309 guards around now unused occurrences of TD and data_layout ] Signed-off-by: Matthew Dawson <[email protected]> Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
* i965: Expose logic telling if non-msrt mcs is supportedTopi Pohjolainen2016-02-162-4/+13
| | | | | | | | | Alos use the opportunity to mark inputs constant. (Context has to be given as read-write to intel_miptree_supports_non_msrt_fast_clear() to support debug output). Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965/gen9: Refactor msrt mcs initializationTopi Pohjolainen2016-02-161-14/+22
| | | | | | | | This will be re-used to initialize auxiliary buffers in lossless compression case. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Add a few assertions on lossless compressionTopi Pohjolainen2016-02-162-0/+9
| | | | | | | | | v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Add a flag telling color resolve pass to ignore CCS_ETopi Pohjolainen2016-02-163-2/+27
| | | | | | | | | v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Add resolve option for lossless compressionTopi Pohjolainen2016-02-162-1/+5
| | | | | | | | | v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression (intel_miptree_is_lossless_compressed()). Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Allow fast clear to be used with lossless compressionTopi Pohjolainen2016-02-162-2/+6
| | | | | | | | | | | | v2 (Ben): Use combination of msaa_layout and number of samples instead of introducing explicit type for lossless compression. v3 (Ben): Squash with "i965: Resolve color buffer also in lossless compression case" and clarify simple non-compressed fast clear case. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* i965: Add helper for detecting lossless compressionTopi Pohjolainen2016-02-162-0/+30
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* Revert "i965: Restore vbo after color resolve during brw_try_draw_prims()"Topi Pohjolainen2016-02-161-9/+0
| | | | | | | | | | | | | This got pushed accidentally in the first place but wasn't reverted as it didn't regress piglit but instead fixed one newly introduced test exercising a corner in case in i965 driver. However, saving and restoring vertex buffer context is complicated and requires more thought. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94150 Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Tapani Palli <[email protected]>
* nvc0: initial support for GM20x GPUsBen Skeggs2016-02-165-0/+11
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: implement support for maxwell texture headersBen Skeggs2016-02-163-6/+203
| | | | | | | | | | | | | Adds support for the new TIC layout that's present on Maxwell GPUs, heavily based on the code for the existing layout. This code is required for GM20x support. While GM10x supports the older layout still, this commit switches it to use the updated version instead. Piglit testing shows zero regressions on GM107. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: import maxwell texture header definitions from rnndbBen Skeggs2016-02-161-0/+365
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: split tic format specificationBen Skeggs2016-02-165-58/+73
| | | | | | | | | | | We previously stored texture format information as it would appear in the TIC. We're about to support the new TIC layout that appeared with Maxwell, so it makes more sense to store the data in a split-out format. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: remove nv50_texture.xml.hBen Skeggs2016-02-161-306/+0
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: switch nvc0_tex.c to updated g80_texture.xml.hBen Skeggs2016-02-161-29/+29
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: switch nvc0_surface.c to updated g80_texture.xml.hBen Skeggs2016-02-161-7/+11
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: switch nv50_tex.c to updated g80_texture.xml.hBen Skeggs2016-02-161-33/+33
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: switch nv50_surface.c to updated g80_texture.xml.hBen Skeggs2016-02-161-7/+11
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: switch nv50_state.c to updated g80_texture.xml.hBen Skeggs2016-02-161-24/+29
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: switch nv50_formats.c to updated g80_texture.xml.hBen Skeggs2016-02-161-206/+207
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: import updated g80_texture.xml.h from rnndbBen Skeggs2016-02-161-0/+451
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: remove nv50_defs.xml.hBen Skeggs2016-02-161-263/+0
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: switch nv50_formats.c to updated g80_defs.xml.hBen Skeggs2016-02-161-8/+8
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: improved macros to handle format specificationBen Skeggs2016-02-161-470/+359
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: separate vertex formats from surface format descriptionsBen Skeggs2016-02-167-67/+206
| | | | | | | | | | | | We've previously had identical naming between vertex and texture formats, so it mostly made sense to define these together. However, upcoming patches are going to transition the driver over to using updated texture header definitions using NVIDIA's naming, and this will no longer be the case. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: remove unnecessary includesBen Skeggs2016-02-165-6/+0
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: switch nvc0_tex.c to updated g80_defs.xml.hBen Skeggs2016-02-161-40/+40
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: switch nvc0_surface.c to updated g80_defs.xml.hBen Skeggs2016-02-161-7/+7
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: remove unnecessary includeBen Skeggs2016-02-161-1/+0
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: switch nv50_transfer.c to g80_defs.xml.hBen Skeggs2016-02-161-3/+3
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: switch nv50_tex.c to updated g80_defs.xml.hBen Skeggs2016-02-161-3/+3
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: switch nv50_surface.c to updated g80_defs.xml.hBen Skeggs2016-02-161-8/+8
| | | | | | | Verified (binary diff) to produce identical code. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50: import updated g80_defs.xml.h from rnndbBen Skeggs2016-02-161-0/+279
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* st/mesa: count shader images in MaxCombinedShaderOutputResourcesNicolai Hähnle2016-02-151-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* st/mesa: enable GL image extensions when backend supports themIlia Mirkin2016-02-151-0/+17
| | | | | | | | | | This enables ARB_shader_image_load_store and ARB_shader_image_size when the backend claims support for these. It will also implicitly enable the image component of ARB_shader_texture_image_samples. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: convert GLSL image intrinsics into TGSIIlia Mirkin2016-02-152-4/+211
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: allow st_format.h to be included from C++ filesIlia Mirkin2016-02-151-0/+8
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: set pipe_image_view layers correctly for 3D texturesNicolai Hähnle2016-02-151-7/+17
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* st/mesa: call st_finalize_texture from image atomsNicolai Hähnle2016-02-151-1/+5
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* st/mesa: add an image atom for shader imagesIlia Mirkin2016-02-156-0/+237
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* tgsi: show textual format representationIlia Mirkin2016-02-152-4/+11
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add PIPE_SHADER_CAP_MAX_SHADER_IMAGESIlia Mirkin2016-02-1513-0/+18
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: make image views non-persistent objectsIlia Mirkin2016-02-157-56/+7
| | | | | | | | | Make them akin to shader buffers, with no refcounting/etc. Just used to pass data about the bound image in ->set_shader_images. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: empty buffer binding if the buffer's not really thereIlia Mirkin2016-02-151-3/+5
| | | | | | | | This can happen with 0-sized buffers. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* docs: Document VC4_DEBUG envvarRhys Kidd2016-02-151-0/+19
| | | | | Signed-off-by: Rhys Kidd <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
* vc4: Add missing braces in initializerRhys Kidd2016-02-151-1/+1
| | | | | | | | | | | | Silences the following GCC warning: mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c: In function 'qir_schedule_instructions': mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c:578:16: warning: missing braces around initializer [-Wmissing-braces] struct schedule_state state = { 0 }; ^ Signed-off-by: Rhys Kidd <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 10:19:34 +0000