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* clover: Assorted build fixes.Tom Stellard2012-05-111-8/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Contains the following patches squashed in: commit 9fff1dc0875f7c9591550fa3ebbe1ba7a18483fa Author: Tom Stellard <[email protected]> Date: Tue Mar 20 23:20:03 2012 +0100 configure.ac: Build gallium loader when OpenCL is enabled commit 542111cb02957418c6a285cb6ef2924e49adc66e Author: Tom Stellard <[email protected]> Date: Tue Mar 20 23:30:29 2012 +0100 configure.ac: Add sw/null to GALLIUM_WINSYS_DIRS for gallium loader commit 876f8de46062dde76b6075be3b6628f969b16648 Author: Tom Stellard <[email protected]> Date: Thu Feb 9 11:26:05 2012 -0500 configure.ac: Require gcc > 4.6.0 for clover commit 99049d50fa3d9a23297ae658189c19c89dca1766 Author: Tom Stellard <[email protected]> Date: Tue Mar 20 23:32:06 2012 +0100 configure.ac: Require Gallium drm loader when gallium loader is enabled No longer silently exclude this when building OpenCL drivers for nouveau and r600.
* clover: Import OpenCL state tracker.Francisco Jerez2012-05-1151-3/+14729
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* gallium/tests/trivial: Import compute unit tests.Francisco Jerez2012-05-112-1/+1594
| | | | | | | | | | | | | | | | | | | | | | Add a test program that tries to exercise some of the language features commonly used by compute programs at the Gallium API level: - Correctness of the values returned by the grid parameters. - Proper functioning of resource LOADs and STOREs. - Subroutine calls. - Argument passing to the compute parameter through the INPUT memory space. - Mapping of buffer objects to the GLOBAL memory space. - Proper functioning of the PRIVATE and LOCAL memory spaces. - Texture sampling and constant buffers. - Support for multiple kernels in the same program. - Indirect resource indexing. - Formatted resource loads and stores (i.e. with channel conversion and scaling) using several different formats. - Proper functioning of work-group barriers. - Atomicity and semantics of the atomic opcodes. As of now all of them seem to pass on my nvA8.
* gallium/gbm: Switch to auxiliary/pipe-loader.Francisco Jerez2012-05-1113-574/+52
| | | | Reviewed-by: Jakob Bornecrantz <[email protected]>
* gallium/tests/trivial: Switch to the pipe loader.Francisco Jerez2012-05-114-36/+50
| | | | | | | | It simplifies things slightly, and besides, it makes possible to execute the trivial tests on a hardware device instead of being limited to software rendering. Reviewed-by: Jakob Bornecrantz <[email protected]>
* gallium: Add "pipe-loader" target.Francisco Jerez2012-05-117-0/+315
| | | | | | | | | This target generates pipe driver modules intended to be consumed by auxiliary/pipe-loader. Most of it was taken from the "gbm" target -- the duplicated code will be replaced with references to this target in a future commit. Reviewed-by: Jakob Bornecrantz <[email protected]>
* gallium: Add pipe loader for device enumeration and driver multiplexing.Francisco Jerez2012-05-1110-0/+691
| | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have a uniform interface to create winsys and pipe_screen instances for any driver, exposing the device enumeration capabilities that might be supported by the operating system (for now there's a "drm" back-end using udev and a "sw" back-end that always returns the same built-in devices). The typical use case of this library will be: > > struct pipe_loader_device devs[n]; > struct pipe_screen *screen; > > pipe_loader_probe(&devs, n); >[pick some device from the array...] > > screen = pipe_loader_create_screen(dev, library_search_path); >[do something with screen...] > > screen->destroy(screen); > pipe_loader_release(&devs, N); > A part of the code was taken from targets/gbm/pipe_loader.c, which will be removed and replaced with calls into this library by a future commit.
* gallium/tgsi/text: Replace open-coded integer parsing with parse_int().Francisco Jerez2012-05-111-17/+3
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* gallium/tgsi/text: Parse immediates of non-float data types.Francisco Jerez2012-05-111-18/+48
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* gallium/tgsi: Fix tgsi_build_full_immediate() for non-float data types.Francisco Jerez2012-05-111-22/+8
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* gallium/tgsi/text: Make label parsing optional for branch instructions.Francisco Jerez2012-05-111-10/+9
| | | | | Structured branch instructions like IF, ELSE, BGNLOOP, ENDLOOP no longer require a label argument, make it optional for them.
* st/mesa: Use local temporary registers.Francisco Jerez2012-05-111-4/+4
| | | | | Local makes more sense in most places because non-inline function calls are unimplemented anyway.
* gallium/tgsi/ureg: Support local temporary emission.Francisco Jerez2012-05-112-6/+60
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* gallium/tgsi/ureg: Lift the restriction on releasing temporaries over ↵Francisco Jerez2012-05-111-27/+22
| | | | UREG_MAX_TEMP.
* gallium/util: Define util_strchrnul.Francisco Jerez2012-05-111-6/+18
| | | | Reviewed-by: Jakob Bornecrantz <[email protected]>
* gallium/compute: Drop TGSI dependency.Francisco Jerez2012-05-113-2/+13
| | | | | | | | | | | | Add a shader cap for specifying the preferred shader representation. Right now the only supported value is TGSI, other enum values will be added as they are needed. This is mainly to accommodate AMD's LLVM compiler back-end by letting it bypass the TGSI representation for compute programs. Other drivers will keep using the common TGSI instruction set. Reviewed-by: Tom Stellard <[email protected]>
* gallium/tgsi: Introduce the "LOCAL" register declaration modifier.Francisco Jerez2012-05-115-27/+54
| | | | | | | | | | | | | | | | | | | | | | | This change will be useful to implement function parameter passing on top of TGSI. As we don't have a proper stack, a register-based calling convention will be used instead, which isn't necessarily a bad thing given that GPUs often have plenty of registers to spare. Using the same register space for local temporaries and inter-procedural communication caused some inefficiencies, because in some cases the register allocator would lose the freedom to merge temporary values together into the same physical register, leading to suboptimal register (and sometimes, as a side effect, instruction) usage. The LOCAL declaration modifier specifies that the value isn't intended for parameter passing and as a result the compiler doesn't have to give any guarantees of it being preserved across function boundaries. Ignoring the LOCAL flag doesn't change the semantics of a valid program in any way, because local variables are just supposed to get a more relaxed treatment. IOW, this should be a backwards-compatible change.
* gallium/tgsi: Add support for atomic opcodes.Francisco Jerez2012-05-113-2/+188
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* gallium/tgsi: Add support for barriers.Francisco Jerez2012-05-113-1/+59
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* gallium/tgsi: Define system values used to query the compute grid parameters.Francisco Jerez2012-05-112-2/+10
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* gallium/tgsi: Add resource write-back support.Francisco Jerez2012-05-118-4/+45
| | | | | Define a new STORE opcode with a role dual to the LOAD opcode, and add flags to specify that a shader resource is intended for writing.
* gallium/tgsi: Add support for raw resources.Francisco Jerez2012-05-115-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | Normal resource access (e.g. the LOAD TGSI opcode) is supposed to perform a series of conversions to turn the texture data as it's found in memory into the target data type. In compute programs it's often the case that we only want to access the raw bits as they're stored in some buffer object, and any kind of channel conversion and scaling is harmful or inefficient, especially in implementations that lack proper hardware support to take care of it -- in those cases the conversion has to be implemented in software and it's likely to result in a performance hit even if the pipe_buffer and declaration data types are set up in a way that would just pass the data through. Add a declaration flag that marks a resource as typeless. No channel conversion will be performed in that case, and the X coordinate of the address vector will be interpreted in byte units instead of elements for obvious reasons. This is similar to D3D11's ByteAddressBuffer, and will be used to implement OpenCL's constant arguments. The remaining four compute memory spaces can also be understood as raw resources.
* gallium/tgsi: Define the TGSI_BUFFER texture target.Francisco Jerez2012-05-115-6/+6
| | | | | | This texture type was already referred to by the documentation but it was never defined. Define it as 0 to match the pipe_texture_target enumeration values.
* gallium/tgsi: Introduce the compute processor.Francisco Jerez2012-05-115-4/+9
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* gallium/tgsi: Move interpolation info from tgsi_declaration to a separate token.Francisco Jerez2012-05-1119-74/+141
| | | | | | Move Interpolate, Centroid and CylindricalWrap from tgsi_declaration to a separate token -- they only make sense for FS inputs and we need room for other flags in the top-level declaration token.
* gallium: Add context hooks for binding shader resources.Francisco Jerez2012-05-115-1/+58
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* gallium/tgsi: Split sampler views from shader resources.Francisco Jerez2012-05-1117-183/+303
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit splits the current concept of resource into "sampler views" and "shader resources": "Sampler views" are textures or buffers that are bound to a given shader stage and can be read from in conjunction with a sampler object. They are analogous to OpenGL texture objects or Direct3D SRVs. "Shader resources" are textures or buffers that can be read and written from a shader. There's no support for floating point coordinates, address wrap modes or filtering, and, unlike sampler views, shader resources are global for the whole graphics pipeline. They are analogous to OpenGL image objects (as in ARB_shader_image_load_store) or Direct3D UAVs. Most hardware is likely to implement shader resources and sampler views as separate objects, so, having the distinction at the API level simplifies things slightly for the driver. This patch introduces the SVIEW register file with a declaration token and syntax analogous to the already existing RES register file. After this change, the SAMPLE_* opcodes no longer accept a resource as input, but rather a SVIEW object. To preserve the functionality of reading from a sampler view with integer coordinates, the SAMPLE_I(_MS) opcodes are introduced which are similar to LOAD(_MS) but take a SVIEW register instead of a RES register as argument.
* gallium: Basic compute interface.Francisco Jerez2012-05-117-2/+185
| | | | | | | | | | Define an interface that exposes the minimal functionality required to implement some of the popular compute APIs. This commit adds entry points to set the grid layout and other state required to keep track of the usual address spaces employed in compute APIs, to bind a compute program, and execute it on the device. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Properly translate vertex format swizzle.Michel Dänzer2012-05-113-23/+23
| | | | egltri_screen works correctly!
* radeon/llvm: Remove AMDILMCCodeEmitter.cppTom Stellard2012-05-102-158/+0
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* radeon/llvm: Remove SILowerShaderInstructions.cppTom Stellard2012-05-104-81/+0
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* radeonsi/llvm: Move lowering of RETURN to ConvertToISA passTom Stellard2012-05-102-11/+2
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* radeon/llvm: Add some commentsTom Stellard2012-05-1064-422/+393
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* radeon/llvm: Move util functions into AMDGPU namespaceTom Stellard2012-05-103-39/+37
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* i965/hiz: Convert gen{6,7}_hiz.h to gen{6,7}_blorp.hPaul Berry2012-05-105-5/+5
| | | | | | | This patch renames the gen6_hiz.h and gen7_hiz.h files to correspond to the renames of the corresponding .cpp files (see previous commit). Reviewed-by: Chad Versace <[email protected]>
* i965/hiz: Convert gen{6,7}_hiz.c to C++Paul Berry2012-05-103-3/+3
| | | | | | | | | | | This patch converts the files gen6_hiz.c and gen7_hiz.c to C++, in preparation for expanding the HiZ code to support arbitrary blits. The new files are called gen6_blorp.cpp and gen7_blorp.cpp to reflect the expanded role that this code will serve--"blorp" stands for "BLit Or Resolve Pass". Reviewed-by: Chad Versace <[email protected]>
* i965/hiz: Make void pointer type casts explicitPaul Berry2012-05-101-5/+7
| | | | | | | | | Previous to this patch, gen6_hiz.c contained two implicit type casts from void * to a a non-void pointer type. This is allowed in C but not in C++. This patch makes the type casts explicit, so that gen6_hiz.c can be converted into a C++ file. Reviewed-by: Chad Versace <[email protected]>
* intel: Work around differences between C and C++ scoping rules.Paul Berry2012-05-102-25/+29
| | | | | | | | | | | | | | In C++, if a struct is defined inside another struct, or its name is first seen inside a struct or function, the struct is nested inside the namespace of the struct or function it appears in. In C, all structs are visible from toplevel. This patch explicitly moves the decalartions of intel_batchbuffer to toplevel, so that it does not get nested inside a namespace when header files are included from C++. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel: Add extern "C" declarations to headersPaul Berry2012-05-1011-1/+82
| | | | | | | | These declarations are necessary to allow C++ code to call C code without causing unresolved symbols (which would make the driver fail to load). Reviewed-by: Chad Versace <[email protected]>
* radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_egTom Stellard2012-05-102-17/+0
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* radeon/llvm: Delete all instructions that have been custom loweredTom Stellard2012-05-101-4/+1
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* radeonsi: Set NONE format for unused vertex shader position export slots.Michel Dänzer2012-05-101-3/+3
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* radeonsi: Eliminate one more magic number for texture image resources.Michel Dänzer2012-05-101-3/+3
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* radeonsi: Fix vertex buffer resource for stride 0.Michel Dänzer2012-05-101-1/+5
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* radeon/llvm: Remove AMDGPUConstants.pmTom Stellard2012-05-092-45/+23
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* radeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_constTom Stellard2012-05-095-38/+20
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* radeon/llvm: Make sure the LOAD_CONST def uses the isSI predicateTom Stellard2012-05-092-7/+7
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* svga: implement CEIL opcode translationBrian Paul2012-05-091-0/+28
| | | | Reviewed-by: José Fonseca <[email protected]>
* glsl_to_tgsi: use TGSI_OPCODE_CEIL for ir_unop_ceilChristoph Bumiller2012-05-091-3/+1
| | | | | The implementation using FLR was buggy, the second negation could get lost.
* gallium/drivers: handle TGSI_OPCODE_CEILChristoph Bumiller2012-05-094-0/+28
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