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* nouveau/video: wrap assertion within #ifndef NDEBUGMauro Rossi2016-02-011-0/+2
* st/mesa: treat a write as a read for range purposesIlia Mirkin2016-02-011-1/+4
* i965/gen7+: Use NIR for lowering of pack/unpack opcodes.Matt Turner2016-02-013-19/+29
* i965/vec4: Implement nir_op_pack_uvec2_to_uint.Matt Turner2016-02-011-0/+18
* nir: Add lowering support for unpacking opcodes.Matt Turner2016-02-012-0/+32
* nir: Add lowering support for packing opcodes.Matt Turner2016-02-014-0/+66
* i965/fs: Implement support for extract_word.Matt Turner2016-02-015-0/+56
* nir: Add opcodes to extract bytes or words.Matt Turner2016-02-013-0/+28
* glsl: Remove 2x16 half-precision pack/unpack opcodes.Matt Turner2016-02-019-170/+8
* i965/fs: Switch from GLSL IR to NIR for un/packHalf2x16 scalarizing.Matt Turner2016-02-013-11/+7
* nir: Add lowering of nir_op_unpack_half_2x16.Matt Turner2016-02-012-4/+29
* i965: Make separate nir_options for scalar/vector stages.Matt Turner2016-02-011-28/+33
* i965: Move brw_compiler_create() to new brw_compiler.c.Matt Turner2016-02-015-133/+161
* nir: Make argument order of unop_convert match binop_convert.Matt Turner2016-02-011-10/+10
* mesa: enable enums for OES_geometry_shaderMarta Lofstedt2016-02-012-36/+98
* gallium: Add DragonFly supportFrançois Tigeot2016-01-311-1/+1
* nv50/ir: get rid of memory stores with nop valuesIlia Mirkin2016-01-301-0/+6
* nv50/ir: fix false global CSE on instructions with multiple defsIlia Mirkin2016-01-301-0/+2
* nv50,nvc0: fix buffer clearing to respect engine alignment requirementsIlia Mirkin2016-01-302-52/+247
* freedreno/ir3: ignore clip-vertex varyingRob Clark2016-01-301-1/+4
* freedreno/ir3: don't ignore local varsRob Clark2016-01-301-1/+7
* freedreno/ir3: handle tex instrs w/ const offsetRob Clark2016-01-301-0/+16
* freedreno/ir3: support load_front_face intrinsicRob Clark2016-01-301-2/+14
* freedreno: limit string marker to max packet sizeRob Clark2016-01-301-0/+3
* nvc0: avoid crashing when there are holes in vertex array bindingsIlia Mirkin2016-01-291-3/+13
* nvc0: enable atomic counters and ssboIlia Mirkin2016-01-294-4/+10
* nv50/ir: handle new TGSI MEMBAR opcodeIlia Mirkin2016-01-291-0/+8
* nvc0/ir: fix atomic compare-and-swap argumentsIlia Mirkin2016-01-293-5/+8
* nv50/ir: add support for indirect buffer loadingIlia Mirkin2016-01-292-10/+31
* nv50/ir: add SUQ op by reading the info from driver constbufIlia Mirkin2016-01-296-3/+21
* nv50/ir: add support for BUFFER accessesIlia Mirkin2016-01-296-11/+147
* nvc0: handle shader buffer memory barrierIlia Mirkin2016-01-291-0/+4
* nvc0: add state management for shader buffersIlia Mirkin2016-01-295-8/+111
* nvc0: double per-shader stage driver constants areaIlia Mirkin2016-01-293-15/+15
* trace: add support for set_shader_buffersIlia Mirkin2016-01-293-0/+60
* st/mesa: enable ARB_shader_storage_buffer_object when supportedIlia Mirkin2016-01-291-0/+1
* st/mesa: add shader buffer barrier bitIlia Mirkin2016-01-292-0/+5
* st/mesa: add support for memory barrier intrinsicsIlia Mirkin2016-01-291-0/+45
* st/mesa: use RESQ to find buffer sizeIlia Mirkin2016-01-291-4/+18
* st/mesa: add support for SSBO binding and GLSL intrinsicsIlia Mirkin2016-01-299-8/+397
* st/mesa: add atomic counter supportIlia Mirkin2016-01-2910-8/+330
* mesa: add PROGRAM_IMMEDIATE, PROGRAM_BUFFERIlia Mirkin2016-01-292-1/+2
* glsl: keep track of ssbo variable being accessed, add access paramsIlia Mirkin2016-01-295-6/+57
* glsl: always initialize image_* fields, copy them on interface initIlia Mirkin2016-01-293-1/+12
* tgsi: add MEMBAR opcode to handle memoryBarrier* GLSL intrinsicsIlia Mirkin2016-01-293-2/+24
* winsys/amdgpu: Process RADEON_FLAG_* independently from RADEON_DOMAIN_*Michel Dänzer2016-01-291-10/+9
* winsys/amdgpu: Handle RADEON_FLAG_NO_CPU_ACCESSMichel Dänzer2016-01-291-0/+2
* nv50/ir: optimize mad/fma with third argument 0 to mulKarol Herbst2016-01-281-0/+21
* nv50/ir: run DCE backwardsKarol Herbst2016-01-281-3/+3
* nv50/ir: optimize shl(shr(a, c), c) to and(a, ~((1 << c) - 1))Karol Herbst2016-01-281-0/+8
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